ARM: Add fixed PCI i/o mapping
This adds a fixed virtual mapping for PCI i/o addresses. The mapping is located at the last 2MB of vmalloc region (0xfee00000-0xff000000). 2MB is used to align with PMD size, but IO_SPACE_LIMIT is 1MB. The space is reserved after .map_io and can be mapped at any time later with pci_ioremap_io. Platforms which need early i/o mapping (e.g. for vga console) can call pci_map_io_early in their .map_io function. This has changed completely from the 1st implementation which only supported creating the static mapping at .map_io. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Acked-by: Nicolas Pitre <nico@linaro.org>
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@ -51,6 +51,9 @@ ffc00000 ffefffff DMA memory mapping region. Memory returned
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ff000000 ffbfffff Reserved for future expansion of DMA
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mapping region.
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fee00000 feffffff Mapping of PCI I/O space. This is a static
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mapping within the vmalloc space.
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VMALLOC_START VMALLOC_END-1 vmalloc() / ioremap() space.
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Memory returned by vmalloc/ioremap will
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be dynamically placed in this region.
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@ -113,11 +113,19 @@ static inline void __iomem *__typesafe_io(unsigned long addr)
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#define __iowmb() do { } while (0)
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#endif
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/* PCI fixed i/o mapping */
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#define PCI_IO_VIRT_BASE 0xfee00000
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extern int pci_ioremap_io(unsigned int offset, phys_addr_t phys_addr);
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/*
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* Now, pick up the machine-defined IO definitions
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*/
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#ifdef CONFIG_NEED_MACH_IO_H
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#include <mach/io.h>
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#elif defined(CONFIG_PCI)
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#define IO_SPACE_LIMIT ((resource_size_t)0xfffff)
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#define __io(a) __typesafe_io(PCI_IO_VIRT_BASE + ((a) & IO_SPACE_LIMIT))
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#else
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#define __io(a) __typesafe_io((a) & IO_SPACE_LIMIT)
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#endif
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@ -9,6 +9,9 @@
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*
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* Page table mapping constructs and function prototypes
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*/
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#ifndef __ASM_MACH_MAP_H
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#define __ASM_MACH_MAP_H
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#include <asm/io.h>
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struct map_desc {
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@ -34,6 +37,8 @@ struct map_desc {
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#ifdef CONFIG_MMU
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extern void iotable_init(struct map_desc *, int);
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extern void vm_reserve_area_early(unsigned long addr, unsigned long size,
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void *caller);
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struct mem_type;
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extern const struct mem_type *get_mem_type(unsigned int type);
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@ -44,4 +49,7 @@ extern int ioremap_page(unsigned long virt, unsigned long phys,
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const struct mem_type *mtype);
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#else
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#define iotable_init(map,num) do { } while (0)
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#define vm_reserve_area_early(a,s,c) do { } while (0)
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#endif
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#endif
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@ -11,6 +11,7 @@
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#ifndef __ASM_MACH_PCI_H
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#define __ASM_MACH_PCI_H
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struct pci_sys_data;
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struct pci_ops;
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struct pci_bus;
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@ -54,6 +55,15 @@ struct pci_sys_data {
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*/
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void pci_common_init(struct hw_pci *);
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/*
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* Setup early fixed I/O mapping.
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*/
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#if defined(CONFIG_PCI)
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extern void pci_map_io_early(unsigned long pfn);
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#else
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static inline void pci_map_io_early(unsigned long pfn) {}
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#endif
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/*
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* PCI controllers
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*/
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@ -13,6 +13,7 @@
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#include <linux/io.h>
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#include <asm/mach-types.h>
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#include <asm/mach/map.h>
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#include <asm/mach/pci.h>
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static int debug_pci;
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@ -627,3 +628,15 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
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return 0;
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}
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void __init pci_map_io_early(unsigned long pfn)
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{
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struct map_desc pci_io_desc = {
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.virtual = PCI_IO_VIRT_BASE,
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.type = MT_DEVICE,
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.length = SZ_64K,
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};
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pci_io_desc.pfn = pfn;
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iotable_init(&pci_io_desc, 1);
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}
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@ -36,6 +36,7 @@
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#include <asm/system_info.h>
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#include <asm/mach/map.h>
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#include <asm/mach/pci.h>
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#include "mm.h"
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int ioremap_page(unsigned long virt, unsigned long phys,
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@ -383,3 +384,16 @@ void __arm_iounmap(volatile void __iomem *io_addr)
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arch_iounmap(io_addr);
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}
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EXPORT_SYMBOL(__arm_iounmap);
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#ifdef CONFIG_PCI
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int pci_ioremap_io(unsigned int offset, phys_addr_t phys_addr)
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{
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BUG_ON(offset + SZ_64K > IO_SPACE_LIMIT);
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return ioremap_page_range(PCI_IO_VIRT_BASE + offset,
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PCI_IO_VIRT_BASE + offset + SZ_64K,
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phys_addr,
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__pgprot(get_mem_type(MT_DEVICE)->prot_pte));
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}
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EXPORT_SYMBOL_GPL(pci_ioremap_io);
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#endif
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@ -31,6 +31,7 @@
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/pci.h>
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#include "mm.h"
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@ -216,7 +217,7 @@ static struct mem_type mem_types[] = {
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.prot_l1 = PMD_TYPE_TABLE,
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.prot_sect = PROT_SECT_DEVICE | PMD_SECT_WB,
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.domain = DOMAIN_IO,
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},
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},
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[MT_DEVICE_WC] = { /* ioremap_wc */
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.prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_WC,
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.prot_l1 = PMD_TYPE_TABLE,
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@ -783,14 +784,27 @@ void __init iotable_init(struct map_desc *io_desc, int nr)
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create_mapping(md);
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vm->addr = (void *)(md->virtual & PAGE_MASK);
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vm->size = PAGE_ALIGN(md->length + (md->virtual & ~PAGE_MASK));
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vm->phys_addr = __pfn_to_phys(md->pfn);
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vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING;
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vm->phys_addr = __pfn_to_phys(md->pfn);
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vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING;
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vm->flags |= VM_ARM_MTYPE(md->type);
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vm->caller = iotable_init;
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vm_area_add_early(vm++);
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}
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}
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void __init vm_reserve_area_early(unsigned long addr, unsigned long size,
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void *caller)
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{
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struct vm_struct *vm;
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vm = early_alloc_aligned(sizeof(*vm), __alignof__(*vm));
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vm->addr = (void *)addr;
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vm->size = size;
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vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING;
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vm->caller = caller;
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vm_area_add_early(vm);
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}
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#ifndef CONFIG_ARM_LPAE
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/*
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static void __init pmd_empty_section_gap(unsigned long addr)
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{
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struct vm_struct *vm;
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vm = early_alloc_aligned(sizeof(*vm), __alignof__(*vm));
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vm->addr = (void *)addr;
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vm->size = SECTION_SIZE;
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vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING;
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vm->caller = pmd_empty_section_gap;
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vm_area_add_early(vm);
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vm_reserve_area_early(addr, SECTION_SIZE, pmd_empty_section_gap);
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}
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static void __init fill_pmd_gaps(void)
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#define fill_pmd_gaps() do { } while (0)
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#endif
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#if defined(CONFIG_PCI) && !defined(CONFIG_NEED_MACH_IO_H)
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static void __init pci_reserve_io(void)
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{
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struct vm_struct *vm;
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unsigned long addr;
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/* we're still single threaded hence no lock needed here */
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for (vm = vmlist; vm; vm = vm->next) {
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if (!(vm->flags & VM_ARM_STATIC_MAPPING))
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continue;
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addr = (unsigned long)vm->addr;
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addr &= ~(SZ_2M - 1);
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if (addr == PCI_IO_VIRT_BASE)
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return;
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}
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vm_reserve_area_early(PCI_IO_VIRT_BASE, SZ_2M, pci_reserve_io);
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}
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#else
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#define pci_reserve_io() do { } while (0)
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#endif
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static void * __initdata vmalloc_min =
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(void *)(VMALLOC_END - (240 << 20) - VMALLOC_OFFSET);
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mdesc->map_io();
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fill_pmd_gaps();
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/* Reserve fixed i/o space in VMALLOC region */
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pci_reserve_io();
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/*
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* Finally flush the caches and tlb to ensure that we're in a
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* consistent state wrt the writebuffer. This also ensures that
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