drm/i915: Add HAS_PCH_LPT_LP() macro
Make LPT:LP checks look neater by wrapping the details in a new HAS_PCH_LPT_LP() macro. Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -2599,6 +2599,7 @@ struct drm_i915_cmd_table {
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#define INTEL_PCH_TYPE(dev) (__I915__(dev)->pch_type)
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#define HAS_PCH_SPT(dev) (INTEL_PCH_TYPE(dev) == PCH_SPT)
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#define HAS_PCH_LPT(dev) (INTEL_PCH_TYPE(dev) == PCH_LPT)
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#define HAS_PCH_LPT_LP(dev) (__I915__(dev)->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE)
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#define HAS_PCH_CPT(dev) (INTEL_PCH_TYPE(dev) == PCH_CPT)
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#define HAS_PCH_IBX(dev) (INTEL_PCH_TYPE(dev) == PCH_IBX)
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#define HAS_PCH_NOP(dev) (INTEL_PCH_TYPE(dev) == PCH_NOP)
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@ -8359,8 +8359,7 @@ static void lpt_enable_clkout_dp(struct drm_device *dev, bool with_spread,
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if (WARN(with_fdi && !with_spread, "FDI requires downspread\n"))
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with_spread = true;
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if (WARN(dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE &&
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with_fdi, "LP PCH doesn't have FDI\n"))
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if (WARN(HAS_PCH_LPT_LP(dev) && with_fdi, "LP PCH doesn't have FDI\n"))
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with_fdi = false;
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mutex_lock(&dev_priv->sb_lock);
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@ -8383,8 +8382,7 @@ static void lpt_enable_clkout_dp(struct drm_device *dev, bool with_spread,
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}
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}
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reg = (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) ?
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SBI_GEN0 : SBI_DBUFF0;
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reg = HAS_PCH_LPT_LP(dev) ? SBI_GEN0 : SBI_DBUFF0;
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tmp = intel_sbi_read(dev_priv, reg, SBI_ICLK);
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tmp |= SBI_GEN0_CFG_BUFFENABLE_DISABLE;
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intel_sbi_write(dev_priv, reg, tmp, SBI_ICLK);
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@ -8400,8 +8398,7 @@ static void lpt_disable_clkout_dp(struct drm_device *dev)
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mutex_lock(&dev_priv->sb_lock);
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reg = (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) ?
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SBI_GEN0 : SBI_DBUFF0;
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reg = HAS_PCH_LPT_LP(dev) ? SBI_GEN0 : SBI_DBUFF0;
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tmp = intel_sbi_read(dev_priv, reg, SBI_ICLK);
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tmp &= ~SBI_GEN0_CFG_BUFFENABLE_DISABLE;
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intel_sbi_write(dev_priv, reg, tmp, SBI_ICLK);
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@ -9413,7 +9410,7 @@ void hsw_enable_pc8(struct drm_i915_private *dev_priv)
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DRM_DEBUG_KMS("Enabling package C8+\n");
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if (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) {
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if (HAS_PCH_LPT_LP(dev)) {
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val = I915_READ(SOUTH_DSPCLK_GATE_D);
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val &= ~PCH_LP_PARTITION_LEVEL_DISABLE;
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I915_WRITE(SOUTH_DSPCLK_GATE_D, val);
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@ -9433,7 +9430,7 @@ void hsw_disable_pc8(struct drm_i915_private *dev_priv)
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hsw_restore_lcpll(dev_priv);
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lpt_init_pch_refclk(dev);
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if (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) {
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if (HAS_PCH_LPT_LP(dev)) {
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val = I915_READ(SOUTH_DSPCLK_GATE_D);
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val |= PCH_LP_PARTITION_LEVEL_DISABLE;
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I915_WRITE(SOUTH_DSPCLK_GATE_D, val);
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@ -6588,7 +6588,7 @@ static void lpt_init_clock_gating(struct drm_device *dev)
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* TODO: this bit should only be enabled when really needed, then
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* disabled when not needed anymore in order to save power.
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*/
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if (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE)
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if (HAS_PCH_LPT_LP(dev))
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I915_WRITE(SOUTH_DSPCLK_GATE_D,
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I915_READ(SOUTH_DSPCLK_GATE_D) |
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PCH_LP_PARTITION_LEVEL_DISABLE);
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@ -6603,7 +6603,7 @@ static void lpt_suspend_hw(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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if (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) {
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if (HAS_PCH_LPT_LP(dev)) {
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uint32_t val = I915_READ(SOUTH_DSPCLK_GATE_D);
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val &= ~PCH_LP_PARTITION_LEVEL_DISABLE;
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