spi/s3c64xx: Log error interrupts
Although the hardware supports interrupts we're not currently using them at all since for small transfers the overhead is greater than that for busy waiting and for large transfers we have interrupts from the DMA. This means that if the hardware reports an error (especially one which might not stall transfer) we might miss it. Take a first pass at dealing with such errors by enabling the interrupt if we can and logging the errors if they happen. Ideally we'd report the error via the affected transfer but since we're in master mode it's very difficult to trigger errors at present and this code is much simpler. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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@ -20,6 +20,7 @@
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/workqueue.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/clk.h>
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#include <linux/dma-mapping.h>
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@ -153,6 +154,7 @@ struct s3c64xx_spi_dma_data {
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* @tx_dmach: Controller's DMA channel for Tx.
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* @sfr_start: BUS address of SPI controller regs.
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* @regs: Pointer to ioremap'ed controller registers.
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* @irq: interrupt
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* @xfer_completion: To indicate completion of xfer task.
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* @cur_mode: Stores the active configuration of the controller.
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* @cur_bpw: Stores the active bits per word settings.
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@ -930,6 +932,33 @@ setup_exit:
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return err;
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}
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static irqreturn_t s3c64xx_spi_irq(int irq, void *data)
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{
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struct s3c64xx_spi_driver_data *sdd = data;
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struct spi_master *spi = sdd->master;
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unsigned int val;
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val = readl(sdd->regs + S3C64XX_SPI_PENDING_CLR);
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val &= S3C64XX_SPI_PND_RX_OVERRUN_CLR |
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S3C64XX_SPI_PND_RX_UNDERRUN_CLR |
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S3C64XX_SPI_PND_TX_OVERRUN_CLR |
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S3C64XX_SPI_PND_TX_UNDERRUN_CLR;
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writel(val, sdd->regs + S3C64XX_SPI_PENDING_CLR);
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if (val & S3C64XX_SPI_PND_RX_OVERRUN_CLR)
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dev_err(&spi->dev, "RX overrun\n");
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if (val & S3C64XX_SPI_PND_RX_UNDERRUN_CLR)
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dev_err(&spi->dev, "RX underrun\n");
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if (val & S3C64XX_SPI_PND_TX_OVERRUN_CLR)
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dev_err(&spi->dev, "TX overrun\n");
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if (val & S3C64XX_SPI_PND_TX_UNDERRUN_CLR)
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dev_err(&spi->dev, "TX underrun\n");
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return IRQ_HANDLED;
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}
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static void s3c64xx_spi_hwinit(struct s3c64xx_spi_driver_data *sdd, int channel)
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{
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struct s3c64xx_spi_info *sci = sdd->cntrlr_info;
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@ -970,7 +999,8 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev)
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struct s3c64xx_spi_driver_data *sdd;
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struct s3c64xx_spi_info *sci;
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struct spi_master *master;
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int ret;
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int ret, irq;
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char clk_name[16];
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if (pdev->id < 0) {
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dev_err(&pdev->dev,
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@ -1010,6 +1040,12 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev)
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return -ENXIO;
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}
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irq = platform_get_irq(pdev, 0);
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if (irq < 0) {
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dev_warn(&pdev->dev, "Failed to get IRQ: %d\n", irq);
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return irq;
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}
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master = spi_alloc_master(&pdev->dev,
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sizeof(struct s3c64xx_spi_driver_data));
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if (master == NULL) {
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@ -1104,10 +1140,21 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev)
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INIT_WORK(&sdd->work, s3c64xx_spi_work);
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INIT_LIST_HEAD(&sdd->queue);
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ret = request_irq(irq, s3c64xx_spi_irq, 0, "spi-s3c64xx", sdd);
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if (ret != 0) {
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dev_err(&pdev->dev, "Failed to request IRQ %d: %d\n",
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irq, ret);
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goto err8;
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}
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writel(S3C64XX_SPI_INT_RX_OVERRUN_EN | S3C64XX_SPI_INT_RX_UNDERRUN_EN |
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S3C64XX_SPI_INT_TX_OVERRUN_EN | S3C64XX_SPI_INT_TX_UNDERRUN_EN,
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sdd->regs + S3C64XX_SPI_INT_EN);
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if (spi_register_master(master)) {
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dev_err(&pdev->dev, "cannot register SPI master\n");
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ret = -EBUSY;
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goto err8;
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goto err9;
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}
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dev_dbg(&pdev->dev, "Samsung SoC SPI Driver loaded for Bus SPI-%d "
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@ -1119,6 +1166,8 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev)
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return 0;
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err9:
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free_irq(irq, sdd);
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err8:
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destroy_workqueue(sdd->workqueue);
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err7:
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@ -1157,6 +1206,10 @@ static int s3c64xx_spi_remove(struct platform_device *pdev)
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spi_unregister_master(master);
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writel(0, sdd->regs + S3C64XX_SPI_INT_EN);
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free_irq(platform_get_irq(pdev, 0), sdd);
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destroy_workqueue(sdd->workqueue);
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clk_disable(sdd->src_clk);
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