Renesas ARM Based SoC R-Car SYSC Updates for v4.7
* Add DT bindings for the R-Car System Controller. An implementation is intended to follow. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJXGExEAAoJENfPZGlqN0++mKsQALO/M22EQglnQN/FdKd01lrI Pm8YlEmQxaKKK/Kjn4PSm6ZidZIpczrtZstJOp7OIb3jU8/RD2JcF/VktMeimqG3 HYJz0hjbyRItABi06qhup/Xsumoxu6i8RRmoyvi6gKbE+CjDtWo/VUj6Li09aXao vUG5Jrj4nUkQnqKhp94aOfwo8PHRkXxSB6xpCMnejenY7wYAdPTcztgyLMU0t+/H b8MQxVuVu++OrCCi2oBMIW8RT+qUxWiV5Pc0gihpqg3pDDgas72KxlnopSFO0DMU A7e4Y6c8cwE+orKWxPM0ibbDnAKgNrive4/MiQqo/7E2U/iv7TyaSBpSNvLLOQOV 7gYUcbWAVCuJHqDDVgP9t4dwnBLEJhzJVcQpRDYcgRxmS4BcqRNumB8IsF6DHJus 0C5QOpNxWelmUVpSxZQ3oadj3B5Qvfdsq9g0RDyjcNq+tDUKyBAjZhfGleuhAo5v 5RurNhA5794k1iwmGv92rRweL8Yjl1HWxuRDbb47RqklKcObyGU69rvEbZP8v8zX fH2p6CVzjePW+1/NYojiWwXIeTyHMqk5ZqZShZRADIcv63zVbEOxeWOSX7p1Z1Pk atNqTvJuEJXpAZuZuuWiwnhW3pGOKQ/OVyjQgV+joFsjrRAwbZc3jyPs9/QpN6t/ jGO1tTT6lExHkm9dza0f =Dv3S -----END PGP SIGNATURE----- Merge tag 'renesas-rcar-sysc-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Pull "Renesas ARM Based SoC R-Car SYSC Updates for v4.7" from Simon Horman: * Add DT bindings for the R-Car System Controller. An implementation is intended to follow. * tag 'renesas-rcar-sysc-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: soc: renesas: Add r8a7795 SYSC PM Domain Binding Definitions soc: renesas: Add r8a7794 SYSC PM Domain Binding Definitions soc: renesas: Add r8a7793 SYSC PM Domain Binding Definitions soc: renesas: Add r8a7791 SYSC PM Domain Binding Definitions soc: renesas: Add r8a7790 SYSC PM Domain Binding Definitions soc: renesas: Add r8a7779 SYSC PM Domain Binding Definitions PM / Domains: Add DT bindings for the R-Car System Controller
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Arnd Bergmann
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DT bindings for the Renesas R-Car System Controller
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== System Controller Node ==
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The R-Car System Controller provides power management for the CPU cores and
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various coprocessors.
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Required properties:
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- compatible: Must contain exactly one of the following:
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- "renesas,r8a7779-sysc" (R-Car H1)
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- "renesas,r8a7790-sysc" (R-Car H2)
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- "renesas,r8a7791-sysc" (R-Car M2-W)
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- "renesas,r8a7792-sysc" (R-Car V2H)
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- "renesas,r8a7793-sysc" (R-Car M2-N)
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- "renesas,r8a7794-sysc" (R-Car E2)
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- "renesas,r8a7795-sysc" (R-Car H3)
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- reg: Address start and address range for the device.
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- #power-domain-cells: Must be 1.
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Example:
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sysc: system-controller@e6180000 {
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compatible = "renesas,r8a7791-sysc";
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reg = <0 0xe6180000 0 0x0200>;
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#power-domain-cells = <1>;
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};
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== PM Domain Consumers ==
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Devices residing in a power area must refer to that power area, as documented
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by the generic PM domain bindings in
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Documentation/devicetree/bindings/power/power_domain.txt.
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Required properties:
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- power-domains: A phandle and symbolic PM domain specifier, as defined in
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<dt-bindings/power/r8a77*-sysc.h>.
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Example:
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L2_CA15: cache-controller@0 {
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compatible = "cache";
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power-domains = <&sysc R8A7791_PD_CA15_SCU>;
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cache-unified;
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cache-level = <2>;
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};
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/*
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* Copyright (C) 2016 Glider bvba
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*/
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#ifndef __DT_BINDINGS_POWER_R8A7779_SYSC_H__
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#define __DT_BINDINGS_POWER_R8A7779_SYSC_H__
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/*
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* These power domain indices match the numbers of the interrupt bits
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* representing the power areas in the various Interrupt Registers
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* (e.g. SYSCISR, Interrupt Status Register)
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*/
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#define R8A7779_PD_ARM1 1
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#define R8A7779_PD_ARM2 2
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#define R8A7779_PD_ARM3 3
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#define R8A7779_PD_SGX 20
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#define R8A7779_PD_VDP 21
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#define R8A7779_PD_IMP 24
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/* Always-on power area */
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#define R8A7779_PD_ALWAYS_ON 32
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#endif /* __DT_BINDINGS_POWER_R8A7779_SYSC_H__ */
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/*
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* Copyright (C) 2016 Glider bvba
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*/
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#ifndef __DT_BINDINGS_POWER_R8A7790_SYSC_H__
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#define __DT_BINDINGS_POWER_R8A7790_SYSC_H__
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/*
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* These power domain indices match the numbers of the interrupt bits
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* representing the power areas in the various Interrupt Registers
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* (e.g. SYSCISR, Interrupt Status Register)
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*/
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#define R8A7790_PD_CA15_CPU0 0
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#define R8A7790_PD_CA15_CPU1 1
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#define R8A7790_PD_CA15_CPU2 2
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#define R8A7790_PD_CA15_CPU3 3
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#define R8A7790_PD_CA7_CPU0 5
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#define R8A7790_PD_CA7_CPU1 6
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#define R8A7790_PD_CA7_CPU2 7
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#define R8A7790_PD_CA7_CPU3 8
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#define R8A7790_PD_CA15_SCU 12
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#define R8A7790_PD_SH_4A 16
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#define R8A7790_PD_RGX 20
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#define R8A7790_PD_CA7_SCU 21
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#define R8A7790_PD_IMP 24
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/* Always-on power area */
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#define R8A7790_PD_ALWAYS_ON 32
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#endif /* __DT_BINDINGS_POWER_R8A7790_SYSC_H__ */
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/*
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* Copyright (C) 2016 Glider bvba
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*/
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#ifndef __DT_BINDINGS_POWER_R8A7791_SYSC_H__
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#define __DT_BINDINGS_POWER_R8A7791_SYSC_H__
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/*
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* These power domain indices match the numbers of the interrupt bits
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* representing the power areas in the various Interrupt Registers
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* (e.g. SYSCISR, Interrupt Status Register)
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*/
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#define R8A7791_PD_CA15_CPU0 0
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#define R8A7791_PD_CA15_CPU1 1
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#define R8A7791_PD_CA15_SCU 12
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#define R8A7791_PD_SH_4A 16
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#define R8A7791_PD_SGX 20
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/* Always-on power area */
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#define R8A7791_PD_ALWAYS_ON 32
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#endif /* __DT_BINDINGS_POWER_R8A7791_SYSC_H__ */
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/*
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* Copyright (C) 2016 Glider bvba
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*/
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#ifndef __DT_BINDINGS_POWER_R8A7793_SYSC_H__
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#define __DT_BINDINGS_POWER_R8A7793_SYSC_H__
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/*
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* These power domain indices match the numbers of the interrupt bits
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* representing the power areas in the various Interrupt Registers
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* (e.g. SYSCISR, Interrupt Status Register)
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*
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* Note that R-Car M2-N is identical to R-Car M2-W w.r.t. power domains.
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*/
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#define R8A7793_PD_CA15_CPU0 0
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#define R8A7793_PD_CA15_CPU1 1
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#define R8A7793_PD_CA15_SCU 12
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#define R8A7793_PD_SH_4A 16
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#define R8A7793_PD_SGX 20
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/* Always-on power area */
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#define R8A7793_PD_ALWAYS_ON 32
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#endif /* __DT_BINDINGS_POWER_R8A7793_SYSC_H__ */
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/*
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* Copyright (C) 2016 Glider bvba
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*/
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#ifndef __DT_BINDINGS_POWER_R8A7794_SYSC_H__
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#define __DT_BINDINGS_POWER_R8A7794_SYSC_H__
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/*
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* These power domain indices match the numbers of the interrupt bits
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* representing the power areas in the various Interrupt Registers
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* (e.g. SYSCISR, Interrupt Status Register)
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*/
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#define R8A7794_PD_CA7_CPU0 5
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#define R8A7794_PD_CA7_CPU1 6
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#define R8A7794_PD_SH_4A 16
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#define R8A7794_PD_SGX 20
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#define R8A7794_PD_CA7_SCU 21
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/* Always-on power area */
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#define R8A7794_PD_ALWAYS_ON 32
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#endif /* __DT_BINDINGS_POWER_R8A7794_SYSC_H__ */
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/*
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* Copyright (C) 2016 Glider bvba
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*/
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#ifndef __DT_BINDINGS_POWER_R8A7795_SYSC_H__
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#define __DT_BINDINGS_POWER_R8A7795_SYSC_H__
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/*
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* These power domain indices match the numbers of the interrupt bits
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* representing the power areas in the various Interrupt Registers
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* (e.g. SYSCISR, Interrupt Status Register)
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*/
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#define R8A7795_PD_CA57_CPU0 0
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#define R8A7795_PD_CA57_CPU1 1
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#define R8A7795_PD_CA57_CPU2 2
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#define R8A7795_PD_CA57_CPU3 3
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#define R8A7795_PD_CA53_CPU0 5
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#define R8A7795_PD_CA53_CPU1 6
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#define R8A7795_PD_CA53_CPU2 7
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#define R8A7795_PD_CA53_CPU3 8
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#define R8A7795_PD_A3VP 9
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#define R8A7795_PD_CA57_SCU 12
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#define R8A7795_PD_CR7 13
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#define R8A7795_PD_A3VC 14
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#define R8A7795_PD_3DG_A 17
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#define R8A7795_PD_3DG_B 18
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#define R8A7795_PD_3DG_C 19
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#define R8A7795_PD_3DG_D 20
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#define R8A7795_PD_CA53_SCU 21
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#define R8A7795_PD_3DG_E 22
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#define R8A7795_PD_A3IR 24
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#define R8A7795_PD_A2VC0 25
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#define R8A7795_PD_A2VC1 26
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/* Always-on power area */
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#define R8A7795_PD_ALWAYS_ON 32
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#endif /* __DT_BINDINGS_POWER_R8A7795_SYSC_H__ */
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