[media] m88ts2022: reimplement synthesizer calculations
Used synthesizer is very typical integer-N PLL, with configurable reference frequency divider, output frequency divider and of course N itself. Most common method to calculate values is first select output divider, then calculate VCO frequency and finally calculate PLL N from VCO frequency. Do it that way. Also make some cleanups for filter logic and signal strength. Signed-off-by: Antti Palosaari <crope@iki.fi> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
This commit is contained in:
Antti Palosaari
Mauro Carvalho Chehab
parent
92676ac927
commit
c19314b09b
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@ -175,27 +175,33 @@ static int m88ts2022_set_params(struct dvb_frontend *fe)
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{
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struct m88ts2022_priv *priv = fe->tuner_priv;
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struct dtv_frontend_properties *c = &fe->dtv_property_cache;
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int ret = 0, div;
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u8 buf[3], u8tmp, cap_code, lpf_mxdiv, div_max, div_min;
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u16 N_reg, N, K;
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u32 lpf_gm, lpf_coeff, gdiv28, frequency_khz, frequency_offset;
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u32 freq_3db;
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int ret;
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unsigned int frequency_khz, frequency_offset_khz, f_3db_hz;
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unsigned int f_ref_khz, f_vco_khz, div_ref, div_out, pll_n, gdiv28;
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u8 buf[3], u8tmp, cap_code, lpf_gm, lpf_mxdiv, div_max, div_min;
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u16 u16tmp;
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dev_dbg(&priv->i2c->dev,
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"%s: frequency=%d symbol_rate=%d rolloff=%d\n",
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__func__, c->frequency, c->symbol_rate, c->rolloff);
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/*
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* Integer-N PLL synthesizer
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* kHz is used for all calculations to keep calculations within 32-bit
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*/
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f_ref_khz = DIV_ROUND_CLOSEST(priv->cfg->clock, 1000);
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div_ref = DIV_ROUND_CLOSEST(f_ref_khz, 2000);
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if (c->symbol_rate < 5000000)
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frequency_offset = 3000000; /* 3 MHz */
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frequency_offset_khz = 3000; /* 3 MHz */
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else
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frequency_offset = 0;
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frequency_offset_khz = 0;
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frequency_khz = c->frequency + (frequency_offset / 1000);
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frequency_khz = c->frequency + frequency_offset_khz;
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if (frequency_khz < 1103000) {
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div = 2;
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div_out = 4;
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u8tmp = 0x1b;
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} else {
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div = 1;
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div_out = 2;
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u8tmp = 0x0b;
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}
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@ -205,30 +211,30 @@ static int m88ts2022_set_params(struct dvb_frontend *fe)
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if (ret)
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goto err;
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K = DIV_ROUND_CLOSEST((priv->cfg->clock / 2), 1000000);
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N = 1ul * frequency_khz * K * div * 2 / (priv->cfg->clock / 1000);
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N += N % 2;
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f_vco_khz = frequency_khz * div_out;
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pll_n = f_vco_khz * div_ref / f_ref_khz;
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pll_n += pll_n % 2;
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priv->frequency_khz = pll_n * f_ref_khz / div_ref / div_out;
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if (N < 4095)
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N_reg = N - 1024;
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else if (N < 6143)
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N_reg = N + 1024;
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if (pll_n < 4095)
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u16tmp = pll_n - 1024;
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else if (pll_n < 6143)
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u16tmp = pll_n + 1024;
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else
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N_reg = N + 3072;
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u16tmp = pll_n + 3072;
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buf[0] = (N_reg >> 8) & 0x3f;
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buf[1] = (N_reg >> 0) & 0xff;
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buf[2] = K - 8;
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buf[0] = (u16tmp >> 8) & 0x3f;
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buf[1] = (u16tmp >> 0) & 0xff;
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buf[2] = div_ref - 8;
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ret = m88ts2022_wr_regs(priv, 0x01, buf, 3);
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if (ret)
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goto err;
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priv->frequency_khz = 1ul * N * (priv->cfg->clock / 1000) / K / div / 2;
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dev_dbg(&priv->i2c->dev,
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"%s: frequency=%d offset=%d K=%d N=%d div=%d\n",
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"%s: frequency=%u offset=%d f_vco_khz=%u pll_n=%u div_ref=%u div_out=%u\n",
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__func__, priv->frequency_khz,
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priv->frequency_khz - c->frequency, K, N, div);
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priv->frequency_khz - c->frequency, f_vco_khz, pll_n,
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div_ref, div_out);
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ret = m88ts2022_cmd(fe, 0x10, 5, 0x15, 0x40, 0x00, NULL);
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if (ret)
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@ -284,7 +290,8 @@ static int m88ts2022_set_params(struct dvb_frontend *fe)
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if (ret)
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goto err;
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gdiv28 = DIV_ROUND_CLOSEST(priv->cfg->clock / 1000000 * 1694, 1000);
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/* filters */
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gdiv28 = DIV_ROUND_CLOSEST(f_ref_khz * 1694U, 1000000U);
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ret = m88ts2022_wr_reg(priv, 0x04, gdiv28);
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if (ret)
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@ -309,35 +316,20 @@ static int m88ts2022_set_params(struct dvb_frontend *fe)
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gdiv28 = gdiv28 * 207 / (cap_code * 2 + 151);
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div_max = gdiv28 * 135 / 100;
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div_min = gdiv28 * 78 / 100;
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if (div_max > 63)
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div_max = 63;
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div_max = clamp_val(div_max, 0U, 63U);
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freq_3db = 1ul * c->symbol_rate * 135 / 200 + 2000000;
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freq_3db += frequency_offset;
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if (freq_3db < 7000000)
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freq_3db = 7000000;
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if (freq_3db > 40000000)
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freq_3db = 40000000;
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f_3db_hz = c->symbol_rate * 135UL / 200UL;
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f_3db_hz += 2000000U + (frequency_offset_khz * 1000U);
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f_3db_hz = clamp(f_3db_hz, 7000000U, 40000000U);
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lpf_coeff = 3200;
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lpf_gm = DIV_ROUND_CLOSEST(freq_3db * gdiv28, lpf_coeff *
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(priv->cfg->clock / 1000));
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if (lpf_gm > 23)
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lpf_gm = 23;
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if (lpf_gm < 1)
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lpf_gm = 1;
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#define LPF_COEFF 3200U
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lpf_gm = DIV_ROUND_CLOSEST(f_3db_hz * gdiv28, LPF_COEFF * f_ref_khz);
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lpf_gm = clamp_val(lpf_gm, 1U, 23U);
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lpf_mxdiv = DIV_ROUND_CLOSEST(lpf_gm * lpf_coeff *
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(priv->cfg->clock / 1000), freq_3db);
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if (lpf_mxdiv < div_min) {
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lpf_gm++;
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lpf_mxdiv = DIV_ROUND_CLOSEST(lpf_gm * lpf_coeff *
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(priv->cfg->clock / 1000), freq_3db);
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}
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if (lpf_mxdiv > div_max)
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lpf_mxdiv = div_max;
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lpf_mxdiv = DIV_ROUND_CLOSEST(lpf_gm * LPF_COEFF * f_ref_khz, f_3db_hz);
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if (lpf_mxdiv < div_min)
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lpf_mxdiv = DIV_ROUND_CLOSEST(++lpf_gm * LPF_COEFF * f_ref_khz, f_3db_hz);
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lpf_mxdiv = clamp_val(lpf_mxdiv, 0U, div_max);
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ret = m88ts2022_wr_reg(priv, 0x04, lpf_mxdiv);
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if (ret)
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@ -492,44 +484,37 @@ static int m88ts2022_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
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static int m88ts2022_get_rf_strength(struct dvb_frontend *fe, u16 *strength)
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{
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struct m88ts2022_priv *priv = fe->tuner_priv;
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u8 u8tmp, gain1, gain2, gain3;
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u16 gain, u16tmp;
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int ret;
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u8 u8tmp;
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u16 gain, u16tmp;
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unsigned int gain1, gain2, gain3;
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ret = m88ts2022_rd_reg(priv, 0x3d, &u8tmp);
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if (ret)
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goto err;
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gain1 = (u8tmp >> 0) & 0x1f;
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if (gain1 > 15)
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gain1 = 15;
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gain1 = clamp(gain1, 0U, 15U);
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ret = m88ts2022_rd_reg(priv, 0x21, &u8tmp);
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if (ret)
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goto err;
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gain2 = (u8tmp >> 0) & 0x1f;
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if (gain2 < 2)
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gain2 = 2;
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if (gain2 > 16)
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gain2 = 16;
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gain2 = clamp(gain2, 2U, 16U);
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ret = m88ts2022_rd_reg(priv, 0x66, &u8tmp);
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if (ret)
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goto err;
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gain3 = (u8tmp >> 3) & 0x07;
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if (gain3 > 6)
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gain3 = 6;
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gain3 = clamp(gain3, 0U, 6U);
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gain = gain1 * 265 + gain2 * 338 + gain3 * 285;
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/* scale value to 0x0000-0xffff */
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u16tmp = (0xffff - gain);
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if (u16tmp < 59000)
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u16tmp = 59000;
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else if (u16tmp > 61500)
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u16tmp = 61500;
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u16tmp = clamp_val(u16tmp, 59000U, 61500U);
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*strength = (u16tmp - 59000) * 0xffff / (61500 - 59000);
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err:
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