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drm/radeon: allow FP16 color clear registers on r500 

Probably not a candidate for stable kernels because of conflicts
in DRM versioning.

Signed-off-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Marek Olšák 2013-01-12 04:19:37 +01:00 committed by Alex Deucher
parent 19fc42ed99
commit c18b117049
2 changed files with 4 additions and 1 deletions
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3
drivers/gpu/drm/radeon/radeon_drv.c
View File

@ -69,9 +69,10 @@
* 2.26.0 - r600-eg: fix htile size computation
* 2.27.0 - r600-SI: Add CS ioctl support for async DMA
* 2.28.0 - r600-eg: Add MEM_WRITE packet support
* 2.29.0 - R500 FP16 color clear registers
*/
#define KMS_DRIVER_MAJOR 2
#define KMS_DRIVER_MINOR 28
#define KMS_DRIVER_MINOR 29
#define KMS_DRIVER_PATCHLEVEL 0
int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
int radeon_driver_unload_kms(struct drm_device *dev);

2
drivers/gpu/drm/radeon/reg_srcs/rv515
View File

@ -324,6 +324,8 @@ rv515 0x6d40
0x46AC US_OUT_FMT_2
0x46B0 US_OUT_FMT_3
0x46B4 US_W_FMT
0x46C0 RB3D_COLOR_CLEAR_VALUE_AR
0x46C4 RB3D_COLOR_CLEAR_VALUE_GB
0x4BC0 FG_FOG_BLEND
0x4BC4 FG_FOG_FACTOR
0x4BC8 FG_FOG_COLOR_R