drm/i915/gvt: remove workload from intel_shadow_wa_ctx structure
intel_shadow_wa_ctx is a field of intel_vgpu_workload. container_of() can be used to refine the relation-ship between intel_shadow_wa_ctx and intel_vgpu_workload. This patch removes the useless dereference. v2. add "drm/i915/gvt" prefix. (Zhenyu) Signed-off-by: Tina Zhang <tina.zhang@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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c10c12558c
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@ -2609,6 +2609,9 @@ static int scan_wa_ctx(struct intel_shadow_wa_ctx *wa_ctx)
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unsigned long gma_head, gma_tail, gma_bottom, ring_size, ring_tail;
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struct parser_exec_state s;
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int ret = 0;
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struct intel_vgpu_workload *workload = container_of(wa_ctx,
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struct intel_vgpu_workload,
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wa_ctx);
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/* ring base is page aligned */
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if (WARN_ON(!IS_ALIGNED(wa_ctx->indirect_ctx.guest_gma, GTT_PAGE_SIZE)))
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@ -2623,14 +2626,14 @@ static int scan_wa_ctx(struct intel_shadow_wa_ctx *wa_ctx)
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s.buf_type = RING_BUFFER_INSTRUCTION;
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s.buf_addr_type = GTT_BUFFER;
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s.vgpu = wa_ctx->workload->vgpu;
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s.ring_id = wa_ctx->workload->ring_id;
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s.vgpu = workload->vgpu;
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s.ring_id = workload->ring_id;
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s.ring_start = wa_ctx->indirect_ctx.guest_gma;
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s.ring_size = ring_size;
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s.ring_head = gma_head;
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s.ring_tail = gma_tail;
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s.rb_va = wa_ctx->indirect_ctx.shadow_va;
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s.workload = wa_ctx->workload;
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s.workload = workload;
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ret = ip_gma_set(&s, gma_head);
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if (ret)
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@ -2713,12 +2716,15 @@ static int shadow_indirect_ctx(struct intel_shadow_wa_ctx *wa_ctx)
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{
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int ctx_size = wa_ctx->indirect_ctx.size;
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unsigned long guest_gma = wa_ctx->indirect_ctx.guest_gma;
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struct intel_vgpu *vgpu = wa_ctx->workload->vgpu;
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struct intel_vgpu_workload *workload = container_of(wa_ctx,
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struct intel_vgpu_workload,
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wa_ctx);
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struct intel_vgpu *vgpu = workload->vgpu;
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struct drm_i915_gem_object *obj;
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int ret = 0;
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void *map;
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obj = i915_gem_object_create(wa_ctx->workload->vgpu->gvt->dev_priv,
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obj = i915_gem_object_create(workload->vgpu->gvt->dev_priv,
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roundup(ctx_size + CACHELINE_BYTES,
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PAGE_SIZE));
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if (IS_ERR(obj))
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@ -2738,8 +2744,8 @@ static int shadow_indirect_ctx(struct intel_shadow_wa_ctx *wa_ctx)
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goto unmap_src;
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}
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ret = copy_gma_to_hva(wa_ctx->workload->vgpu,
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wa_ctx->workload->vgpu->gtt.ggtt_mm,
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ret = copy_gma_to_hva(workload->vgpu,
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workload->vgpu->gtt.ggtt_mm,
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guest_gma, guest_gma + ctx_size,
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map);
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if (ret < 0) {
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@ -2777,7 +2783,10 @@ static int combine_wa_ctx(struct intel_shadow_wa_ctx *wa_ctx)
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int intel_gvt_scan_and_shadow_wa_ctx(struct intel_shadow_wa_ctx *wa_ctx)
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{
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int ret;
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struct intel_vgpu *vgpu = wa_ctx->workload->vgpu;
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struct intel_vgpu_workload *workload = container_of(wa_ctx,
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struct intel_vgpu_workload,
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wa_ctx);
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struct intel_vgpu *vgpu = workload->vgpu;
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if (wa_ctx->indirect_ctx.size == 0)
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return 0;
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@ -394,9 +394,11 @@ static void prepare_shadow_batch_buffer(struct intel_vgpu_workload *workload)
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static int update_wa_ctx_2_shadow_ctx(struct intel_shadow_wa_ctx *wa_ctx)
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{
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int ring_id = wa_ctx->workload->ring_id;
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struct i915_gem_context *shadow_ctx =
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wa_ctx->workload->vgpu->shadow_ctx;
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struct intel_vgpu_workload *workload = container_of(wa_ctx,
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struct intel_vgpu_workload,
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wa_ctx);
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int ring_id = workload->ring_id;
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struct i915_gem_context *shadow_ctx = workload->vgpu->shadow_ctx;
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struct drm_i915_gem_object *ctx_obj =
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shadow_ctx->engine[ring_id].state->obj;
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struct execlist_ring_context *shadow_ring_context;
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@ -680,7 +682,6 @@ static int submit_context(struct intel_vgpu *vgpu, int ring_id,
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CACHELINE_BYTES;
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workload->wa_ctx.per_ctx.guest_gma =
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per_ctx & PER_CTX_ADDR_MASK;
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workload->wa_ctx.workload = workload;
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WARN_ON(workload->wa_ctx.indirect_ctx.size && !(per_ctx & 0x1));
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}
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@ -67,7 +67,6 @@ struct shadow_per_ctx {
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};
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struct intel_shadow_wa_ctx {
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struct intel_vgpu_workload *workload;
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struct shadow_indirect_ctx indirect_ctx;
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struct shadow_per_ctx per_ctx;
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