drivers/edac: add new nmi rescan
Provides a way for NMI reported errors on x86 to notify the EDAC subsystem pending ECC errors by writing to a software state variable. Here's the reworked patch. I added an EDAC stub to the kernel so we can have variables that are in the kernel even if EDAC is a module. I also implemented the idea of using the chip driver to select error detection mode via module parameter and eliminate the kernel compile option. Please review/test. Thx! Also, I only made changes to some of the chipset drivers since I am unfamiliar with the other ones. We can add similar changes as we go. Signed-off-by: Dave Jiang <djiang@mvista.com> Signed-off-by: Douglas Thompson <dougthompson@xmission.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -41,6 +41,10 @@
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#include <linux/mca.h>
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#endif
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#if defined(CONFIG_EDAC)
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#include <linux/edac.h>
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#endif
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#include <asm/processor.h>
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#include <asm/system.h>
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#include <asm/io.h>
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@ -638,6 +642,14 @@ mem_parity_error(unsigned char reason, struct pt_regs * regs)
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printk(KERN_EMERG "Uhhuh. NMI received for unknown reason %02x on "
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"CPU %d.\n", reason, smp_processor_id());
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printk(KERN_EMERG "You have some hardware problem, likely on the PCI bus.\n");
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#if defined(CONFIG_EDAC)
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if(edac_handler_set()) {
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edac_atomic_assert_error();
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return;
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}
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#endif
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if (panic_on_unrecovered_nmi)
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panic("NMI: Not continuing");
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@ -34,6 +34,10 @@
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#include <linux/bug.h>
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#include <linux/kdebug.h>
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#if defined(CONFIG_EDAC)
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#include <linux/edac.h>
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#endif
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#include <asm/system.h>
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#include <asm/io.h>
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#include <asm/atomic.h>
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@ -719,6 +723,13 @@ mem_parity_error(unsigned char reason, struct pt_regs * regs)
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reason);
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printk(KERN_EMERG "You have some hardware problem, likely on the PCI bus.\n");
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#if defined(CONFIG_EDAC)
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if(edac_handler_set()) {
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edac_atomic_assert_error();
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return;
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}
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#endif
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if (panic_on_unrecovered_nmi)
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panic("NMI: Not continuing");
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@ -109,15 +109,4 @@ config EDAC_I5000
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Support for error detection and correction the Intel
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Greekcreek/Blackford chipsets.
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choice
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prompt "Error detecting method"
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default EDAC_POLL
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config EDAC_POLL
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bool "Poll for errors"
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help
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Poll the chipset periodically to detect errors.
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endchoice
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endif # EDAC
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@ -5,9 +5,9 @@
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# This file may be distributed under the terms of the
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# GNU General Public License.
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#
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# $Id: Makefile,v 1.4.2.3 2005/07/08 22:05:38 dsp_llnl Exp $
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obj-$(CONFIG_EDAC) := edac_stub.o
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obj-$(CONFIG_EDAC_MM_EDAC) += edac_core.o
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edac_core-objs := edac_mc.o edac_device.o edac_mc_sysfs.o edac_pci_sysfs.o
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@ -22,6 +22,7 @@
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#include <linux/pci.h>
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#include <linux/pci_ids.h>
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#include <linux/slab.h>
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#include <linux/edac.h>
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#include "edac_mc.h"
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#define E752X_REVISION " Ver: 2.0.1 " __DATE__
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@ -948,6 +949,16 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
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debugf0("%s(): mci\n", __func__);
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debugf0("Starting Probe1\n");
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/* make sure error reporting method is sane */
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switch(edac_op_state) {
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case EDAC_OPSTATE_POLL:
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case EDAC_OPSTATE_NMI:
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break;
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default:
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edac_op_state = EDAC_OPSTATE_POLL;
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break;
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}
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/* check to see if device 0 function 1 is enabled; if it isn't, we
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* assume the BIOS has reserved it for a reason and is expecting
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* exclusive access, we take care not to violate that assumption and
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@ -1123,4 +1134,5 @@ MODULE_DESCRIPTION("MC support for Intel e752x memory controllers");
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module_param(force_function_unhide, int, 0444);
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MODULE_PARM_DESC(force_function_unhide, "if BIOS sets Dev0:Fun1 up as hidden:"
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" 1=force unhide and hope BIOS doesn't fight driver for Dev0:Fun1 access");
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module_param(edac_op_state, int, 0444);
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MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
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@ -27,6 +27,7 @@
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#include <linux/pci.h>
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#include <linux/pci_ids.h>
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#include <linux/slab.h>
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#include <linux/edac.h>
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#include "edac_mc.h"
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#define E7XXX_REVISION " Ver: 2.0.1 " __DATE__
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@ -419,6 +420,17 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
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struct e7xxx_error_info discard;
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debugf0("%s(): mci\n", __func__);
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/* make sure error reporting method is sane */
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switch(edac_op_state) {
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case EDAC_OPSTATE_POLL:
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case EDAC_OPSTATE_NMI:
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break;
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default:
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edac_op_state = EDAC_OPSTATE_POLL;
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break;
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}
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pci_read_config_dword(pdev, E7XXX_DRC, &drc);
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drc_chan = dual_channel_active(drc, dev_idx);
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@ -565,3 +577,5 @@ MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh et al\n"
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"Based on.work by Dan Hollis et al");
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MODULE_DESCRIPTION("MC support for Intel e7xxx memory controllers");
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module_param(edac_op_state, int, 0444);
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MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
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@ -27,6 +27,7 @@
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#include <linux/list.h>
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#include <linux/sysdev.h>
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#include <linux/ctype.h>
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#include <linux/edac.h>
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#include <asm/uaccess.h>
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#include <asm/page.h>
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#include <asm/edac.h>
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@ -241,6 +242,7 @@ static int add_mc_to_global_list (struct mem_ctl_info *mci)
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}
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list_add_tail_rcu(&mci->link, insert_before);
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atomic_inc(&edac_handlers);
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return 0;
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fail0:
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@ -267,6 +269,7 @@ static void complete_mc_list_del(struct rcu_head *head)
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static void del_mc_from_global_list(struct mem_ctl_info *mci)
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{
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atomic_dec(&edac_handlers);
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list_del_rcu(&mci->link);
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init_completion(&mci->complete);
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call_rcu(&mci->rcu, complete_mc_list_del);
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@ -1,6 +1,7 @@
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#include <linux/freezer.h>
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#include <linux/kthread.h>
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#include <linux/edac.h>
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#include "edac_mc.h"
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#include "edac_module.h"
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edac_pci_do_parity_check();
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}
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/*
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* handler for EDAC to check if NMI type handler has asserted interrupt
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*/
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static int edac_assert_error_check_and_clear(void)
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{
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int vreg;
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if(edac_op_state == EDAC_OPSTATE_POLL)
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return 1;
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vreg = atomic_read(&edac_err_assert);
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if(vreg) {
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atomic_set(&edac_err_assert, 0);
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return 1;
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}
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return 0;
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}
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/*
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* Action thread for EDAC to perform the POLL operations
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*/
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@ -109,8 +129,8 @@ static int edac_kernel_thread(void *arg)
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int msec;
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while (!kthread_should_stop()) {
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do_edac_check();
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if(edac_assert_error_check_and_clear())
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do_edac_check();
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/* goto sleep for the interval */
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msec = (HZ * edac_get_poll_msec()) / 1000;
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@ -0,0 +1,42 @@
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/*
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* common EDAC components that must be in kernel
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*
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* Author: Dave Jiang <djiang@mvista.com>
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*
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* 2007 (c) MontaVista Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*
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*/
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#include <linux/module.h>
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#include <linux/edac.h>
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#include <asm/atomic.h>
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#include <asm/edac.h>
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int edac_op_state = EDAC_OPSTATE_INVAL;
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EXPORT_SYMBOL(edac_op_state);
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atomic_t edac_handlers = ATOMIC_INIT(0);
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EXPORT_SYMBOL(edac_handlers);
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atomic_t edac_err_assert = ATOMIC_INIT(0);
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EXPORT_SYMBOL(edac_err_assert);
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inline int edac_handler_set(void)
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{
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if (edac_op_state == EDAC_OPSTATE_POLL)
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return 0;
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return atomic_read(&edac_handlers);
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}
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EXPORT_SYMBOL(edac_handler_set);
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/*
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* handler for NMI type of interrupts to assert error
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*/
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inline void edac_atomic_assert_error(void)
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{
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atomic_set(&edac_err_assert, 1);
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}
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EXPORT_SYMBOL(edac_atomic_assert_error);
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@ -19,6 +19,7 @@
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#include <linux/pci.h>
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#include <linux/pci_ids.h>
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#include <linux/slab.h>
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#include <linux/edac.h>
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#include <asm/mmzone.h>
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#include "edac_mc.h"
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if (PCI_FUNC(pdev->devfn) != 0)
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return -ENODEV;
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/* make sure error reporting method is sane */
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switch(edac_op_state) {
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case EDAC_OPSTATE_POLL:
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case EDAC_OPSTATE_NMI:
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break;
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default:
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edac_op_state = EDAC_OPSTATE_POLL;
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break;
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}
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/* Ask the devices for the number of CSROWS and CHANNELS so
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* that we can calculate the memory resources, etc
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*
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("Linux Networx (http://lnxi.com) Doug Thompson <norsk5@xmission.com>");
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MODULE_DESCRIPTION("MC Driver for Intel I5000 memory controllers - "
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I5000_REVISION);
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module_param(edac_op_state, int, 0444);
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MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
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/*
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* Generic EDAC defs
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*
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* Author: Dave Jiang <djiang@mvista.com>
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*
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* 2006-2007 (c) MontaVista Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*
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*/
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#ifndef _LINUX_EDAC_H_
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#define _LINUX_EDAC_H_
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#include <asm/atomic.h>
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#define EDAC_OPSTATE_INVAL -1
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#define EDAC_OPSTATE_POLL 0
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#define EDAC_OPSTATE_NMI 1
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#define EDAC_OPSTATE_INT 2
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extern int edac_op_state;
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extern atomic_t edac_handlers;
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extern atomic_t edac_err_assert;
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extern int edac_handler_set(void);
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extern void edac_atomic_assert_error(void);
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#endif
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