drm/i915: restore pipeconf regs unconditionally

On many chipsets, the checks for DPLL enable or VGA mode will prevent the pipeconf regs from being restored, which could result in a blank display or X failing to come back after resume.  So restore them unconditionally along with actually restoring pipe B's palette correctly.

Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Jesse Barnes 2008-02-07 17:33:28 -08:00 committed by Dave Airlie
parent 0da3ea12fc
commit c0c4261b6f
1 changed files with 4 additions and 7 deletions

View File

@ -407,9 +407,7 @@ static int i915_resume(struct drm_device *dev)
I915_WRITE(DSPATILEOFF, dev_priv->saveDSPATILEOFF);
}
if ((dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) &&
(dev_priv->saveDPLL_A & DPLL_VGA_MODE_DIS))
I915_WRITE(PIPEACONF, dev_priv->savePIPEACONF);
I915_WRITE(PIPEACONF, dev_priv->savePIPEACONF);
i915_restore_palette(dev, PIPE_A);
/* Enable the plane */
@ -451,10 +449,9 @@ static int i915_resume(struct drm_device *dev)
I915_WRITE(DSPBTILEOFF, dev_priv->saveDSPBTILEOFF);
}
if ((dev_priv->saveDPLL_B & DPLL_VCO_ENABLE) &&
(dev_priv->saveDPLL_B & DPLL_VGA_MODE_DIS))
I915_WRITE(PIPEBCONF, dev_priv->savePIPEBCONF);
i915_restore_palette(dev, PIPE_A);
I915_WRITE(PIPEBCONF, dev_priv->savePIPEBCONF);
i915_restore_palette(dev, PIPE_B);
/* Enable the plane */
I915_WRITE(DSPBCNTR, dev_priv->saveDSPBCNTR);
I915_WRITE(DSPBBASE, I915_READ(DSPBBASE));