clocksource/drivers/arm_arch_timer: Remove any trace of the TVAL programming interface
TVAL usage is now long gone, get rid of the leftovers. Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211017124225.3018098-11-maz@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: hongrongxuan <hongrongxuan@huawei.com>
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@ -45,10 +45,8 @@
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#define CNTPCT_LO 0x08
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#define CNTFRQ 0x10
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#define CNTP_CVAL_LO 0x20
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#define CNTP_TVAL 0x28
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#define CNTP_CTL 0x2c
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#define CNTV_CVAL_LO 0x30
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#define CNTV_TVAL 0x38
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#define CNTV_CTL 0x3c
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static unsigned arch_timers_present __initdata;
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@ -96,9 +94,6 @@ void arch_timer_reg_write(int access, enum arch_timer_reg reg, u64 val,
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case ARCH_TIMER_REG_CTRL:
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writel_relaxed((u32)val, timer->base + CNTP_CTL);
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break;
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case ARCH_TIMER_REG_TVAL:
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writel_relaxed((u32)val, timer->base + CNTP_TVAL);
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break;
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case ARCH_TIMER_REG_CVAL:
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/*
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* Not guaranteed to be atomic, so the timer
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@ -115,9 +110,6 @@ void arch_timer_reg_write(int access, enum arch_timer_reg reg, u64 val,
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case ARCH_TIMER_REG_CTRL:
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writel_relaxed((u32)val, timer->base + CNTV_CTL);
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break;
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case ARCH_TIMER_REG_TVAL:
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writel_relaxed((u32)val, timer->base + CNTV_TVAL);
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break;
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case ARCH_TIMER_REG_CVAL:
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/* Same restriction as above */
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writeq_relaxed(val, timer->base + CNTV_CVAL_LO);
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@ -24,7 +24,6 @@
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enum arch_timer_reg {
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ARCH_TIMER_REG_CTRL,
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ARCH_TIMER_REG_TVAL,
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ARCH_TIMER_REG_CVAL,
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};
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