ARM: kprobes: Migrate ARM space_cccc_001x to decoding tables
Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
This commit is contained in:
Jon Medhurst
Tixy
parent
75f115c087
commit
c038f3af50
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@ -1203,72 +1203,56 @@ space_cccc_000x(kprobe_opcode_t insn, struct arch_specific_insn *asi)
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return kprobe_decode_insn(insn, asi, arm_cccc_000x_table, false);
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}
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static enum kprobe_insn __kprobes
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space_cccc_001x(kprobe_opcode_t insn, struct arch_specific_insn *asi)
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{
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/* MOVW : cccc 0011 0000 xxxx xxxx xxxx xxxx xxxx */
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/* MOVT : cccc 0011 0100 xxxx xxxx xxxx xxxx xxxx */
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if ((insn & 0x0fb00000) == 0x03000000)
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return prep_emulate_rd12_modify(insn, asi);
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static const union decode_item arm_cccc_001x_table[] = {
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/* Data-processing (immediate) */
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/* hints : cccc 0011 0010 0000 xxxx xxxx xxxx xxxx */
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if ((insn & 0x0fff0000) == 0x03200000) {
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unsigned op2 = insn & 0x000000ff;
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if (op2 == 0x01 || op2 == 0x04) {
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/* YIELD : cccc 0011 0010 0000 xxxx xxxx 0000 0001 */
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/* SEV : cccc 0011 0010 0000 xxxx xxxx 0000 0100 */
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asi->insn[0] = insn;
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asi->insn_handler = emulate_none;
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return INSN_GOOD;
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} else if (op2 <= 0x03) {
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/* NOP : cccc 0011 0010 0000 xxxx xxxx 0000 0000 */
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/* WFE : cccc 0011 0010 0000 xxxx xxxx 0000 0010 */
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/* WFI : cccc 0011 0010 0000 xxxx xxxx 0000 0011 */
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/*
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* We make WFE and WFI true NOPs to avoid stalls due
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* to missing events whilst processing the probe.
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*/
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asi->insn_handler = emulate_nop;
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return INSN_GOOD_NO_SLOT;
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}
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/* For DBG and unallocated hints it's safest to reject them */
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return INSN_REJECTED;
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}
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/* MOVW cccc 0011 0000 xxxx xxxx xxxx xxxx xxxx */
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/* MOVT cccc 0011 0100 xxxx xxxx xxxx xxxx xxxx */
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DECODE_CUSTOM (0x0fb00000, 0x03000000, prep_emulate_rd12_modify),
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/*
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* MSR : cccc 0011 0x10 xxxx xxxx xxxx xxxx xxxx
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* ALU op with S bit and Rd == 15 :
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* cccc 001x xxx1 xxxx 1111 xxxx xxxx xxxx
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*/
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if ((insn & 0x0fb00000) == 0x03200000 || /* MSR */
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(insn & 0x0e10f000) == 0x0210f000) /* ALU s-bit, R15 */
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return INSN_REJECTED;
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/* YIELD cccc 0011 0010 0000 xxxx xxxx 0000 0001 */
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DECODE_OR (0x0fff00ff, 0x03200001),
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/* SEV cccc 0011 0010 0000 xxxx xxxx 0000 0100 */
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DECODE_EMULATE (0x0fff00ff, 0x03200004, kprobe_emulate_none),
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/* NOP cccc 0011 0010 0000 xxxx xxxx 0000 0000 */
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/* WFE cccc 0011 0010 0000 xxxx xxxx 0000 0010 */
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/* WFI cccc 0011 0010 0000 xxxx xxxx 0000 0011 */
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DECODE_SIMULATE (0x0fff00fc, 0x03200000, kprobe_simulate_nop),
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/* DBG cccc 0011 0010 0000 xxxx xxxx ffff xxxx */
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/* unallocated hints cccc 0011 0010 0000 xxxx xxxx xxxx xxxx */
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/* MSR (immediate) cccc 0011 0x10 xxxx xxxx xxxx xxxx xxxx */
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DECODE_REJECT (0x0fb00000, 0x03200000),
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/*
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* Data processing: 32-bit Immediate
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* ALU op : cccc 001x xxxx xxxx xxxx xxxx xxxx xxxx
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* MOV : cccc 0011 101x xxxx xxxx xxxx xxxx xxxx
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* *S (bit 20) updates condition codes
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* ADC/SBC/RSC reads the C flag
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*/
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insn &= 0xfff00fff; /* Rn = r0 and Rd = r0 */
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asi->insn[0] = insn;
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/* <op>S PC, ... cccc 001x xxx1 xxxx 1111 xxxx xxxx xxxx */
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DECODE_REJECT (0x0e10f000, 0x0210f000),
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if ((insn & 0x0f900000) == 0x03100000) {
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/*
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* TST : cccc 0011 0001 xxxx xxxx xxxx xxxx xxxx
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* TEQ : cccc 0011 0011 xxxx xxxx xxxx xxxx xxxx
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* CMP : cccc 0011 0101 xxxx xxxx xxxx xxxx xxxx
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* CMN : cccc 0011 0111 xxxx xxxx xxxx xxxx xxxx
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*/
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asi->insn_handler = emulate_alu_tests_imm;
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} else {
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/* ALU ops which write to Rd */
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asi->insn_handler = (insn & (1 << 20)) ? /* S-bit */
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emulate_alu_imm_rwflags : emulate_alu_imm_rflags;
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}
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return INSN_GOOD;
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}
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/* TST (immediate) cccc 0011 0001 xxxx xxxx xxxx xxxx xxxx */
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/* TEQ (immediate) cccc 0011 0011 xxxx xxxx xxxx xxxx xxxx */
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/* CMP (immediate) cccc 0011 0101 xxxx xxxx xxxx xxxx xxxx */
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/* CMN (immediate) cccc 0011 0111 xxxx xxxx xxxx xxxx xxxx */
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DECODE_EMULATEX (0x0f900000, 0x03100000, emulate_rd12rn16rm0rs8_rwflags,
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REGS(ANY, 0, 0, 0, 0)),
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/* MOV (immediate) cccc 0011 101x xxxx xxxx xxxx xxxx xxxx */
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/* MVN (immediate) cccc 0011 111x xxxx xxxx xxxx xxxx xxxx */
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DECODE_EMULATEX (0x0fa00000, 0x03a00000, emulate_rd12rn16rm0rs8_rwflags,
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REGS(0, ANY, 0, 0, 0)),
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/* AND (immediate) cccc 0010 000x xxxx xxxx xxxx xxxx xxxx */
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/* EOR (immediate) cccc 0010 001x xxxx xxxx xxxx xxxx xxxx */
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/* SUB (immediate) cccc 0010 010x xxxx xxxx xxxx xxxx xxxx */
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/* RSB (immediate) cccc 0010 011x xxxx xxxx xxxx xxxx xxxx */
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/* ADD (immediate) cccc 0010 100x xxxx xxxx xxxx xxxx xxxx */
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/* ADC (immediate) cccc 0010 101x xxxx xxxx xxxx xxxx xxxx */
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/* SBC (immediate) cccc 0010 110x xxxx xxxx xxxx xxxx xxxx */
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/* RSC (immediate) cccc 0010 111x xxxx xxxx xxxx xxxx xxxx */
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/* ORR (immediate) cccc 0011 100x xxxx xxxx xxxx xxxx xxxx */
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/* BIC (immediate) cccc 0011 110x xxxx xxxx xxxx xxxx xxxx */
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DECODE_EMULATEX (0x0e000000, 0x02000000, emulate_rd12rn16rm0rs8_rwflags,
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REGS(ANY, ANY, 0, 0, 0)),
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DECODE_END
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};
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static enum kprobe_insn __kprobes
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space_cccc_0110__1(kprobe_opcode_t insn, struct arch_specific_insn *asi)
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@ -1548,7 +1532,7 @@ arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi)
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else if ((insn & 0x0e000000) == 0x02000000)
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return space_cccc_001x(insn, asi);
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return kprobe_decode_insn(insn, asi, arm_cccc_001x_table, false);
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else if ((insn & 0x0f000010) == 0x06000010)
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