clocksource: convert ARM 32-bit down counting clocksources
Convert SP804, MXC, Nomadik and Orion 32-bit down-counting clocksources to generic mmio clocksource infrastructure. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Alessandro Rubini <rubini@unipv.it> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: Lennert Buytenhek <kernel@wantstofly.org> Acked-by: Nicolas Pitre <nico@fluxnic.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -1042,6 +1042,7 @@ config PLAT_IOP
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config PLAT_ORION
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bool
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select CLKSRC_MMIO
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select HAVE_SCHED_CLOCK
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config PLAT_PXA
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@ -1052,6 +1053,7 @@ config PLAT_VERSATILE
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config ARM_TIMER_SP804
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bool
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select CLKSRC_MMIO
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source arch/arm/mm/Kconfig
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@ -32,35 +32,17 @@
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#define TIMER_FREQ_KHZ (1000)
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#define TIMER_RELOAD (TIMER_FREQ_KHZ * 1000 / HZ)
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static void __iomem *clksrc_base;
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static cycle_t sp804_read(struct clocksource *cs)
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{
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return ~readl(clksrc_base + TIMER_VALUE);
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}
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static struct clocksource clocksource_sp804 = {
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.name = "timer3",
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.rating = 200,
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.read = sp804_read,
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.mask = CLOCKSOURCE_MASK(32),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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void __init sp804_clocksource_init(void __iomem *base)
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{
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struct clocksource *cs = &clocksource_sp804;
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clksrc_base = base;
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/* setup timer 0 as free-running clocksource */
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writel(0, clksrc_base + TIMER_CTRL);
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writel(0xffffffff, clksrc_base + TIMER_LOAD);
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writel(0xffffffff, clksrc_base + TIMER_VALUE);
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writel(0, base + TIMER_CTRL);
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writel(0xffffffff, base + TIMER_LOAD);
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writel(0xffffffff, base + TIMER_VALUE);
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writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC,
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clksrc_base + TIMER_CTRL);
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base + TIMER_CTRL);
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clocksource_register_khz(cs, TIMER_FREQ_KHZ);
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clocksource_mmio_init(base + TIMER_VALUE, "timer3",
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TIMER_FREQ_KHZ * 1000, 200, 32, clocksource_mmio_readl_down);
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}
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@ -83,26 +83,12 @@ static void epit_irq_acknowledge(void)
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__raw_writel(EPITSR_OCIF, timer_base + EPITSR);
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}
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static cycle_t epit_read(struct clocksource *cs)
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{
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return 0 - __raw_readl(timer_base + EPITCNR);
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}
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static struct clocksource clocksource_epit = {
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.name = "epit",
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.rating = 200,
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.read = epit_read,
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.mask = CLOCKSOURCE_MASK(32),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static int __init epit_clocksource_init(struct clk *timer_clk)
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{
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unsigned int c = clk_get_rate(timer_clk);
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clocksource_register_hz(&clocksource_epit, c);
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return 0;
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return clocksource_mmio_init(timer_base + EPITCNR, "epit", c, 200, 32,
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clocksource_mmio_readl_down);
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}
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/* clock event */
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@ -5,6 +5,7 @@
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config PLAT_NOMADIK
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bool
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depends on ARCH_NOMADIK || ARCH_U8500
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select CLKSRC_MMIO
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default y
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help
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Common platform code for Nomadik and other ST-Ericsson
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@ -25,29 +25,6 @@
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void __iomem *mtu_base; /* Assigned by machine code */
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/*
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* Kernel assumes that sched_clock can be called early
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* but the MTU may not yet be initialized.
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*/
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static cycle_t nmdk_read_timer_dummy(struct clocksource *cs)
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{
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return 0;
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}
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/* clocksource: MTU decrements, so we negate the value being read. */
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static cycle_t nmdk_read_timer(struct clocksource *cs)
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{
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return -readl(mtu_base + MTU_VAL(0));
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}
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static struct clocksource nmdk_clksrc = {
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.name = "mtu_0",
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.rating = 200,
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.read = nmdk_read_timer_dummy,
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.mask = CLOCKSOURCE_MASK(32),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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/*
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* Override the global weak sched_clock symbol with this
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* local implementation which uses the clocksource to get some
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@ -172,12 +149,10 @@ void __init nmdk_timer_init(void)
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writel(0, mtu_base + MTU_BGLR(0));
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writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(0));
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/* Now the clock source is ready */
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nmdk_clksrc.read = nmdk_read_timer;
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if (clocksource_register_hz(&nmdk_clksrc, rate))
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if (clocksource_mmio_init(mtu_base + MTU_VAL(0), "mtu_0",
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rate, 200, 32, clocksource_mmio_readl_down))
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pr_err("timer: failed to initialize clock source %s\n",
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nmdk_clksrc.name);
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"mtu_0");
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init_sched_clock(&cd, nomadik_update_sched_clock, 32, rate);
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@ -80,24 +80,6 @@ static void __init setup_sched_clock(unsigned long tclk)
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init_sched_clock(&cd, orion_update_sched_clock, 32, tclk);
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}
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/*
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* Clocksource handling.
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*/
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static cycle_t orion_clksrc_read(struct clocksource *cs)
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{
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return 0xffffffff - readl(timer_base + TIMER0_VAL_OFF);
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}
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static struct clocksource orion_clksrc = {
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.name = "orion_clocksource",
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.rating = 300,
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.read = orion_clksrc_read,
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.mask = CLOCKSOURCE_MASK(32),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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/*
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* Clockevent handling.
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*/
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@ -247,7 +229,8 @@ orion_time_init(u32 _bridge_base, u32 _bridge_timer1_clr_mask,
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writel(u & ~BRIDGE_INT_TIMER0, bridge_base + BRIDGE_MASK_OFF);
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u = readl(timer_base + TIMER_CTRL_OFF);
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writel(u | TIMER0_EN | TIMER0_RELOAD_EN, timer_base + TIMER_CTRL_OFF);
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clocksource_register_hz(&orion_clksrc, tclk);
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clocksource_mmio_init(timer_base + TIMER0_VAL_OFF, "orion_clocksource",
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tclk, 300, 32, clocksource_mmio_readl_down);
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/*
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* Setup clockevent timer (interrupt-driven).
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