drm/i915/gen9: implement WaEnableSamplerGPGPUPreemptionSupport
WaEnableSamplerGPGPUPreemptionSupport fixes a problem related to mid thread pre-emption. Signed-off-by: Tim Gore <tim.gore@intel.com> Reviewed-by: Dave Gordon <david.s.gordon@intel.com> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1461077152-31899-1-git-send-email-tim.gore@intel.com
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@ -7180,6 +7180,7 @@ enum skl_disp_power_wells {
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#define GEN9_HALF_SLICE_CHICKEN7 _MMIO(0xe194)
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#define GEN9_ENABLE_YV12_BUGFIX (1<<4)
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#define GEN9_ENABLE_GPGPU_PREEMPTION (1<<2)
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/* Audio */
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#define G4X_AUD_VID_DID _MMIO(dev_priv->info.display_mmio_offset + 0x62020)
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@ -959,9 +959,10 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
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}
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/* WaEnableYV12BugFixInHalfSliceChicken7:skl,bxt */
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if (IS_SKL_REVID(dev, SKL_REVID_C0, REVID_FOREVER) || IS_BROXTON(dev))
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WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7,
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GEN9_ENABLE_YV12_BUGFIX);
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/* WaEnableSamplerGPGPUPreemptionSupport:skl,bxt */
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WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7,
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GEN9_ENABLE_YV12_BUGFIX |
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GEN9_ENABLE_GPGPU_PREEMPTION);
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/* Wa4x4STCOptimizationDisable:skl,bxt */
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/* WaDisablePartialResolveInVc:skl,bxt */
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