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media: Add lane checks for Cadence CSI2TX 

This patch adds lane checks for CSI2TX, to prevent clock lane
being used as a data lane.

Signed-off-by: Jan Kotas <jank@cadence.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
This commit is contained in:
Jan Kotas 2019-07-22 04:22:21 -04:00 committed by Mauro Carvalho Chehab
parent c0a7c00253
commit bf9df90b35
1 changed files with 11 additions and 2 deletions
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13
drivers/media/platform/cadence/cdns-csi2tx.c
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@ -2,7 +2,7 @@
/*
* Driver for Cadence MIPI-CSI2 TX Controller
*
* Copyright (C) 2017-2018 Cadence Design Systems Inc.
* Copyright (C) 2017-2019 Cadence Design Systems Inc.
*/
#include <linux/clk.h>
@ -434,7 +434,7 @@ static int csi2tx_check_lanes(struct csi2tx_priv *csi2tx)
{
struct v4l2_fwnode_endpoint v4l2_ep = { .bus_type = 0 };
struct device_node *ep;
int ret;
int ret, i;
ep = of_graph_get_endpoint_by_regs(csi2tx->dev->of_node, 0, 0);
if (!ep)
@ -461,6 +461,15 @@ static int csi2tx_check_lanes(struct csi2tx_priv *csi2tx)
goto out;
}
for (i = 0; i < csi2tx->num_lanes; i++) {
if (v4l2_ep.bus.mipi_csi2.data_lanes[i] < 1) {
dev_err(csi2tx->dev, "Invalid lane[%d] number: %u\n",
i, v4l2_ep.bus.mipi_csi2.data_lanes[i]);
ret = -EINVAL;
goto out;
}
}
memcpy(csi2tx->lanes, v4l2_ep.bus.mipi_csi2.data_lanes,
sizeof(csi2tx->lanes));