powerpc/powernv: Fix endian issues in OPAL ICS backend
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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@ -112,6 +112,7 @@ static int ics_opal_set_affinity(struct irq_data *d,
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bool force)
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{
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unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
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__be16 oserver;
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int16_t server;
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int8_t priority;
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int64_t rc;
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@ -120,13 +121,13 @@ static int ics_opal_set_affinity(struct irq_data *d,
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if (hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS)
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return -1;
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rc = opal_get_xive(hw_irq, &server, &priority);
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rc = opal_get_xive(hw_irq, &oserver, &priority);
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if (rc != OPAL_SUCCESS) {
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pr_err("%s: opal_set_xive(irq=%d [hw 0x%x] server=%x)"
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" error %lld\n",
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__func__, d->irq, hw_irq, server, rc);
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pr_err("%s: opal_get_xive(irq=%d [hw 0x%x]) error %lld\n",
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__func__, d->irq, hw_irq, rc);
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return -1;
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}
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server = be16_to_cpu(oserver);
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wanted_server = xics_get_irq_server(d->irq, cpumask, 1);
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if (wanted_server < 0) {
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@ -181,7 +182,7 @@ static int ics_opal_map(struct ics *ics, unsigned int virq)
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{
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unsigned int hw_irq = (unsigned int)virq_to_hw(virq);
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int64_t rc;
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int16_t server;
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__be16 server;
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int8_t priority;
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if (WARN_ON(hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS))
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@ -201,7 +202,7 @@ static int ics_opal_map(struct ics *ics, unsigned int virq)
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static void ics_opal_mask_unknown(struct ics *ics, unsigned long vec)
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{
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int64_t rc;
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int16_t server;
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__be16 server;
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int8_t priority;
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/* Check if HAL knows about this interrupt */
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@ -215,14 +216,14 @@ static void ics_opal_mask_unknown(struct ics *ics, unsigned long vec)
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static long ics_opal_get_server(struct ics *ics, unsigned long vec)
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{
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int64_t rc;
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int16_t server;
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__be16 server;
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int8_t priority;
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/* Check if HAL knows about this interrupt */
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rc = opal_get_xive(vec, &server, &priority);
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if (rc != OPAL_SUCCESS)
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return -1;
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return ics_opal_unmangle_server(server);
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return ics_opal_unmangle_server(be16_to_cpu(server));
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}
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int __init ics_opal_init(void)
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