crypto: caam - add crypto_engine support for RSA algorithms
Add crypto_engine support for RSA algorithms, to make use of the engine queue. The requests, with backlog flag, will be listed into crypto-engine queue and processed by CAAM when free. In case the queue is empty, the request is directly sent to CAAM. Only the backlog request are sent to crypto-engine since the others can be handled by CAAM, if free, especially since JR has up to 1024 entries (more than the 10 entries from crypto-engine). Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com> Reviewed-by: Horia Geantă <horia.geanta@nxp.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Iuliana Prodan
Herbert Xu
parent
1c24022667
commit
bf53795025
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@ -117,19 +117,28 @@ static void rsa_priv_f3_unmap(struct device *dev, struct rsa_edesc *edesc,
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static void rsa_pub_done(struct device *dev, u32 *desc, u32 err, void *context)
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{
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struct akcipher_request *req = context;
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struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req);
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struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
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struct rsa_edesc *edesc;
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int ecode = 0;
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if (err)
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ecode = caam_jr_strstatus(dev, err);
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edesc = container_of(desc, struct rsa_edesc, hw_desc[0]);
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edesc = req_ctx->edesc;
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rsa_pub_unmap(dev, edesc, req);
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rsa_io_unmap(dev, edesc, req);
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kfree(edesc);
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akcipher_request_complete(req, ecode);
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/*
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* If no backlog flag, the completion of the request is done
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* by CAAM, not crypto engine.
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*/
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if (!edesc->bklog)
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akcipher_request_complete(req, ecode);
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else
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crypto_finalize_akcipher_request(jrp->engine, req, ecode);
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}
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static void rsa_priv_f_done(struct device *dev, u32 *desc, u32 err,
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@ -137,15 +146,17 @@ static void rsa_priv_f_done(struct device *dev, u32 *desc, u32 err,
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{
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struct akcipher_request *req = context;
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struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req);
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struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
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struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm);
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struct caam_rsa_key *key = &ctx->key;
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struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req);
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struct rsa_edesc *edesc;
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int ecode = 0;
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if (err)
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ecode = caam_jr_strstatus(dev, err);
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edesc = container_of(desc, struct rsa_edesc, hw_desc[0]);
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edesc = req_ctx->edesc;
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switch (key->priv_form) {
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case FORM1:
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@ -161,7 +172,14 @@ static void rsa_priv_f_done(struct device *dev, u32 *desc, u32 err,
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rsa_io_unmap(dev, edesc, req);
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kfree(edesc);
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akcipher_request_complete(req, ecode);
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/*
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* If no backlog flag, the completion of the request is done
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* by CAAM, not crypto engine.
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*/
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if (!edesc->bklog)
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akcipher_request_complete(req, ecode);
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else
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crypto_finalize_akcipher_request(jrp->engine, req, ecode);
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}
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/**
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@ -309,6 +327,8 @@ static struct rsa_edesc *rsa_edesc_alloc(struct akcipher_request *req,
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edesc->src_nents = src_nents;
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edesc->dst_nents = dst_nents;
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req_ctx->edesc = edesc;
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if (!sec4_sg_bytes)
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return edesc;
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@ -339,6 +359,33 @@ src_fail:
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return ERR_PTR(-ENOMEM);
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}
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static int akcipher_do_one_req(struct crypto_engine *engine, void *areq)
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{
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struct akcipher_request *req = container_of(areq,
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struct akcipher_request,
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base);
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struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req);
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struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req);
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struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm);
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struct device *jrdev = ctx->dev;
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u32 *desc = req_ctx->edesc->hw_desc;
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int ret;
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req_ctx->edesc->bklog = true;
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ret = caam_jr_enqueue(jrdev, desc, req_ctx->akcipher_op_done, req);
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if (ret != -EINPROGRESS) {
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rsa_pub_unmap(jrdev, req_ctx->edesc, req);
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rsa_io_unmap(jrdev, req_ctx->edesc, req);
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kfree(req_ctx->edesc);
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} else {
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ret = 0;
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}
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return ret;
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}
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static int set_rsa_pub_pdb(struct akcipher_request *req,
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struct rsa_edesc *edesc)
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{
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@ -602,6 +649,53 @@ unmap_p:
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return -ENOMEM;
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}
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static int akcipher_enqueue_req(struct device *jrdev,
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void (*cbk)(struct device *jrdev, u32 *desc,
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u32 err, void *context),
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struct akcipher_request *req)
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{
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struct caam_drv_private_jr *jrpriv = dev_get_drvdata(jrdev);
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struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req);
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struct caam_rsa_ctx *ctx = akcipher_tfm_ctx(tfm);
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struct caam_rsa_key *key = &ctx->key;
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struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req);
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struct rsa_edesc *edesc = req_ctx->edesc;
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u32 *desc = edesc->hw_desc;
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int ret;
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req_ctx->akcipher_op_done = cbk;
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/*
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* Only the backlog request are sent to crypto-engine since the others
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* can be handled by CAAM, if free, especially since JR has up to 1024
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* entries (more than the 10 entries from crypto-engine).
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*/
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if (req->base.flags & CRYPTO_TFM_REQ_MAY_BACKLOG)
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ret = crypto_transfer_akcipher_request_to_engine(jrpriv->engine,
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req);
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else
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ret = caam_jr_enqueue(jrdev, desc, cbk, req);
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if ((ret != -EINPROGRESS) && (ret != -EBUSY)) {
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switch (key->priv_form) {
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case FORM1:
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rsa_priv_f1_unmap(jrdev, edesc, req);
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break;
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case FORM2:
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rsa_priv_f2_unmap(jrdev, edesc, req);
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break;
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case FORM3:
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rsa_priv_f3_unmap(jrdev, edesc, req);
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break;
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default:
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rsa_pub_unmap(jrdev, edesc, req);
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}
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rsa_io_unmap(jrdev, edesc, req);
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kfree(edesc);
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}
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return ret;
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}
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static int caam_rsa_enc(struct akcipher_request *req)
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{
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struct crypto_akcipher *tfm = crypto_akcipher_reqtfm(req);
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@ -633,11 +727,7 @@ static int caam_rsa_enc(struct akcipher_request *req)
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/* Initialize Job Descriptor */
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init_rsa_pub_desc(edesc->hw_desc, &edesc->pdb.pub);
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ret = caam_jr_enqueue(jrdev, edesc->hw_desc, rsa_pub_done, req);
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if (ret == -EINPROGRESS)
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return ret;
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rsa_pub_unmap(jrdev, edesc, req);
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return akcipher_enqueue_req(jrdev, rsa_pub_done, req);
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init_fail:
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rsa_io_unmap(jrdev, edesc, req);
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@ -666,11 +756,7 @@ static int caam_rsa_dec_priv_f1(struct akcipher_request *req)
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/* Initialize Job Descriptor */
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init_rsa_priv_f1_desc(edesc->hw_desc, &edesc->pdb.priv_f1);
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ret = caam_jr_enqueue(jrdev, edesc->hw_desc, rsa_priv_f_done, req);
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if (ret == -EINPROGRESS)
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return ret;
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rsa_priv_f1_unmap(jrdev, edesc, req);
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return akcipher_enqueue_req(jrdev, rsa_priv_f_done, req);
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init_fail:
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rsa_io_unmap(jrdev, edesc, req);
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@ -699,11 +785,7 @@ static int caam_rsa_dec_priv_f2(struct akcipher_request *req)
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/* Initialize Job Descriptor */
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init_rsa_priv_f2_desc(edesc->hw_desc, &edesc->pdb.priv_f2);
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ret = caam_jr_enqueue(jrdev, edesc->hw_desc, rsa_priv_f_done, req);
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if (ret == -EINPROGRESS)
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return ret;
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rsa_priv_f2_unmap(jrdev, edesc, req);
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return akcipher_enqueue_req(jrdev, rsa_priv_f_done, req);
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init_fail:
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rsa_io_unmap(jrdev, edesc, req);
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@ -732,11 +814,7 @@ static int caam_rsa_dec_priv_f3(struct akcipher_request *req)
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/* Initialize Job Descriptor */
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init_rsa_priv_f3_desc(edesc->hw_desc, &edesc->pdb.priv_f3);
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ret = caam_jr_enqueue(jrdev, edesc->hw_desc, rsa_priv_f_done, req);
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if (ret == -EINPROGRESS)
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return ret;
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rsa_priv_f3_unmap(jrdev, edesc, req);
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return akcipher_enqueue_req(jrdev, rsa_priv_f_done, req);
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init_fail:
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rsa_io_unmap(jrdev, edesc, req);
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@ -1029,6 +1107,8 @@ static int caam_rsa_init_tfm(struct crypto_akcipher *tfm)
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return -ENOMEM;
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}
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ctx->enginectx.op.do_one_request = akcipher_do_one_req;
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return 0;
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}
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@ -12,6 +12,7 @@
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#define _PKC_DESC_H_
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#include "compat.h"
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#include "pdb.h"
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#include <crypto/engine.h>
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/**
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* caam_priv_key_form - CAAM RSA private key representation
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@ -87,11 +88,13 @@ struct caam_rsa_key {
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/**
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* caam_rsa_ctx - per session context.
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* @enginectx : crypto engine context
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* @key : RSA key in DMA zone
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* @dev : device structure
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* @padding_dma : dma address of padding, for adding it to the input
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*/
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struct caam_rsa_ctx {
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struct crypto_engine_ctx enginectx;
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struct caam_rsa_key key;
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struct device *dev;
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dma_addr_t padding_dma;
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@ -103,11 +106,16 @@ struct caam_rsa_ctx {
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* @src : input scatterlist (stripped of leading zeros)
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* @fixup_src : input scatterlist (that might be stripped of leading zeros)
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* @fixup_src_len : length of the fixup_src input scatterlist
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* @edesc : s/w-extended rsa descriptor
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* @akcipher_op_done : callback used when operation is done
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*/
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struct caam_rsa_req_ctx {
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struct scatterlist src[2];
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struct scatterlist *fixup_src;
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unsigned int fixup_src_len;
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struct rsa_edesc *edesc;
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void (*akcipher_op_done)(struct device *jrdev, u32 *desc, u32 err,
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void *context);
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};
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/**
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@ -117,6 +125,7 @@ struct caam_rsa_req_ctx {
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* @mapped_src_nents: number of segments in input h/w link table
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* @mapped_dst_nents: number of segments in output h/w link table
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* @sec4_sg_bytes : length of h/w link table
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* @bklog : stored to determine if the request needs backlog
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* @sec4_sg_dma : dma address of h/w link table
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* @sec4_sg : pointer to h/w link table
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* @pdb : specific RSA Protocol Data Block (PDB)
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@ -128,6 +137,7 @@ struct rsa_edesc {
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int mapped_src_nents;
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int mapped_dst_nents;
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int sec4_sg_bytes;
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bool bklog;
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dma_addr_t sec4_sg_dma;
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struct sec4_sg_entry *sec4_sg;
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union {
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