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pinctrl: ocelot: add clock monitor option for LAN966x 

The SoC supports a debug clock output of its internal clocks. Depending
on the clk_sel input (GPIO_31) clk_mon (GPIO_30) will output either
cpu_clk/64 or sys_clk/64. This is very useful for debugging and is
missing in the pinmux table. Add it.

Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20220326192848.2944519-2-michael@walle.cc
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Michael Walle 2022-03-26 20:28:48 +01:00 committed by Linus Walleij
parent e97e36cd3f
commit bf3e7f49b4
1 changed files with 4 additions and 2 deletions
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6
drivers/pinctrl/pinctrl-ocelot.c
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@ -60,6 +60,7 @@ enum {
FUNC_CAN0_a,
FUNC_CAN0_b,
FUNC_CAN1,
FUNC_CLKMON,
FUNC_NONE,
FUNC_FC0_a,
FUNC_FC0_b,
@ -185,6 +186,7 @@ static const char *const ocelot_function_names[] = {
[FUNC_CAN0_a] = "can0_a",
[FUNC_CAN0_b] = "can0_b",
[FUNC_CAN1] = "can1",
[FUNC_CLKMON] = "clkmon",
[FUNC_NONE] = "none",
[FUNC_FC0_a] = "fc0_a",
[FUNC_FC0_b] = "fc0_b",
@ -982,8 +984,8 @@ LAN966X_P(26, GPIO, FC0_b, IB_TRG_a, USB_S_c, OB_TRG_a, CAN0_a, SFP_S
LAN966X_P(27, GPIO, NONE, NONE, NONE, OB_TRG_a, CAN0_a, PWM_a, R);
LAN966X_P(28, GPIO, MIIM_a, NONE, NONE, OB_TRG_a, IRQ_OUT_c, SFP_SD, R);
LAN966X_P(29, GPIO, MIIM_a, NONE, NONE, OB_TRG_a, NONE, NONE, R);
LAN966X_P(30, GPIO, FC3_c, CAN1, NONE, OB_TRG, RECO_b, NONE, R);
LAN966X_P(31, GPIO, FC3_c, CAN1, NONE, OB_TRG, RECO_b, NONE, R);
LAN966X_P(30, GPIO, FC3_c, CAN1, CLKMON, OB_TRG, RECO_b, NONE, R);
LAN966X_P(31, GPIO, FC3_c, CAN1, CLKMON, OB_TRG, RECO_b, NONE, R);
LAN966X_P(32, GPIO, FC3_c, NONE, SGPIO_a, NONE, MIIM_Sa, NONE, R);
LAN966X_P(33, GPIO, FC1_b, NONE, SGPIO_a, NONE, MIIM_Sa, MIIM_b, R);
LAN966X_P(34, GPIO, FC1_b, NONE, SGPIO_a, NONE, MIIM_Sa, MIIM_b, R);