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drm/amdgpu: simplify nv and soc21 read_register functions 

Check of the base offset for the IP exists rather than
explicitly checking for how many instances of a particular
IP there are.  This is what soc15.c already does.  Expand
this to nv.c and soc21.c.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2022-05-04 23:24:00 -04:00
parent 98f5618846
commit bf1781e17f
2 changed files with 6 additions and 6 deletions
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6
drivers/gpu/drm/amd/amdgpu/nv.c
View File

@ -392,9 +392,9 @@ static int nv_read_register(struct amdgpu_device *adev, u32 se_num,
*value = 0;
for (i = 0; i < ARRAY_SIZE(nv_allowed_read_registers); i++) {
en = &nv_allowed_read_registers[i];
if ((i == 7 && (adev->sdma.num_instances == 1)) || /* some asics don't have SDMA1 */
reg_offset !=
(adev->reg_offset[en->hwip][en->inst][en->seg] + en->reg_offset))
if (adev->reg_offset[en->hwip][en->inst] &&
reg_offset != (adev->reg_offset[en->hwip][en->inst][en->seg]
+ en->reg_offset))
continue;
*value = nv_get_register_value(adev,

6
drivers/gpu/drm/amd/amdgpu/soc21.c
View File

@ -252,9 +252,9 @@ static int soc21_read_register(struct amdgpu_device *adev, u32 se_num,
*value = 0;
for (i = 0; i < ARRAY_SIZE(soc21_allowed_read_registers); i++) {
en = &soc21_allowed_read_registers[i];
if ((i == 7 && (adev->sdma.num_instances == 1)) || /* some asics don't have SDMA1 */
reg_offset !=
(adev->reg_offset[en->hwip][en->inst][en->seg] + en->reg_offset))
if (adev->reg_offset[en->hwip][en->inst] &&
reg_offset != (adev->reg_offset[en->hwip][en->inst][en->seg]
+ en->reg_offset))
continue;
*value = soc21_get_register_value(adev,