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drm/amdgpu: use gpu virtual address for interrupt packet write space for vangogh 

The interrupts are not stable while uses guest physical address (GPA)
for interrupt packet write space even on direct loading case.

v2: make condition more readable

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Huang Rui 2020-07-09 11:32:50 +08:00 committed by Alex Deucher
parent bd4f28117e
commit bf13cb1f46
1 changed files with 5 additions and 2 deletions
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7
drivers/gpu/drm/amd/amdgpu/navi10_ih.c
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@ -661,8 +661,11 @@ static int navi10_ih_sw_init(void *handle)
/* use gpu virtual address for ih ring
* until ih_checken is programmed to allow
* use bus address for ih ring by psp bl */
use_bus_addr =
(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) ? false : true;
if ((adev->flags & AMD_IS_APU) ||
(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP))
use_bus_addr = false;
else
use_bus_addr = true;
r = amdgpu_ih_ring_init(adev, &adev->irq.ih, 256 * 1024, use_bus_addr);
if (r)
return r;