s390/nospec: move to single register thunks

Assembler generated expoline thunks were in a form
__s390_indirect_jump_rXuse_rX when exrl instruction has not been available.

Now with z10 as minimum supported machine generation there
is no need for 2 register thunks, always generate
__s390_indirect_jump_rX versions.

Acked-by: Heiko Carstens <hca@linux.ibm.com>
Acked-by: Sumanth Korikkar <sumanthk@linux.ibm.com>
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
This commit is contained in:
Vasily Gorbik 2022-02-25 10:18:14 +01:00
parent 4efd417f29
commit bedc96698f
1 changed files with 33 additions and 41 deletions

View File

@ -37,28 +37,41 @@
.popsection
.endm
.macro __THUNK_PROLOG_BR r1,r2
.macro __THUNK_PROLOG_BR r1
__THUNK_PROLOG_NAME __s390_indirect_jump_r\r1
.endm
.macro __THUNK_EPILOG_BR r1,r2
.macro __THUNK_EPILOG_BR r1
__THUNK_EPILOG_NAME __s390_indirect_jump_r\r1
.endm
.macro __THUNK_BR r1,r2
.macro __THUNK_BR r1
jg __s390_indirect_jump_r\r1
.endm
.macro __THUNK_BRASL r1,r2,r3
.macro __THUNK_BRASL r1,r2
brasl \r1,__s390_indirect_jump_r\r2
.endm
.macro __DECODE_RR expand,reg,ruse
.macro __DECODE_R expand,reg
.set __decode_fail,1
.irp r1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
.ifc \reg,%r\r1
\expand \r1
.set __decode_fail,0
.endif
.endr
.if __decode_fail == 1
.error "__DECODE_R failed"
.endif
.endm
.macro __DECODE_RR expand,rsave,rtarget
.set __decode_fail,1
.irp r1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
.ifc \rsave,%r\r1
.irp r2,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
.ifc \ruse,%r\r2
.ifc \rtarget,%r\r2
\expand \r1,\r2
.set __decode_fail,0
.endif
@ -70,68 +83,47 @@
.endif
.endm
.macro __DECODE_RRR expand,rsave,rtarget,ruse
.set __decode_fail,1
.irp r1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
.ifc \rsave,%r\r1
.irp r2,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
.ifc \rtarget,%r\r2
.irp r3,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
.ifc \ruse,%r\r3
\expand \r1,\r2,\r3
.set __decode_fail,0
.endif
.endr
.endif
.endr
.endif
.endr
.if __decode_fail == 1
.error "__DECODE_RRR failed"
.endif
.endm
.macro __THUNK_EX_BR reg,ruse
.macro __THUNK_EX_BR reg
exrl 0,555f
j .
555: br \reg
.endm
#ifdef CONFIG_EXPOLINE_EXTERN
.macro GEN_BR_THUNK reg,ruse=%r1
.macro GEN_BR_THUNK reg
.endm
.macro GEN_BR_THUNK_EXTERN reg,ruse=%r1
.macro GEN_BR_THUNK_EXTERN reg
#else
.macro GEN_BR_THUNK reg,ruse=%r1
.macro GEN_BR_THUNK reg
#endif
__DECODE_RR __THUNK_PROLOG_BR,\reg,\ruse
__THUNK_EX_BR \reg,\ruse
__DECODE_RR __THUNK_EPILOG_BR,\reg,\ruse
__DECODE_R __THUNK_PROLOG_BR,\reg
__THUNK_EX_BR \reg
__DECODE_R __THUNK_EPILOG_BR,\reg
.endm
.macro BR_EX reg,ruse=%r1
557: __DECODE_RR __THUNK_BR,\reg,\ruse
.macro BR_EX reg
557: __DECODE_R __THUNK_BR,\reg
.pushsection .s390_indirect_branches,"a",@progbits
.long 557b-.
.popsection
.endm
.macro BASR_EX rsave,rtarget,ruse=%r1
559: __DECODE_RRR __THUNK_BRASL,\rsave,\rtarget,\ruse
.macro BASR_EX rsave,rtarget
559: __DECODE_RR __THUNK_BRASL,\rsave,\rtarget
.pushsection .s390_indirect_branches,"a",@progbits
.long 559b-.
.popsection
.endm
#else
.macro GEN_BR_THUNK reg,ruse=%r1
.macro GEN_BR_THUNK reg
.endm
.macro BR_EX reg,ruse=%r1
.macro BR_EX reg
br \reg
.endm
.macro BASR_EX rsave,rtarget,ruse=%r1
.macro BASR_EX rsave,rtarget
basr \rsave,\rtarget
.endm
#endif /* CC_USING_EXPOLINE */