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Qualcomm ARM DT updates for v6.3 

This introduces support for Acer Iconia Talk S A1-724
 
 The Samsung Galaxy Tab 4 10.1 gains ADSP and backlight support.
 
 The Xperia Z2 Tablet gets charging enabled and the touchscreen is given
 a little bit more time to start up.
 
 APQ8064 and MSM8974 gains improvements in clock hierarchy. APQ8064
 thermal sensor (tsens) driver gains per-censor calibration data.
 
 Lastly a set of patches that improves DT binding compliance.
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Merge tag 'qcom-dts-for-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm ARM DT updates for v6.3

This introduces support for Acer Iconia Talk S A1-724

The Samsung Galaxy Tab 4 10.1 gains ADSP and backlight support.

The Xperia Z2 Tablet gets charging enabled and the touchscreen is given
a little bit more time to start up.

APQ8064 and MSM8974 gains improvements in clock hierarchy. APQ8064
thermal sensor (tsens) driver gains per-censor calibration data.

Lastly a set of patches that improves DT binding compliance.

* tag 'qcom-dts-for-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (50 commits)
  ARM: dts: qcom: msm8226: add RPMCC node
  ARM: dts: qcom: apq8084: add clocks and clock-names to gcc device
  ARM: dts: qcom: align OPP table node name with DT schema
  ARM: dts: qcom: rename mdp nodes to display-controller
  ARM: dts: qcom-msm8974: rename mdss node to display-subsystem
  ARM: dts: qcom-msm8974: add SoC specific compat string to mdp5 node
  dt-bindings: qcom: Document samsung,gt58 and gt510
  dt-bindings: qcom: Document bindings for msm8916-samsung-j5x
  ARM: dts: qcom: use qcom,gsi-loader for IPA
  ARM: dts: qcom-apq8084: specify per-sensor calibration cells
  ARM: dts: qcom-msm8974: specify per-sensor calibration cells
  dt-bindings: arm: qcom: Document MSM8939 SoC binding
  ARM: dts: qcom: msm8974: add xo clock to rpm clock controller
  dt-bindings: qcom: Document msm8916-gplus-fl8005a
  dt-bindings: vendor-prefixes: Add GPLUS
  ARM: dts: qcom: apq8026-samsung-matisse-wifi: Add display backlight
  dt-bindings: arm: qcom: Add SM6115(P) and Lenovo Tab P11
  ARM: dts: qcom: add missing space before {
  dt-bindings: arm: qcom: add board-id/msm-id for MSM8956, SDM636 and SM4250
  dt-bindings: arm: qcom: Add zombie with NVMe
  ...

Link: https://lore.kernel.org/r/20230126174725.3681745-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2023-01-30 17:47:00 +01:00
parent 42bea43c1f 34d50b12d6
commit be836a16f4
24 changed files with 1342 additions and 95 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

63
Documentation/devicetree/bindings/arm/qcom.yaml
View File

@ -35,6 +35,8 @@ description: |
mdm9615
msm8226
msm8916
msm8939
msm8953
msm8956
msm8974
msm8976
@ -52,6 +54,7 @@ description: |
sc8180x
sc8280xp
sda660
sdm450
sdm630
sdm632
sdm636
@ -62,6 +65,7 @@ description: |
sdx65
sm4250
sm6115
sm6115p
sm6125
sm6350
sm6375
@ -70,6 +74,7 @@ description: |
sm8250
sm8350
sm8450
sm8550
The 'board' element must be one of the following strings:
@ -160,6 +165,12 @@ properties:
- samsung,s3ve3g
- const: qcom,msm8226
- items:
- enum:
- sony,kanuti-tulip
- square,apq8039-t2
- const: qcom,msm8939
- items:
- enum:
- sony,kugo-row
@ -194,8 +205,10 @@ properties:
- items:
- enum:
- acer,a1-724
- alcatel,idol347
- asus,z00l
- gplus,fl8005a
- huawei,g7
- longcheer,l8910
- samsung,a3u-eur
@ -203,7 +216,10 @@ properties:
- samsung,e5
- samsung,e7
- samsung,grandmax
- samsung,gt510
- samsung,gt58
- samsung,j5
- samsung,j5x
- samsung,serranove
- wingtech,wt88047
- const: qcom,msm8916
@ -213,6 +229,15 @@ properties:
- const: qcom,msm8916-v1-qrd/9-v1
- const: qcom,msm8916
- items:
- enum:
- motorola,potter
- xiaomi,daisy
- xiaomi,mido
- xiaomi,tissot
- xiaomi,vince
- const: qcom,msm8953
- items:
- enum:
- lg,bullhead
@ -679,6 +704,18 @@ properties:
- const: google,zombie-sku512
- const: qcom,sc7280
- description: Google Zombie with NVMe (newest rev)
items:
- const: google,zombie-sku2
- const: google,zombie-sku3
- const: google,zombie-sku515
- const: qcom,sc7280
- description: Google Zombie with LTE and NVMe (newest rev)
items:
- const: google,zombie-sku514
- const: qcom,sc7280
- items:
- enum:
- lenovo,flex-5g
@ -693,6 +730,11 @@ properties:
- qcom,sc8280xp-qrd
- const: qcom,sc8280xp
- items:
- enum:
- motorola,ali
- const: qcom,sdm450
- items:
- enum:
- sony,discovery-row
@ -709,6 +751,7 @@ properties:
- items:
- enum:
- fairphone,fp3
- motorola,ocean
- const: qcom,sdm632
- items:
@ -790,6 +833,12 @@ properties:
- oneplus,billie2
- const: qcom,sm4250
- items:
- enum:
- lenovo,j606f
- const: qcom,sm6115p
- const: qcom,sm6115
- items:
- enum:
- sony,pdx201
@ -845,6 +894,11 @@ properties:
- sony,pdx224
- const: qcom,sm8450
- items:
- enum:
- qcom,sm8550-mtp
- const: qcom,sm8550
# Board compatibles go above
qcom,msm-id:
@ -922,15 +976,22 @@ allOf:
- qcom,apq8026
- qcom,apq8094
- qcom,apq8096
- qcom,msm8939
- qcom,msm8953
- qcom,msm8956
- qcom,msm8992
- qcom,msm8994
- qcom,msm8996
- qcom,msm8998
- qcom,sdm450
- qcom,sdm630
- qcom,sdm632
- qcom,sdm636
- qcom,sdm845
- qcom,sdx55
- qcom,sdx65
- qcom,sm4250
- qcom,sm6115
- qcom,sm6125
- qcom,sm6350
- qcom,sm7225
@ -954,6 +1015,8 @@ allOf:
- oneplus,dumpling
- oneplus,enchilada
- oneplus,fajita
- oneplus,oneplus3
- oneplus,oneplus3t
then:
properties:
qcom,board-id:

2
Documentation/devicetree/bindings/vendor-prefixes.yaml
View File

@ -512,6 +512,8 @@ patternProperties:
description: Shenzhen Huiding Technology Co., Ltd.
"^google,.*":
description: Google, Inc.
"^gplus,.*":
description: GPLUS
"^grinn,.*":
description: Grinn
"^grmn,.*":

71
arch/arm/boot/dts/qcom-apq8026-samsung-matisse-wifi.dts
View File

@ -9,6 +9,9 @@
#include "qcom-msm8226.dtsi"
#include "qcom-pm8226.dtsi"
/delete-node/ &adsp_region;
/delete-node/ &smem_region;
/ {
model = "Samsung Galaxy Tab 4 10.1";
compatible = "samsung,matisse-wifi", "qcom,apq8026";
@ -77,6 +80,55 @@
};
};
i2c-backlight {
compatible = "i2c-gpio";
sda-gpios = <&tlmm 20 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
scl-gpios = <&tlmm 21 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
pinctrl-0 = <&backlight_i2c_default_state>;
pinctrl-names = "default";
i2c-gpio,delay-us = <4>;
#address-cells = <1>;
#size-cells = <0>;
backlight@2c {
compatible = "ti,lp8556";
reg = <0x2c>;
dev-ctrl = /bits/ 8 <0x80>;
init-brt = /bits/ 8 <0x3f>;
pwm-period = <100000>;
pwms = <&backlight_pwm 0 100000>;
pwm-names = "lp8556";
rom-a0h {
rom-addr = /bits/ 8 <0xa0>;
rom-val = /bits/ 8 <0x44>;
};
rom-a1h {
rom-addr = /bits/ 8 <0xa1>;
rom-val = /bits/ 8 <0x6c>;
};
rom-a5h {
rom-addr = /bits/ 8 <0xa5>;
rom-val = /bits/ 8 <0x24>;
};
};
};
backlight_pwm: pwm {
compatible = "clk-pwm";
#pwm-cells = <2>;
clocks = <&mmcc CAMSS_GP0_CLK>;
pinctrl-0 = <&backlight_pwm_default_state>;
pinctrl-names = "default";
};
reg_tsp_1p8v: regulator-tsp-1p8v {
compatible = "regulator-fixed";
regulator-name = "tsp_1p8v";
@ -133,7 +185,7 @@
no-map;
};
adsp@d900000 {
adsp_region: adsp@d900000 {
reg = <0x0d900000 0x1800000>;
no-map;
};
@ -143,7 +195,6 @@
no-map;
};
/delete-node/ smem@3000000;
smem_region: smem@fa00000 {
reg = <0x0fa00000 0x100000>;
no-map;
@ -169,6 +220,10 @@
};
};
&adsp {
status = "okay";
};
&blsp1_i2c2 {
status = "okay";
@ -412,6 +467,18 @@
bias-disable;
};
backlight_i2c_default_state: backlight-i2c-default-state {
pins = "gpio20", "gpio21";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
backlight_pwm_default_state: backlight-pwm-default-state {
pins = "gpio33";
function = "gp0_clk";
};
muic_int_default_state: muic-int-default-state {
pins = "gpio67";
function = "gpio";

2
arch/arm/boot/dts/qcom-apq8064-asus-nexus7-flo.dts
View File

@ -22,7 +22,7 @@
#size-cells = <1>;
ranges;
ramoops@88d00000{
ramoops@88d00000 {
compatible = "ramoops";
reg = <0x88d00000 0x100000>;
record-size = <0x00020000>;

18
arch/arm/boot/dts/qcom-apq8064.dtsi
View File

@ -375,14 +375,13 @@
};
timer@200a000 {
compatible = "qcom,kpss-timer",
"qcom,kpss-wdt-apq8064", "qcom,msm-timer";
compatible = "qcom,kpss-wdt-apq8064", "qcom,kpss-timer",
"qcom,msm-timer";
interrupts = <1 1 0x301>,
<1 2 0x301>,
<1 3 0x301>;
reg = <0x0200a000 0x100>;
clock-frequency = <27000000>,
<32768>;
clock-frequency = <27000000>;
cpu-offset = <0x80000>;
};
@ -1102,7 +1101,7 @@
dma-names = "tx", "rx";
};
sdcc3bam: dma-controller@12182000{
sdcc3bam: dma-controller@12182000 {
compatible = "qcom,bam-v1.3.0";
reg = <0x12182000 0x8000>;
interrupts = <0 96 IRQ_TYPE_LEVEL_HIGH>;
@ -1130,7 +1129,7 @@
pinctrl-0 = <&sdc4_gpios>;
};
sdcc4bam: dma-controller@121c2000{
sdcc4bam: dma-controller@121c2000 {
compatible = "qcom,bam-v1.3.0";
reg = <0x121c2000 0x8000>;
interrupts = <0 95 IRQ_TYPE_LEVEL_HIGH>;
@ -1159,7 +1158,7 @@
dma-names = "tx", "rx";
};
sdcc1bam: dma-controller@12402000{
sdcc1bam: dma-controller@12402000 {
compatible = "qcom,bam-v1.3.0";
reg = <0x12402000 0x8000>;
interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
@ -1277,7 +1276,8 @@
};
dsi0: dsi@4700000 {
compatible = "qcom,mdss-dsi-ctrl";
compatible = "qcom,apq8064-dsi-ctrl",
"qcom,mdss-dsi-ctrl";
label = "MDSS DSI CTRL->0";
#address-cells = <1>;
#size-cells = <0>;
@ -1493,7 +1493,7 @@
status = "disabled";
};
mdp: mdp@5100000 {
mdp: display-controller@5100000 {
compatible = "qcom,mdp4";
reg = <0x05100000 0xf0000>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;

22
arch/arm/boot/dts/qcom-apq8084-ifc6540.dts
View File

@ -19,16 +19,16 @@
serial@f995e000 {
status = "okay";
};
sdhci@f9824900 {
bus-width = <8>;
non-removable;
status = "okay";
};
sdhci@f98a4900 {
cd-gpios = <&tlmm 122 GPIO_ACTIVE_LOW>;
bus-width = <4>;
};
};
};
&sdhc_1 {
bus-width = <8>;
non-removable;
status = "okay";
};
&sdhc_2 {
cd-gpios = <&tlmm 122 GPIO_ACTIVE_LOW>;
bus-width = <4>;
};

335
arch/arm/boot/dts/qcom-apq8084.dtsi
View File

@ -249,11 +249,260 @@
reg = <0xfc4bc000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
tsens_calib: calib@d0 {
reg = <0xd0 0x18>;
tsens_base1: base1@d0 {
reg = <0xd0 0x1>;
bits = <0 8>;
};
tsens_backup: backup@440 {
reg = <0x440 0x10>;
tsens_s0_p1: s0-p1@d1 {
reg = <0xd1 0x1>;
bits = <0 6>;
};
tsens_s1_p1: s1-p1@d2 {
reg = <0xd1 0x2>;
bits = <6 6>;
};
tsens_s2_p1: s2-p1@d2 {
reg = <0xd2 0x2>;
bits = <4 6>;
};
tsens_s3_p1: s3-p1@d3 {
reg = <0xd3 0x1>;
bits = <2 6>;
};
tsens_s4_p1: s4-p1@d4 {
reg = <0xd4 0x1>;
bits = <0 6>;
};
tsens_s5_p1: s5-p1@d4 {
reg = <0xd4 0x2>;
bits = <6 6>;
};
tsens_s6_p1: s6-p1@d5 {
reg = <0xd5 0x2>;
bits = <4 6>;
};
tsens_s7_p1: s7-p1@d6 {
reg = <0xd6 0x1>;
bits = <2 6>;
};
tsens_s8_p1: s8-p1@d7 {
reg = <0xd7 0x1>;
bits = <0 6>;
};
tsens_mode: mode@d7 {
reg = <0xd7 0x1>;
bits = <6 2>;
};
tsens_s9_p1: s9-p1@d8 {
reg = <0xd8 0x1>;
bits = <0 6>;
};
tsens_s10_p1: s10_p1@d8 {
reg = <0xd8 0x2>;
bits = <6 6>;
};
tsens_base2: base2@d9 {
reg = <0xd9 0x2>;
bits = <4 8>;
};
tsens_s0_p2: s0-p2@da {
reg = <0xda 0x2>;
bits = <4 6>;
};
tsens_s1_p2: s1-p2@db {
reg = <0xdb 0x1>;
bits = <2 6>;
};
tsens_s2_p2: s2-p2@dc {
reg = <0xdc 0x1>;
bits = <0 6>;
};
tsens_s3_p2: s3-p2@dc {
reg = <0xdc 0x2>;
bits = <6 6>;
};
tsens_s4_p2: s4-p2@dd {
reg = <0xdd 0x2>;
bits = <4 6>;
};
tsens_s5_p2: s5-p2@de {
reg = <0xde 0x2>;
bits = <2 6>;
};
tsens_s6_p2: s6-p2@df {
reg = <0xdf 0x1>;
bits = <0 6>;
};
tsens_s7_p2: s7-p2@e0 {
reg = <0xe0 0x1>;
bits = <0 6>;
};
tsens_s8_p2: s8-p2@e0 {
reg = <0xe0 0x2>;
bits = <6 6>;
};
tsens_s9_p2: s9-p2@e1 {
reg = <0xe1 0x2>;
bits = <4 6>;
};
tsens_s10_p2: s10_p2@e2 {
reg = <0xe2 0x2>;
bits = <2 6>;
};
tsens_s5_p2_backup: s5-p2_backup@e3 {
reg = <0xe3 0x2>;
bits = <0 6>;
};
tsens_mode_backup: mode_backup@e3 {
reg = <0xe3 0x1>;
bits = <6 2>;
};
tsens_s6_p2_backup: s6-p2_backup@e4 {
reg = <0xe4 0x1>;
bits = <0 6>;
};
tsens_s7_p2_backup: s7-p2_backup@e4 {
reg = <0xe4 0x2>;
bits = <6 6>;
};
tsens_s8_p2_backup: s8-p2_backup@e5 {
reg = <0xe5 0x2>;
bits = <4 6>;
};
tsens_s9_p2_backup: s9-p2_backup@e6 {
reg = <0xe6 0x2>;
bits = <2 6>;
};
tsens_s10_p2_backup: s10_p2_backup@e7 {
reg = <0xe7 0x1>;
bits = <0 6>;
};
tsens_base1_backup: base1_backup@440 {
reg = <0x440 0x1>;
bits = <0 8>;
};
tsens_s0_p1_backup: s0-p1_backup@441 {
reg = <0x441 0x1>;
bits = <0 6>;
};
tsens_s1_p1_backup: s1-p1_backup@442 {
reg = <0x441 0x2>;
bits = <6 6>;
};
tsens_s2_p1_backup: s2-p1_backup@442 {
reg = <0x442 0x2>;
bits = <4 6>;
};
tsens_s3_p1_backup: s3-p1_backup@443 {
reg = <0x443 0x1>;
bits = <2 6>;
};
tsens_s4_p1_backup: s4-p1_backup@444 {
reg = <0x444 0x1>;
bits = <0 6>;
};
tsens_s5_p1_backup: s5-p1_backup@444 {
reg = <0x444 0x2>;
bits = <6 6>;
};
tsens_s6_p1_backup: s6-p1_backup@445 {
reg = <0x445 0x2>;
bits = <4 6>;
};
tsens_s7_p1_backup: s7-p1_backup@446 {
reg = <0x446 0x1>;
bits = <2 6>;
};
tsens_use_backup: use_backup@447 {
reg = <0x447 0x1>;
bits = <5 3>;
};
tsens_s8_p1_backup: s8-p1_backup@448 {
reg = <0x448 0x1>;
bits = <0 6>;
};
tsens_s9_p1_backup: s9-p1_backup@448 {
reg = <0x448 0x2>;
bits = <6 6>;
};
tsens_s10_p1_backup: s10_p1_backup@449 {
reg = <0x449 0x2>;
bits = <4 6>;
};
tsens_base2_backup: base2_backup@44a {
reg = <0x44a 0x2>;
bits = <2 8>;
};
tsens_s0_p2_backup: s0-p2_backup@44b {
reg = <0x44b 0x3>;
bits = <2 6>;
};
tsens_s1_p2_backup: s1-p2_backup@44c {
reg = <0x44c 0x1>;
bits = <0 6>;
};
tsens_s2_p2_backup: s2-p2_backup@44c {
reg = <0x44c 0x2>;
bits = <6 6>;
};
tsens_s3_p2_backup: s3-p2_backup@44d {
reg = <0x44d 0x2>;
bits = <4 6>;
};
tsens_s4_p2_backup: s4-p2_backup@44e {
reg = <0x44e 0x1>;
bits = <2 6>;
};
};
@ -261,8 +510,60 @@
compatible = "qcom,msm8974-tsens", "qcom,tsens-v0_1";
reg = <0xfc4a9000 0x1000>, /* TM */
<0xfc4a8000 0x1000>; /* SROT */
nvmem-cells = <&tsens_calib>, <&tsens_backup>;
nvmem-cell-names = "calib", "calib_backup";
nvmem-cells = <&tsens_mode>,
<&tsens_base1>, <&tsens_base2>,
<&tsens_use_backup>,
<&tsens_mode_backup>,
<&tsens_base1_backup>, <&tsens_base2_backup>,
<&tsens_s0_p1>, <&tsens_s0_p2>,
<&tsens_s1_p1>, <&tsens_s1_p2>,
<&tsens_s2_p1>, <&tsens_s2_p2>,
<&tsens_s3_p1>, <&tsens_s3_p2>,
<&tsens_s4_p1>, <&tsens_s4_p2>,
<&tsens_s5_p1>, <&tsens_s5_p2>,
<&tsens_s6_p1>, <&tsens_s6_p2>,
<&tsens_s7_p1>, <&tsens_s7_p2>,
<&tsens_s8_p1>, <&tsens_s8_p2>,
<&tsens_s9_p1>, <&tsens_s9_p2>,
<&tsens_s10_p1>, <&tsens_s10_p2>,
<&tsens_s0_p1_backup>, <&tsens_s0_p2_backup>,
<&tsens_s1_p1_backup>, <&tsens_s1_p2_backup>,
<&tsens_s2_p1_backup>, <&tsens_s2_p2_backup>,
<&tsens_s3_p1_backup>, <&tsens_s3_p2_backup>,
<&tsens_s4_p1_backup>, <&tsens_s4_p2_backup>,
<&tsens_s5_p1_backup>, <&tsens_s5_p2_backup>,
<&tsens_s6_p1_backup>, <&tsens_s6_p2_backup>,
<&tsens_s7_p1_backup>, <&tsens_s7_p2_backup>,
<&tsens_s8_p1_backup>, <&tsens_s8_p2_backup>,
<&tsens_s9_p1_backup>, <&tsens_s9_p2_backup>,
<&tsens_s10_p1_backup>, <&tsens_s10_p2_backup>;
nvmem-cell-names = "mode",
"base1", "base2",
"use_backup",
"mode_backup",
"base1_backup", "base2_backup",
"s0_p1", "s0_p2",
"s1_p1", "s1_p2",
"s2_p1", "s2_p2",
"s3_p1", "s3_p2",
"s4_p1", "s4_p2",
"s5_p1", "s5_p2",
"s6_p1", "s6_p2",
"s7_p1", "s7_p2",
"s8_p1", "s8_p2",
"s9_p1", "s9_p2",
"s10_p1", "s10_p2",
"s0_p1_backup", "s0_p2_backup",
"s1_p1_backup", "s1_p2_backup",
"s2_p1_backup", "s2_p2_backup",
"s3_p1_backup", "s3_p2_backup",
"s4_p1_backup", "s4_p2_backup",
"s5_p1_backup", "s5_p2_backup",
"s6_p1_backup", "s6_p2_backup",
"s7_p1_backup", "s7_p2_backup",
"s8_p1_backup", "s8_p2_backup",
"s9_p1_backup", "s9_p2_backup",
"s10_p1_backup", "s10_p2_backup";
#qcom,sensors = <11>;
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "uplow";
@ -388,6 +689,24 @@
#reset-cells = <1>;
#power-domain-cells = <1>;
reg = <0xfc400000 0x4000>;
clocks = <&xo_board>,
<&sleep_clk>,
<0>, /* ufs */
<0>,
<0>,
<0>,
<0>, /* sata */
<0>,
<0>; /* pcie */
clock-names = "xo",
"sleep_clk",
"ufs_rx_symbol_0_clk_src",
"ufs_rx_symbol_1_clk_src",
"ufs_tx_symbol_0_clk_src",
"ufs_tx_symbol_1_clk_src",
"sata_asic0_clk",
"sata_rx_clk",
"pcie_pipe";
};
tcsr_mutex: hwlock@fd484000 {
@ -421,7 +740,7 @@
status = "disabled";
};
mmc@f9824900 {
sdhc_1: mmc@f9824900 {
compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
reg-names = "hc", "core";
@ -434,7 +753,7 @@
status = "disabled";
};
mmc@f98a4900 {
sdhc_2: mmc@f98a4900 {
compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
reg-names = "hc", "core";

2
arch/arm/boot/dts/qcom-ipq4019.dtsi
View File

@ -400,7 +400,7 @@
};
watchdog: watchdog@b017000 {
compatible = "qcom,kpss-wdt", "qcom,kpss-wdt-ipq4019";
compatible = "qcom,kpss-wdt-ipq4019", "qcom,kpss-wdt";
reg = <0xb017000 0x40>;
clocks = <&sleep_clk>;
timeout-sec = <10>;

7
arch/arm/boot/dts/qcom-ipq8064.dtsi
View File

@ -549,8 +549,8 @@
};
timer@200a000 {
compatible = "qcom,kpss-timer",
"qcom,kpss-wdt-ipq8064", "qcom,msm-timer";
compatible = "qcom,kpss-wdt-ipq8064", "qcom,kpss-timer",
"qcom,msm-timer";
interrupts = <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(2) |
IRQ_TYPE_EDGE_RISING)>,
<GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(2) |
@ -562,8 +562,7 @@
<GIC_PPI 5 (GIC_CPU_MASK_SIMPLE(2) |
IRQ_TYPE_EDGE_RISING)>;
reg = <0x0200a000 0x100>;
clock-frequency = <25000000>,
<32768>;
clock-frequency = <25000000>;
clocks = <&sleep_clk>;
clock-names = "sleep";
cpu-offset = <0x80000>;

10
arch/arm/boot/dts/qcom-mdm9615.dtsi
View File

@ -79,13 +79,13 @@
};
timer@200a000 {
compatible = "qcom,kpss-timer", "qcom,msm-timer";
compatible = "qcom,kpss-wdt-mdm9615", "qcom,kpss-timer",
"qcom,msm-timer";
interrupts = <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_EDGE_RISING)>,
<GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_EDGE_RISING)>,
<GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_EDGE_RISING)>;
reg = <0x0200a000 0x100>;
clock-frequency = <27000000>,
<32768>;
clock-frequency = <27000000>;
cpu-offset = <0x80000>;
};
@ -294,7 +294,7 @@
};
};
sdcc1bam: dma-controller@12182000{
sdcc1bam: dma-controller@12182000 {
compatible = "qcom,bam-v1.3.0";
reg = <0x12182000 0x8000>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
@ -304,7 +304,7 @@
qcom,ee = <0>;
};
sdcc2bam: dma-controller@12142000{
sdcc2bam: dma-controller@12142000 {
compatible = "qcom,bam-v1.3.0";
reg = <0x12142000 0x8000>;
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;

7
arch/arm/boot/dts/qcom-msm8226.dtsi
View File

@ -74,6 +74,13 @@
compatible = "qcom,rpm-msm8226";
qcom,smd-channels = "rpm_requests";
rpmcc: clock-controller {
compatible = "qcom,rpmcc-msm8226", "qcom,rpmcc";
#clock-cells = <1>;
clocks = <&xo_board>;
clock-names = "xo";
};
rpmpd: power-controller {
compatible = "qcom,msm8226-rpmpd";
#power-domain-cells = <1>;

7
arch/arm/boot/dts/qcom-msm8960.dtsi
View File

@ -103,14 +103,13 @@
};
timer@200a000 {
compatible = "qcom,kpss-timer",
"qcom,kpss-wdt-msm8960", "qcom,msm-timer";
compatible = "qcom,kpss-wdt-msm8960", "qcom,kpss-timer",
"qcom,msm-timer";
interrupts = <GIC_PPI 1 0x301>,
<GIC_PPI 2 0x301>,
<GIC_PPI 3 0x301>;
reg = <0x0200a000 0x100>;
clock-frequency = <27000000>,
<32768>;
clock-frequency = <27000000>;
cpu-offset = <0x80000>;
};

11
arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
View File

@ -319,6 +319,17 @@
};
};
&remoteproc_adsp {
cx-supply = <&pm8841_s2>;
};
&remoteproc_mss {
cx-supply = <&pm8841_s2>;
mss-supply = <&pm8841_s3>;
mx-supply = <&pm8841_s1>;
pll-supply = <&pm8941_l12>;
};
&rpm_requests {
regulators-0 {
compatible = "qcom,rpm-pm8841-regulators";

11
arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi
View File

@ -188,6 +188,17 @@
qcom,num-strings = <2>;
};
&remoteproc_adsp {
cx-supply = <&pm8841_s2>;
};
&remoteproc_mss {
cx-supply = <&pm8841_s2>;
mss-supply = <&pm8841_s3>;
mx-supply = <&pm8841_s1>;
pll-supply = <&pm8941_l12>;
};
&rpm_requests {
regulators-0 {
compatible = "qcom,rpm-pm8841-regulators";

431
arch/arm/boot/dts/qcom-msm8974.dtsi
View File

@ -307,6 +307,8 @@
rpmcc: clock-controller {
compatible = "qcom,rpmcc-msm8974", "qcom,rpmcc";
#clock-cells = <1>;
clocks = <&xo_board>;
clock-names = "xo";
};
};
};
@ -1054,6 +1056,11 @@
#reset-cells = <1>;
#power-domain-cells = <1>;
reg = <0xfc400000 0x4000>;
clocks = <&xo_board>,
<&sleep_clk>;
clock-names = "xo",
"sleep_clk";
};
rpm_msg_ram: sram@fc428000 {
@ -1119,8 +1126,60 @@
compatible = "qcom,msm8974-tsens", "qcom,tsens-v0_1";
reg = <0xfc4a9000 0x1000>, /* TM */
<0xfc4a8000 0x1000>; /* SROT */
nvmem-cells = <&tsens_calib>, <&tsens_backup>;
nvmem-cell-names = "calib", "calib_backup";
nvmem-cells = <&tsens_mode>,
<&tsens_base1>, <&tsens_base2>,
<&tsens_use_backup>,
<&tsens_mode_backup>,
<&tsens_base1_backup>, <&tsens_base2_backup>,
<&tsens_s0_p1>, <&tsens_s0_p2>,
<&tsens_s1_p1>, <&tsens_s1_p2>,
<&tsens_s2_p1>, <&tsens_s2_p2>,
<&tsens_s3_p1>, <&tsens_s3_p2>,
<&tsens_s4_p1>, <&tsens_s4_p2>,
<&tsens_s5_p1>, <&tsens_s5_p2>,
<&tsens_s6_p1>, <&tsens_s6_p2>,
<&tsens_s7_p1>, <&tsens_s7_p2>,
<&tsens_s8_p1>, <&tsens_s8_p2>,
<&tsens_s9_p1>, <&tsens_s9_p2>,
<&tsens_s10_p1>, <&tsens_s10_p2>,
<&tsens_s0_p1_backup>, <&tsens_s0_p2_backup>,
<&tsens_s1_p1_backup>, <&tsens_s1_p2_backup>,
<&tsens_s2_p1_backup>, <&tsens_s2_p2_backup>,
<&tsens_s3_p1_backup>, <&tsens_s3_p2_backup>,
<&tsens_s4_p1_backup>, <&tsens_s4_p2_backup>,
<&tsens_s5_p1_backup>, <&tsens_s5_p2_backup>,
<&tsens_s6_p1_backup>, <&tsens_s6_p2_backup>,
<&tsens_s7_p1_backup>, <&tsens_s7_p2_backup>,
<&tsens_s8_p1_backup>, <&tsens_s8_p2_backup>,
<&tsens_s9_p1_backup>, <&tsens_s9_p2_backup>,
<&tsens_s10_p1_backup>, <&tsens_s10_p2_backup>;
nvmem-cell-names = "mode",
"base1", "base2",
"use_backup",
"mode_backup",
"base1_backup", "base2_backup",
"s0_p1", "s0_p2",
"s1_p1", "s1_p2",
"s2_p1", "s2_p2",
"s3_p1", "s3_p2",
"s4_p1", "s4_p2",
"s5_p1", "s5_p2",
"s6_p1", "s6_p2",
"s7_p1", "s7_p2",
"s8_p1", "s8_p2",
"s9_p1", "s9_p2",
"s10_p1", "s10_p2",
"s0_p1_backup", "s0_p2_backup",
"s1_p1_backup", "s1_p2_backup",
"s2_p1_backup", "s2_p2_backup",
"s3_p1_backup", "s3_p2_backup",
"s4_p1_backup", "s4_p2_backup",
"s5_p1_backup", "s5_p2_backup",
"s6_p1_backup", "s6_p2_backup",
"s7_p1_backup", "s7_p2_backup",
"s8_p1_backup", "s8_p2_backup",
"s9_p1_backup", "s9_p2_backup",
"s10_p1_backup", "s10_p2_backup";
#qcom,sensors = <11>;
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "uplow";
@ -1137,11 +1196,260 @@
reg = <0xfc4bc000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
tsens_calib: calib@d0 {
reg = <0xd0 0x18>;
tsens_base1: base1@d0 {
reg = <0xd0 0x1>;
bits = <0 8>;
};
tsens_backup: backup@440 {
reg = <0x440 0x10>;
tsens_s0_p1: s0-p1@d1 {
reg = <0xd1 0x1>;
bits = <0 6>;
};
tsens_s1_p1: s1-p1@d2 {
reg = <0xd1 0x2>;
bits = <6 6>;
};
tsens_s2_p1: s2-p1@d2 {
reg = <0xd2 0x2>;
bits = <4 6>;
};
tsens_s3_p1: s3-p1@d3 {
reg = <0xd3 0x1>;
bits = <2 6>;
};
tsens_s4_p1: s4-p1@d4 {
reg = <0xd4 0x1>;
bits = <0 6>;
};
tsens_s5_p1: s5-p1@d4 {
reg = <0xd4 0x2>;
bits = <6 6>;
};
tsens_s6_p1: s6-p1@d5 {
reg = <0xd5 0x2>;
bits = <4 6>;
};
tsens_s7_p1: s7-p1@d6 {
reg = <0xd6 0x1>;
bits = <2 6>;
};
tsens_s8_p1: s8-p1@d7 {
reg = <0xd7 0x1>;
bits = <0 6>;
};
tsens_mode: mode@d7 {
reg = <0xd7 0x1>;
bits = <6 2>;
};
tsens_s9_p1: s9-p1@d8 {
reg = <0xd8 0x1>;
bits = <0 6>;
};
tsens_s10_p1: s10_p1@d8 {
reg = <0xd8 0x2>;
bits = <6 6>;
};
tsens_base2: base2@d9 {
reg = <0xd9 0x2>;
bits = <4 8>;
};
tsens_s0_p2: s0-p2@da {
reg = <0xda 0x2>;
bits = <4 6>;
};
tsens_s1_p2: s1-p2@db {
reg = <0xdb 0x1>;
bits = <2 6>;
};
tsens_s2_p2: s2-p2@dc {
reg = <0xdc 0x1>;
bits = <0 6>;
};
tsens_s3_p2: s3-p2@dc {
reg = <0xdc 0x2>;
bits = <6 6>;
};
tsens_s4_p2: s4-p2@dd {
reg = <0xdd 0x2>;
bits = <4 6>;
};
tsens_s5_p2: s5-p2@de {
reg = <0xde 0x2>;
bits = <2 6>;
};
tsens_s6_p2: s6-p2@df {
reg = <0xdf 0x1>;
bits = <0 6>;
};
tsens_s7_p2: s7-p2@e0 {
reg = <0xe0 0x1>;
bits = <0 6>;
};
tsens_s8_p2: s8-p2@e0 {
reg = <0xe0 0x2>;
bits = <6 6>;
};
tsens_s9_p2: s9-p2@e1 {
reg = <0xe1 0x2>;
bits = <4 6>;
};
tsens_s10_p2: s10_p2@e2 {
reg = <0xe2 0x2>;
bits = <2 6>;
};
tsens_s5_p2_backup: s5-p2_backup@e3 {
reg = <0xe3 0x2>;
bits = <0 6>;
};
tsens_mode_backup: mode_backup@e3 {
reg = <0xe3 0x1>;
bits = <6 2>;
};
tsens_s6_p2_backup: s6-p2_backup@e4 {
reg = <0xe4 0x1>;
bits = <0 6>;
};
tsens_s7_p2_backup: s7-p2_backup@e4 {
reg = <0xe4 0x2>;
bits = <6 6>;
};
tsens_s8_p2_backup: s8-p2_backup@e5 {
reg = <0xe5 0x2>;
bits = <4 6>;
};
tsens_s9_p2_backup: s9-p2_backup@e6 {
reg = <0xe6 0x2>;
bits = <2 6>;
};
tsens_s10_p2_backup: s10_p2_backup@e7 {
reg = <0xe7 0x1>;
bits = <0 6>;
};
tsens_base1_backup: base1_backup@440 {
reg = <0x440 0x1>;
bits = <0 8>;
};
tsens_s0_p1_backup: s0-p1_backup@441 {
reg = <0x441 0x1>;
bits = <0 6>;
};
tsens_s1_p1_backup: s1-p1_backup@442 {
reg = <0x441 0x2>;
bits = <6 6>;
};
tsens_s2_p1_backup: s2-p1_backup@442 {
reg = <0x442 0x2>;
bits = <4 6>;
};
tsens_s3_p1_backup: s3-p1_backup@443 {
reg = <0x443 0x1>;
bits = <2 6>;
};
tsens_s4_p1_backup: s4-p1_backup@444 {
reg = <0x444 0x1>;
bits = <0 6>;
};
tsens_s5_p1_backup: s5-p1_backup@444 {
reg = <0x444 0x2>;
bits = <6 6>;
};
tsens_s6_p1_backup: s6-p1_backup@445 {
reg = <0x445 0x2>;
bits = <4 6>;
};
tsens_s7_p1_backup: s7-p1_backup@446 {
reg = <0x446 0x1>;
bits = <2 6>;
};
tsens_use_backup: use_backup@447 {
reg = <0x447 0x1>;
bits = <5 3>;
};
tsens_s8_p1_backup: s8-p1_backup@448 {
reg = <0x448 0x1>;
bits = <0 6>;
};
tsens_s9_p1_backup: s9-p1_backup@448 {
reg = <0x448 0x2>;
bits = <6 6>;
};
tsens_s10_p1_backup: s10_p1_backup@449 {
reg = <0x449 0x2>;
bits = <4 6>;
};
tsens_base2_backup: base2_backup@44a {
reg = <0x44a 0x2>;
bits = <2 8>;
};
tsens_s0_p2_backup: s0-p2_backup@44b {
reg = <0x44b 0x3>;
bits = <2 6>;
};
tsens_s1_p2_backup: s1-p2_backup@44c {
reg = <0x44c 0x1>;
bits = <0 6>;
};
tsens_s2_p2_backup: s2-p2_backup@44c {
reg = <0x44c 0x2>;
bits = <6 6>;
};
tsens_s3_p2_backup: s3-p2_backup@44d {
reg = <0x44d 0x2>;
bits = <4 6>;
};
tsens_s4_p2_backup: s4-p2_backup@44e {
reg = <0x44e 0x1>;
bits = <2 6>;
};
};
@ -1523,9 +1831,33 @@
#reset-cells = <1>;
#power-domain-cells = <1>;
reg = <0xfd8c0000 0x6000>;
clocks = <&xo_board>,
<&gcc GCC_MMSS_GPLL0_CLK_SRC>,
<&gcc GPLL0_VOTE>,
<&gcc GPLL1_VOTE>,
<&rpmcc RPM_SMD_GFX3D_CLK_SRC>,
<&dsi0_phy 1>,
<&dsi0_phy 0>,
<&dsi1_phy 1>,
<&dsi1_phy 0>,
<0>,
<0>,
<0>;
clock-names = "xo",
"mmss_gpll0_vote",
"gpll0_vote",
"gpll1_vote",
"gfx3d_clk_src",
"dsi0pll",
"dsi0pllbyte",
"dsi1pll",
"dsi1pllbyte",
"hdmipll",
"edp_link_clk",
"edp_vco_div";
};
mdss: mdss@fd900000 {
mdss: display-subsystem@fd900000 {
compatible = "qcom,mdss";
reg = <0xfd900000 0x100>, <0xfd924000 0x1000>;
reg-names = "mdss_phys", "vbif_phys";
@ -1548,8 +1880,8 @@
#size-cells = <1>;
ranges;
mdp: mdp@fd900000 {
compatible = "qcom,mdp5";
mdp: display-controller@fd900000 {
compatible = "qcom,msm8974-mdp5", "qcom,mdp5";
reg = <0xfd900100 0x22000>;
reg-names = "mdp_phys";
@ -1575,11 +1907,19 @@
remote-endpoint = <&dsi0_in>;
};
};
port@1 {
reg = <1>;
mdp5_intf2_out: endpoint {
remote-endpoint = <&dsi1_in>;
};
};
};
};
dsi0: dsi@fd922800 {
compatible = "qcom,mdss-dsi-ctrl";
compatible = "qcom,msm8974-dsi-ctrl",
"qcom,mdss-dsi-ctrl";
reg = <0xfd922800 0x1f8>;
reg-names = "dsi_ctrl";
@ -1647,6 +1987,77 @@
status = "disabled";
};
dsi1: dsi@fd922e00 {
compatible = "qcom,msm8974-dsi-ctrl",
"qcom,mdss-dsi-ctrl";
reg = <0xfd922e00 0x1f8>;
reg-names = "dsi_ctrl";
interrupt-parent = <&mdss>;
interrupts = <4>;
assigned-clocks = <&mmcc BYTE1_CLK_SRC>, <&mmcc PCLK1_CLK_SRC>;
assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>;
clocks = <&mmcc MDSS_MDP_CLK>,
<&mmcc MDSS_AHB_CLK>,
<&mmcc MDSS_AXI_CLK>,
<&mmcc MDSS_BYTE1_CLK>,
<&mmcc MDSS_PCLK1_CLK>,
<&mmcc MDSS_ESC1_CLK>,
<&mmcc MMSS_MISC_AHB_CLK>;
clock-names = "mdp_core",
"iface",
"bus",
"byte",
"pixel",
"core",
"core_mmss";
phys = <&dsi1_phy>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dsi1_in: endpoint {
remote-endpoint = <&mdp5_intf2_out>;
};
};
port@1 {
reg = <1>;
dsi1_out: endpoint {
};
};
};
};
dsi1_phy: phy@fd923000 {
compatible = "qcom,dsi-phy-28nm-hpm";
reg = <0xfd923000 0xd4>,
<0xfd923100 0x280>,
<0xfd923380 0x30>;
reg-names = "dsi_pll",
"dsi_phy",
"dsi_phy_regulator";
#clock-cells = <1>;
#phy-cells = <0>;
clocks = <&mmcc MDSS_AHB_CLK>, <&xo_board>;
clock-names = "iface", "ref";
status = "disabled";
};
};
cci: cci@fda0c000 {

38
arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts
View File

@ -123,7 +123,7 @@
pinctrl-names = "default";
pinctrl-0 = <&ts_int_pin>;
syna,startup-delay-ms = <10>;
syna,startup-delay-ms = <100>;
rmi-f01@1 {
reg = <0x1>;
@ -294,8 +294,43 @@
};
};
&remoteproc_adsp {
cx-supply = <&pm8841_s2>;
};
&remoteproc_mss {
cx-supply = <&pm8841_s2>;
mss-supply = <&pm8841_s3>;
mx-supply = <&pm8841_s1>;
pll-supply = <&pm8941_l12>;
};
&rpm_requests {
regulators-0 {
compatible = "qcom,rpm-pm8841-regulators";
pm8841_s1: s1 {
regulator-min-microvolt = <675000>;
regulator-max-microvolt = <1050000>;
};
pm8841_s2: s2 {
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1050000>;
};
pm8841_s3: s3 {
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1050000>;
};
pm8841_s4: s4 {
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1050000>;
};
};
regulators-1 {
compatible = "qcom,rpm-pm8941-regulators";
vdd_l1_l3-supply = <&pm8941_s1>;
@ -516,6 +551,7 @@
qcom,fast-charge-safe-current = <1500000>;
qcom,fast-charge-current-limit = <1500000>;
qcom,dc-current-limit = <1800000>;
usb-charge-current-limit = <1800000>;
qcom,fast-charge-safe-voltage = <4400000>;
qcom,fast-charge-high-threshold-voltage = <4350000>;
qcom,fast-charge-low-threshold-voltage = <3400000>;

46
arch/arm/boot/dts/qcom-pm8226.dtsi
View File

@ -1,7 +1,8 @@
// SPDX-License-Identifier: BSD-3-Clause
#include <dt-bindings/iio/qcom,spmi-vadc.h>
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
#include <dt-bindings/iio/qcom,spmi-vadc.h>
&spmi_bus {
pm8226_0: pm8226@0 {
@ -10,12 +11,25 @@
#address-cells = <1>;
#size-cells = <0>;
pwrkey@800 {
compatible = "qcom,pm8941-pwrkey";
pon@800 {
compatible = "qcom,pm8916-pon";
reg = <0x800>;
interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
debounce = <15625>;
bias-pull-up;
pwrkey {
compatible = "qcom,pm8941-pwrkey";
interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
debounce = <15625>;
bias-pull-up;
linux,code = <KEY_POWER>;
};
pm8226_resin: resin {
compatible = "qcom,pm8941-resin";
interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
debounce = <15625>;
bias-pull-up;
status = "disabled";
};
};
smbb: charger@1000 {
@ -41,13 +55,6 @@
chg_otg: otg-vbus { };
};
rtc@6000 {
compatible = "qcom,pm8941-rtc";
reg = <0x6000>, <0x6100>;
reg-names = "rtc", "alarm";
interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
};
pm8226_vadc: adc@3100 {
compatible = "qcom,spmi-vadc";
reg = <0x3100>;
@ -81,6 +88,19 @@
};
};
pm8226_iadc: adc@3600 {
compatible = "qcom,pm8226-iadc", "qcom,spmi-iadc";
reg = <0x3600>;
interrupts = <0x0 0x36 0x0 IRQ_TYPE_EDGE_RISING>;
};
rtc@6000 {
compatible = "qcom,pm8941-rtc";
reg = <0x6000>, <0x6100>;
reg-names = "rtc", "alarm";
interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
};
pm8226_mpps: mpps@a000 {
compatible = "qcom,pm8226-mpp", "qcom,spmi-mpp";
reg = <0xa000>;

4
arch/arm/boot/dts/qcom-sdx55-mtp.dts
View File

@ -229,6 +229,10 @@
};
};
&remoteproc_mpss {
memory-region = <&mpss_adsp_mem>;
};
&usb {
status = "okay";
};

4
arch/arm/boot/dts/qcom-sdx55-t55.dts
View File

@ -237,9 +237,9 @@
};
&ipa {
status = "okay";
qcom,gsi-loader = "self";
memory-region = <&ipa_fw_mem>;
status = "okay";
};
&qpic_bam {

4
arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts
View File

@ -237,9 +237,9 @@
};
&ipa {
status = "okay";
qcom,gsi-loader = "self";
memory-region = <&ipa_fw_mem>;
status = "okay";
};
&pcie0_phy {

17
arch/arm/boot/dts/qcom-sdx55.dtsi
View File

@ -62,7 +62,13 @@
};
};
cpu_opp_table: cpu-opp-table {
firmware {
scm {
compatible = "qcom,scm-sdx55", "qcom,scm";
};
};
cpu_opp_table: opp-table-cpu {
compatible = "operating-points-v2";
opp-shared;
@ -87,12 +93,6 @@
};
};
firmware {
scm {
compatible = "qcom,scm-sdx55", "qcom,scm";
};
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
@ -214,7 +214,8 @@
};
usb_hsphy: phy@ff4000 {
compatible = "qcom,usb-snps-hs-7nm-phy";
compatible = "qcom,sdx55-usb-hs-phy",
"qcom,usb-snps-hs-7nm-phy";
reg = <0x00ff4000 0x114>;
status = "disabled";
#phy-cells = <0>;

29
arch/arm/boot/dts/qcom-sdx65.dtsi
View File

@ -61,7 +61,19 @@
};
};
cpu_opp_table: cpu-opp-table {
firmware {
scm {
compatible = "qcom,scm-sdx65", "qcom,scm";
};
};
mc_virt: interconnect-mc-virt {
compatible = "qcom,sdx65-mc-virt";
#interconnect-cells = <1>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
cpu_opp_table: opp-table-cpu {
compatible = "operating-points-v2";
opp-shared;
@ -86,18 +98,6 @@
};
};
firmware {
scm {
compatible = "qcom,scm-sdx65", "qcom,scm";
};
};
mc_virt: interconnect-mc-virt {
compatible = "qcom,sdx65-mc-virt";
#interconnect-cells = <1>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
@ -219,7 +219,8 @@
};
usb_hsphy: phy@ff4000 {
compatible = "qcom,usb-snps-hs-7nm-phy";
compatible = "qcom,sdx65-usb-hs-phy",
"qcom,usb-snps-hs-7nm-phy";
reg = <0xff4000 0x120>;
#phy-cells = <0>;
status = "disabled";

1
arch/arm64/boot/dts/qcom/Makefile
View File

@ -7,6 +7,7 @@ dtb-$(CONFIG_ARCH_QCOM) += ipq6018-cp01-c1.dtb
dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk01.dtb
dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk10-c1.dtb
dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk10-c2.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-acer-a1-724.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-alcatel-idol347.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-asus-z00l.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-huawei-g7.dtb

295
arch/arm64/boot/dts/qcom/msm8916-acer-a1-724.dts Normal file
View File

@ -0,0 +1,295 @@
// SPDX-License-Identifier: GPL-2.0-only
/dts-v1/;
#include "msm8916-pm8916.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
/*
* NOTE: The original firmware from Acer can only boot 32-bit kernels.
* To boot this device tree using arm64 it is necessary to flash 64-bit
* TZ/HYP firmware (e.g. taken from the DragonBoard 410c).
* See https://wiki.postmarketos.org/wiki/Acer_Iconia_Talk_S_(acer-a1-724)
* for suggested installation instructions.
*/
/ {
model = "Acer Iconia Talk S A1-724";
compatible = "acer,a1-724", "qcom,msm8916";
chassis-type = "tablet";
aliases {
serial0 = &blsp1_uart2;
};
chosen {
stdout-path = "serial0";
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&gpio_keys_default>;
label = "GPIO Buttons";
button-volume-up {
label = "Volume Up";
gpios = <&msmgpio 107 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
};
usb_id: usb-id {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&msmgpio 110 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_id_default>;
};
};
&blsp_i2c2 {
status = "okay";
accelerometer@10 {
compatible = "bosch,bmc150_accel";
reg = <0x10>;
interrupt-parent = <&msmgpio>;
interrupts = <115 IRQ_TYPE_EDGE_RISING>;
vdd-supply = <&pm8916_l17>;
vddio-supply = <&pm8916_l6>;
pinctrl-names = "default";
pinctrl-0 = <&accel_int_default>;
mount-matrix = "0", "-1", "0",
"-1", "0", "0",
"0", "0", "1";
};
magnetometer@12 {
compatible = "bosch,bmc150_magn";
reg = <0x12>;
vdd-supply = <&pm8916_l17>;
vddio-supply = <&pm8916_l6>;
};
};
&blsp_i2c5 {
status = "okay";
touchscreen@38 {
/* Actually ft5446 */
compatible = "edt,edt-ft5406";
reg = <0x38>;
interrupt-parent = <&msmgpio>;
interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&msmgpio 12 GPIO_ACTIVE_LOW>;
vcc-supply = <&pm8916_l16>;
iovcc-supply = <&pm8916_l6>;
touchscreen-size-x = <720>;
touchscreen-size-y = <1280>;
pinctrl-names = "default";
pinctrl-0 = <&touchscreen_default>;
};
};
&blsp1_uart2 {
status = "okay";
};
&pm8916_resin {
linux,code = <KEY_VOLUMEDOWN>;
status = "okay";
};
&pm8916_vib {
status = "okay";
};
&pronto {
status = "okay";
};
&sdhc_1 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off>;
status = "okay";
};
&sdhc_2 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>;
cd-gpios = <&msmgpio 38 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&usb {
extcon = <&usb_id>, <&usb_id>;
status = "okay";
};
&usb_hs_phy {
extcon = <&usb_id>;
};
&smd_rpm_regulators {
vdd_l1_l2_l3-supply = <&pm8916_s3>;
vdd_l4_l5_l6-supply = <&pm8916_s4>;
vdd_l7-supply = <&pm8916_s4>;
s3 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1300000>;
};
s4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2100000>;
};
l1 {
regulator-min-microvolt = <1225000>;
regulator-max-microvolt = <1225000>;
};
l2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
l4 {
regulator-min-microvolt = <2050000>;
regulator-max-microvolt = <2050000>;
};
l5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
l6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
l7 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
l8 {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2900000>;
};
l9 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
l10 {
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <2800000>;
};
l11 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
regulator-system-load = <200000>;
regulator-allow-set-load;
};
l12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
};
l13 {
regulator-min-microvolt = <3075000>;
regulator-max-microvolt = <3075000>;
};
l14 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
l15 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
l16 {
regulator-min-microvolt = <2900000>;
regulator-max-microvolt = <2900000>;
};
l17 {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
};
l18 {
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <2700000>;
};
};
&msmgpio {
accel_int_default: accel-int-default-state {
pins = "gpio115";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
gpio_keys_default: gpio-keys-default-state {
pins = "gpio107";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
touchscreen_default: touchscreen-default-state {
reset-pins {
pins = "gpio12";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
touchscreen-pins {
pins = "gpio13";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
};
usb_id_default: usb-id-default-state {
pins = "gpio110";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};