mlx5-fixes-2017-06-14

-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJZQvHpAAoJEEg/ir3gV/o+fP8IALE/0vZMZ7VYVCWJnUIpnHk+
 0xA1g+OkYNjZuHfHmpO2HF/Tc50tPju0qXnAAkA+1jqpog81Q8VNOiY3ef7rLcw5
 odew/QVmdVbWDRrZ/CLz/2WjWbX2EvoK3sfVL48itVBYT7eHK16X70Oj5lHd7h44
 w4Rwht9IFbngwldCUdi5Ymt6LhvwhJXHYIBe6tQaIMOttDF8U/hFCRYwwiec/hzT
 mBOXp6kH7cLZCqx7/LUTxO8GxJ5/aYjm/N4K5apozcDBpXLYXiNcJ0kUi0N7jOeC
 lflrDRH7HO8cTbtm/Ni0oZ0kg4F6W1EMCXFxZfqDktyjkUSEB0WM+fR1Dtb+2Mo=
 =dW7D
 -----END PGP SIGNATURE-----

Merge tag 'mlx5-fixes-2017-06-14' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux

Saeed Mahameed says:

====================
Mellanox mlx5 fixes 2017-06-14

This series contains some fixes for the mlx5 core and netdev driver.

Please pull and let me know if there's any problem.

For -stable:
("net/mlx5: Wait for FW readiness before initializing command interface") kernels >= 4.4
("net/mlx5e: Fix timestamping capabilities reporting") kernels >= 4.5
("net/mlx5e: Avoid doing a cleanup call if the profile doesn't have it") kernels >= 4.9
("net/mlx5e: Fix min inline value for VF rep SQs") kernels >= 4.11

The "net/mlx5e: Fix min inline .." (a oneliner patch) doesn't cleanly apply
to 4.11, it hits a contextual conflict and can be easily resolved by:
+       mlx5_query_min_inline(mdev, &priv->params.tx_min_inline_mode);
to the end of mlx5e_build_rep_netdev_priv. Note the 2nd parameter of
mlx5_query_min_inline is slightly different from the original one.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller 2017-06-15 22:22:23 -04:00
commit be56a099e0
6 changed files with 60 additions and 45 deletions

View File

@ -1242,11 +1242,11 @@ static int mlx5e_get_ts_info(struct net_device *dev,
SOF_TIMESTAMPING_RX_HARDWARE | SOF_TIMESTAMPING_RX_HARDWARE |
SOF_TIMESTAMPING_RAW_HARDWARE; SOF_TIMESTAMPING_RAW_HARDWARE;
info->tx_types = (BIT(1) << HWTSTAMP_TX_OFF) | info->tx_types = BIT(HWTSTAMP_TX_OFF) |
(BIT(1) << HWTSTAMP_TX_ON); BIT(HWTSTAMP_TX_ON);
info->rx_filters = (BIT(1) << HWTSTAMP_FILTER_NONE) | info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
(BIT(1) << HWTSTAMP_FILTER_ALL); BIT(HWTSTAMP_FILTER_ALL);
return 0; return 0;
} }

View File

@ -4241,6 +4241,7 @@ struct net_device *mlx5e_create_netdev(struct mlx5_core_dev *mdev,
return netdev; return netdev;
err_cleanup_nic: err_cleanup_nic:
if (profile->cleanup)
profile->cleanup(priv); profile->cleanup(priv);
free_netdev(netdev); free_netdev(netdev);

View File

@ -791,6 +791,8 @@ static void mlx5e_build_rep_params(struct mlx5_core_dev *mdev,
params->tx_max_inline = mlx5e_get_max_inline_cap(mdev); params->tx_max_inline = mlx5e_get_max_inline_cap(mdev);
params->num_tc = 1; params->num_tc = 1;
params->lro_wqe_sz = MLX5E_PARAMS_DEFAULT_LRO_WQE_SZ; params->lro_wqe_sz = MLX5E_PARAMS_DEFAULT_LRO_WQE_SZ;
mlx5_query_min_inline(mdev, &params->tx_min_inline_mode);
} }
static void mlx5e_build_rep_netdev(struct net_device *netdev) static void mlx5e_build_rep_netdev(struct net_device *netdev)

View File

@ -895,7 +895,6 @@ static struct mlx5_fields fields[] = {
{MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0, 2, offsetof(struct pedit_headers, eth.h_source[4])}, {MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0, 2, offsetof(struct pedit_headers, eth.h_source[4])},
{MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE, 2, offsetof(struct pedit_headers, eth.h_proto)}, {MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE, 2, offsetof(struct pedit_headers, eth.h_proto)},
{MLX5_ACTION_IN_FIELD_OUT_IP_DSCP, 1, offsetof(struct pedit_headers, ip4.tos)},
{MLX5_ACTION_IN_FIELD_OUT_IP_TTL, 1, offsetof(struct pedit_headers, ip4.ttl)}, {MLX5_ACTION_IN_FIELD_OUT_IP_TTL, 1, offsetof(struct pedit_headers, ip4.ttl)},
{MLX5_ACTION_IN_FIELD_OUT_SIPV4, 4, offsetof(struct pedit_headers, ip4.saddr)}, {MLX5_ACTION_IN_FIELD_OUT_SIPV4, 4, offsetof(struct pedit_headers, ip4.saddr)},
{MLX5_ACTION_IN_FIELD_OUT_DIPV4, 4, offsetof(struct pedit_headers, ip4.daddr)}, {MLX5_ACTION_IN_FIELD_OUT_DIPV4, 4, offsetof(struct pedit_headers, ip4.daddr)},

View File

@ -906,21 +906,34 @@ static int esw_inline_mode_to_devlink(u8 mlx5_mode, u8 *mode)
return 0; return 0;
} }
int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode) static int mlx5_devlink_eswitch_check(struct devlink *devlink)
{ {
struct mlx5_core_dev *dev; struct mlx5_core_dev *dev = devlink_priv(devlink);
u16 cur_mlx5_mode, mlx5_mode = 0;
dev = devlink_priv(devlink); if (MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
return -EOPNOTSUPP;
if (!MLX5_CAP_GEN(dev, vport_group_manager)) if (!MLX5_CAP_GEN(dev, vport_group_manager))
return -EOPNOTSUPP; return -EOPNOTSUPP;
cur_mlx5_mode = dev->priv.eswitch->mode; if (dev->priv.eswitch->mode == SRIOV_NONE)
if (cur_mlx5_mode == SRIOV_NONE)
return -EOPNOTSUPP; return -EOPNOTSUPP;
return 0;
}
int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode)
{
struct mlx5_core_dev *dev = devlink_priv(devlink);
u16 cur_mlx5_mode, mlx5_mode = 0;
int err;
err = mlx5_devlink_eswitch_check(devlink);
if (err)
return err;
cur_mlx5_mode = dev->priv.eswitch->mode;
if (esw_mode_from_devlink(mode, &mlx5_mode)) if (esw_mode_from_devlink(mode, &mlx5_mode))
return -EINVAL; return -EINVAL;
@ -937,15 +950,12 @@ int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode)
int mlx5_devlink_eswitch_mode_get(struct devlink *devlink, u16 *mode) int mlx5_devlink_eswitch_mode_get(struct devlink *devlink, u16 *mode)
{ {
struct mlx5_core_dev *dev; struct mlx5_core_dev *dev = devlink_priv(devlink);
int err;
dev = devlink_priv(devlink); err = mlx5_devlink_eswitch_check(devlink);
if (err)
if (!MLX5_CAP_GEN(dev, vport_group_manager)) return err;
return -EOPNOTSUPP;
if (dev->priv.eswitch->mode == SRIOV_NONE)
return -EOPNOTSUPP;
return esw_mode_to_devlink(dev->priv.eswitch->mode, mode); return esw_mode_to_devlink(dev->priv.eswitch->mode, mode);
} }
@ -954,15 +964,12 @@ int mlx5_devlink_eswitch_inline_mode_set(struct devlink *devlink, u8 mode)
{ {
struct mlx5_core_dev *dev = devlink_priv(devlink); struct mlx5_core_dev *dev = devlink_priv(devlink);
struct mlx5_eswitch *esw = dev->priv.eswitch; struct mlx5_eswitch *esw = dev->priv.eswitch;
int num_vports = esw->enabled_vports;
int err, vport; int err, vport;
u8 mlx5_mode; u8 mlx5_mode;
if (!MLX5_CAP_GEN(dev, vport_group_manager)) err = mlx5_devlink_eswitch_check(devlink);
return -EOPNOTSUPP; if (err)
return err;
if (esw->mode == SRIOV_NONE)
return -EOPNOTSUPP;
switch (MLX5_CAP_ETH(dev, wqe_inline_mode)) { switch (MLX5_CAP_ETH(dev, wqe_inline_mode)) {
case MLX5_CAP_INLINE_MODE_NOT_REQUIRED: case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
@ -985,7 +992,7 @@ int mlx5_devlink_eswitch_inline_mode_set(struct devlink *devlink, u8 mode)
if (err) if (err)
goto out; goto out;
for (vport = 1; vport < num_vports; vport++) { for (vport = 1; vport < esw->enabled_vports; vport++) {
err = mlx5_modify_nic_vport_min_inline(dev, vport, mlx5_mode); err = mlx5_modify_nic_vport_min_inline(dev, vport, mlx5_mode);
if (err) { if (err) {
esw_warn(dev, "Failed to set min inline on vport %d\n", esw_warn(dev, "Failed to set min inline on vport %d\n",
@ -1010,12 +1017,11 @@ int mlx5_devlink_eswitch_inline_mode_get(struct devlink *devlink, u8 *mode)
{ {
struct mlx5_core_dev *dev = devlink_priv(devlink); struct mlx5_core_dev *dev = devlink_priv(devlink);
struct mlx5_eswitch *esw = dev->priv.eswitch; struct mlx5_eswitch *esw = dev->priv.eswitch;
int err;
if (!MLX5_CAP_GEN(dev, vport_group_manager)) err = mlx5_devlink_eswitch_check(devlink);
return -EOPNOTSUPP; if (err)
return err;
if (esw->mode == SRIOV_NONE)
return -EOPNOTSUPP;
return esw_inline_mode_to_devlink(esw->offloads.inline_mode, mode); return esw_inline_mode_to_devlink(esw->offloads.inline_mode, mode);
} }
@ -1062,11 +1068,9 @@ int mlx5_devlink_eswitch_encap_mode_set(struct devlink *devlink, u8 encap)
struct mlx5_eswitch *esw = dev->priv.eswitch; struct mlx5_eswitch *esw = dev->priv.eswitch;
int err; int err;
if (!MLX5_CAP_GEN(dev, vport_group_manager)) err = mlx5_devlink_eswitch_check(devlink);
return -EOPNOTSUPP; if (err)
return err;
if (esw->mode == SRIOV_NONE)
return -EOPNOTSUPP;
if (encap != DEVLINK_ESWITCH_ENCAP_MODE_NONE && if (encap != DEVLINK_ESWITCH_ENCAP_MODE_NONE &&
(!MLX5_CAP_ESW_FLOWTABLE_FDB(dev, encap) || (!MLX5_CAP_ESW_FLOWTABLE_FDB(dev, encap) ||
@ -1105,12 +1109,11 @@ int mlx5_devlink_eswitch_encap_mode_get(struct devlink *devlink, u8 *encap)
{ {
struct mlx5_core_dev *dev = devlink_priv(devlink); struct mlx5_core_dev *dev = devlink_priv(devlink);
struct mlx5_eswitch *esw = dev->priv.eswitch; struct mlx5_eswitch *esw = dev->priv.eswitch;
int err;
if (!MLX5_CAP_GEN(dev, vport_group_manager)) err = mlx5_devlink_eswitch_check(devlink);
return -EOPNOTSUPP; if (err)
return err;
if (esw->mode == SRIOV_NONE)
return -EOPNOTSUPP;
*encap = esw->offloads.encap; *encap = esw->offloads.encap;
return 0; return 0;

View File

@ -177,6 +177,7 @@ static struct mlx5_profile profile[] = {
#define FW_INIT_TIMEOUT_MILI 2000 #define FW_INIT_TIMEOUT_MILI 2000
#define FW_INIT_WAIT_MS 2 #define FW_INIT_WAIT_MS 2
#define FW_PRE_INIT_TIMEOUT_MILI 10000
static int wait_fw_init(struct mlx5_core_dev *dev, u32 max_wait_mili) static int wait_fw_init(struct mlx5_core_dev *dev, u32 max_wait_mili)
{ {
@ -1013,6 +1014,15 @@ static int mlx5_load_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv,
*/ */
dev->state = MLX5_DEVICE_STATE_UP; dev->state = MLX5_DEVICE_STATE_UP;
/* wait for firmware to accept initialization segments configurations
*/
err = wait_fw_init(dev, FW_PRE_INIT_TIMEOUT_MILI);
if (err) {
dev_err(&dev->pdev->dev, "Firmware over %d MS in pre-initializing state, aborting\n",
FW_PRE_INIT_TIMEOUT_MILI);
goto out;
}
err = mlx5_cmd_init(dev); err = mlx5_cmd_init(dev);
if (err) { if (err) {
dev_err(&pdev->dev, "Failed initializing command interface, aborting\n"); dev_err(&pdev->dev, "Failed initializing command interface, aborting\n");