mlx5-fixes-2017-06-14
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABAgAGBQJZQvHpAAoJEEg/ir3gV/o+fP8IALE/0vZMZ7VYVCWJnUIpnHk+ 0xA1g+OkYNjZuHfHmpO2HF/Tc50tPju0qXnAAkA+1jqpog81Q8VNOiY3ef7rLcw5 odew/QVmdVbWDRrZ/CLz/2WjWbX2EvoK3sfVL48itVBYT7eHK16X70Oj5lHd7h44 w4Rwht9IFbngwldCUdi5Ymt6LhvwhJXHYIBe6tQaIMOttDF8U/hFCRYwwiec/hzT mBOXp6kH7cLZCqx7/LUTxO8GxJ5/aYjm/N4K5apozcDBpXLYXiNcJ0kUi0N7jOeC lflrDRH7HO8cTbtm/Ni0oZ0kg4F6W1EMCXFxZfqDktyjkUSEB0WM+fR1Dtb+2Mo= =dW7D -----END PGP SIGNATURE----- Merge tag 'mlx5-fixes-2017-06-14' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux Saeed Mahameed says: ==================== Mellanox mlx5 fixes 2017-06-14 This series contains some fixes for the mlx5 core and netdev driver. Please pull and let me know if there's any problem. For -stable: ("net/mlx5: Wait for FW readiness before initializing command interface") kernels >= 4.4 ("net/mlx5e: Fix timestamping capabilities reporting") kernels >= 4.5 ("net/mlx5e: Avoid doing a cleanup call if the profile doesn't have it") kernels >= 4.9 ("net/mlx5e: Fix min inline value for VF rep SQs") kernels >= 4.11 The "net/mlx5e: Fix min inline .." (a oneliner patch) doesn't cleanly apply to 4.11, it hits a contextual conflict and can be easily resolved by: + mlx5_query_min_inline(mdev, &priv->params.tx_min_inline_mode); to the end of mlx5e_build_rep_netdev_priv. Note the 2nd parameter of mlx5_query_min_inline is slightly different from the original one. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
be56a099e0
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@ -1242,11 +1242,11 @@ static int mlx5e_get_ts_info(struct net_device *dev,
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SOF_TIMESTAMPING_RX_HARDWARE |
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SOF_TIMESTAMPING_RAW_HARDWARE;
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info->tx_types = (BIT(1) << HWTSTAMP_TX_OFF) |
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(BIT(1) << HWTSTAMP_TX_ON);
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info->tx_types = BIT(HWTSTAMP_TX_OFF) |
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BIT(HWTSTAMP_TX_ON);
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info->rx_filters = (BIT(1) << HWTSTAMP_FILTER_NONE) |
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(BIT(1) << HWTSTAMP_FILTER_ALL);
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info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
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BIT(HWTSTAMP_FILTER_ALL);
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return 0;
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}
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@ -4241,7 +4241,8 @@ struct net_device *mlx5e_create_netdev(struct mlx5_core_dev *mdev,
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return netdev;
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err_cleanup_nic:
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profile->cleanup(priv);
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if (profile->cleanup)
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profile->cleanup(priv);
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free_netdev(netdev);
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return NULL;
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@ -791,6 +791,8 @@ static void mlx5e_build_rep_params(struct mlx5_core_dev *mdev,
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params->tx_max_inline = mlx5e_get_max_inline_cap(mdev);
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params->num_tc = 1;
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params->lro_wqe_sz = MLX5E_PARAMS_DEFAULT_LRO_WQE_SZ;
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mlx5_query_min_inline(mdev, ¶ms->tx_min_inline_mode);
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}
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static void mlx5e_build_rep_netdev(struct net_device *netdev)
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@ -895,7 +895,6 @@ static struct mlx5_fields fields[] = {
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{MLX5_ACTION_IN_FIELD_OUT_SMAC_15_0, 2, offsetof(struct pedit_headers, eth.h_source[4])},
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{MLX5_ACTION_IN_FIELD_OUT_ETHERTYPE, 2, offsetof(struct pedit_headers, eth.h_proto)},
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{MLX5_ACTION_IN_FIELD_OUT_IP_DSCP, 1, offsetof(struct pedit_headers, ip4.tos)},
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{MLX5_ACTION_IN_FIELD_OUT_IP_TTL, 1, offsetof(struct pedit_headers, ip4.ttl)},
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{MLX5_ACTION_IN_FIELD_OUT_SIPV4, 4, offsetof(struct pedit_headers, ip4.saddr)},
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{MLX5_ACTION_IN_FIELD_OUT_DIPV4, 4, offsetof(struct pedit_headers, ip4.daddr)},
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@ -906,21 +906,34 @@ static int esw_inline_mode_to_devlink(u8 mlx5_mode, u8 *mode)
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return 0;
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}
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int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode)
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static int mlx5_devlink_eswitch_check(struct devlink *devlink)
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{
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struct mlx5_core_dev *dev;
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u16 cur_mlx5_mode, mlx5_mode = 0;
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struct mlx5_core_dev *dev = devlink_priv(devlink);
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dev = devlink_priv(devlink);
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if (MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
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return -EOPNOTSUPP;
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if (!MLX5_CAP_GEN(dev, vport_group_manager))
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return -EOPNOTSUPP;
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cur_mlx5_mode = dev->priv.eswitch->mode;
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if (cur_mlx5_mode == SRIOV_NONE)
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if (dev->priv.eswitch->mode == SRIOV_NONE)
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return -EOPNOTSUPP;
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return 0;
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}
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int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode)
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{
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struct mlx5_core_dev *dev = devlink_priv(devlink);
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u16 cur_mlx5_mode, mlx5_mode = 0;
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int err;
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err = mlx5_devlink_eswitch_check(devlink);
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if (err)
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return err;
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cur_mlx5_mode = dev->priv.eswitch->mode;
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if (esw_mode_from_devlink(mode, &mlx5_mode))
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return -EINVAL;
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@ -937,15 +950,12 @@ int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode)
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int mlx5_devlink_eswitch_mode_get(struct devlink *devlink, u16 *mode)
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{
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struct mlx5_core_dev *dev;
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struct mlx5_core_dev *dev = devlink_priv(devlink);
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int err;
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dev = devlink_priv(devlink);
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if (!MLX5_CAP_GEN(dev, vport_group_manager))
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return -EOPNOTSUPP;
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if (dev->priv.eswitch->mode == SRIOV_NONE)
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return -EOPNOTSUPP;
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err = mlx5_devlink_eswitch_check(devlink);
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if (err)
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return err;
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return esw_mode_to_devlink(dev->priv.eswitch->mode, mode);
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}
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@ -954,15 +964,12 @@ int mlx5_devlink_eswitch_inline_mode_set(struct devlink *devlink, u8 mode)
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{
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struct mlx5_core_dev *dev = devlink_priv(devlink);
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struct mlx5_eswitch *esw = dev->priv.eswitch;
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int num_vports = esw->enabled_vports;
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int err, vport;
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u8 mlx5_mode;
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if (!MLX5_CAP_GEN(dev, vport_group_manager))
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return -EOPNOTSUPP;
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if (esw->mode == SRIOV_NONE)
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return -EOPNOTSUPP;
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err = mlx5_devlink_eswitch_check(devlink);
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if (err)
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return err;
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switch (MLX5_CAP_ETH(dev, wqe_inline_mode)) {
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case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
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@ -985,7 +992,7 @@ int mlx5_devlink_eswitch_inline_mode_set(struct devlink *devlink, u8 mode)
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if (err)
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goto out;
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for (vport = 1; vport < num_vports; vport++) {
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for (vport = 1; vport < esw->enabled_vports; vport++) {
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err = mlx5_modify_nic_vport_min_inline(dev, vport, mlx5_mode);
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if (err) {
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esw_warn(dev, "Failed to set min inline on vport %d\n",
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@ -1010,12 +1017,11 @@ int mlx5_devlink_eswitch_inline_mode_get(struct devlink *devlink, u8 *mode)
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{
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struct mlx5_core_dev *dev = devlink_priv(devlink);
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struct mlx5_eswitch *esw = dev->priv.eswitch;
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int err;
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if (!MLX5_CAP_GEN(dev, vport_group_manager))
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return -EOPNOTSUPP;
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if (esw->mode == SRIOV_NONE)
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return -EOPNOTSUPP;
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err = mlx5_devlink_eswitch_check(devlink);
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if (err)
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return err;
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return esw_inline_mode_to_devlink(esw->offloads.inline_mode, mode);
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}
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@ -1062,11 +1068,9 @@ int mlx5_devlink_eswitch_encap_mode_set(struct devlink *devlink, u8 encap)
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struct mlx5_eswitch *esw = dev->priv.eswitch;
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int err;
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if (!MLX5_CAP_GEN(dev, vport_group_manager))
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return -EOPNOTSUPP;
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if (esw->mode == SRIOV_NONE)
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return -EOPNOTSUPP;
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err = mlx5_devlink_eswitch_check(devlink);
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if (err)
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return err;
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if (encap != DEVLINK_ESWITCH_ENCAP_MODE_NONE &&
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(!MLX5_CAP_ESW_FLOWTABLE_FDB(dev, encap) ||
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@ -1105,12 +1109,11 @@ int mlx5_devlink_eswitch_encap_mode_get(struct devlink *devlink, u8 *encap)
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{
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struct mlx5_core_dev *dev = devlink_priv(devlink);
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struct mlx5_eswitch *esw = dev->priv.eswitch;
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int err;
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if (!MLX5_CAP_GEN(dev, vport_group_manager))
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return -EOPNOTSUPP;
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if (esw->mode == SRIOV_NONE)
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return -EOPNOTSUPP;
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err = mlx5_devlink_eswitch_check(devlink);
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if (err)
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return err;
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*encap = esw->offloads.encap;
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return 0;
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@ -175,8 +175,9 @@ static struct mlx5_profile profile[] = {
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},
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};
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#define FW_INIT_TIMEOUT_MILI 2000
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#define FW_INIT_WAIT_MS 2
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#define FW_INIT_TIMEOUT_MILI 2000
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#define FW_INIT_WAIT_MS 2
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#define FW_PRE_INIT_TIMEOUT_MILI 10000
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static int wait_fw_init(struct mlx5_core_dev *dev, u32 max_wait_mili)
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{
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@ -1013,6 +1014,15 @@ static int mlx5_load_one(struct mlx5_core_dev *dev, struct mlx5_priv *priv,
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*/
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dev->state = MLX5_DEVICE_STATE_UP;
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/* wait for firmware to accept initialization segments configurations
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*/
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err = wait_fw_init(dev, FW_PRE_INIT_TIMEOUT_MILI);
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if (err) {
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dev_err(&dev->pdev->dev, "Firmware over %d MS in pre-initializing state, aborting\n",
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FW_PRE_INIT_TIMEOUT_MILI);
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goto out;
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}
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err = mlx5_cmd_init(dev);
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if (err) {
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dev_err(&pdev->dev, "Failed initializing command interface, aborting\n");
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