powerpc/mpc85xx: Add TMU device tree support for T1040/T1042

Also add nodes and properties for thermal management support. Meanwhile
preprocessor support is needed using thermal of framework.

Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com>
Reviewed-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This commit is contained in:
Hongtao Jia 2015-11-24 14:52:46 +08:00 committed by Scott Wood
parent 2330770797
commit be489a3936
10 changed files with 106 additions and 8 deletions

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@ -43,4 +43,4 @@
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
}; };
/include/ "t1040si-post.dtsi" #include "t1040si-post.dtsi"

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@ -43,4 +43,4 @@
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
}; };
/include/ "t1040si-post.dtsi" #include "t1040si-post.dtsi"

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@ -45,4 +45,4 @@
}; };
}; };
/include/ "t1040si-post.dtsi" #include "t1040si-post.dtsi"

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@ -32,6 +32,8 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
#include <dt-bindings/thermal/thermal.h>
&bman_fbpr { &bman_fbpr {
compatible = "fsl,bman-fbpr"; compatible = "fsl,bman-fbpr";
alloc-ranges = <0 0 0x10000 0>; alloc-ranges = <0 0 0x10000 0>;
@ -484,6 +486,98 @@
reg = <0xea000 0x4000>; reg = <0xea000 0x4000>;
}; };
tmu: tmu@f0000 {
compatible = "fsl,qoriq-tmu";
reg = <0xf0000 0x1000>;
interrupts = <18 2 0 0>;
fsl,tmu-range = <0xa0000 0x90026 0x8004a 0x1006a>;
fsl,tmu-calibration = <0x00000000 0x00000025
0x00000001 0x00000028
0x00000002 0x0000002d
0x00000003 0x00000031
0x00000004 0x00000036
0x00000005 0x0000003a
0x00000006 0x00000040
0x00000007 0x00000044
0x00000008 0x0000004a
0x00000009 0x0000004f
0x0000000a 0x00000054
0x00010000 0x0000000d
0x00010001 0x00000013
0x00010002 0x00000019
0x00010003 0x0000001f
0x00010004 0x00000025
0x00010005 0x0000002d
0x00010006 0x00000033
0x00010007 0x00000043
0x00010008 0x0000004b
0x00010009 0x00000053
0x00020000 0x00000010
0x00020001 0x00000017
0x00020002 0x0000001f
0x00020003 0x00000029
0x00020004 0x00000031
0x00020005 0x0000003c
0x00020006 0x00000042
0x00020007 0x0000004d
0x00020008 0x00000056
0x00030000 0x00000012
0x00030001 0x0000001d>;
#thermal-sensor-cells = <0>;
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <5000>;
thermal-sensors = <&tmu>;
trips {
cpu_alert: cpu-alert {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit: cpu-crit {
temperature = <95000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu_alert>;
cooling-device =
<&cpu0 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
map1 {
trip = <&cpu_alert>;
cooling-device =
<&cpu1 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
map2 {
trip = <&cpu_alert>;
cooling-device =
<&cpu2 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
map3 {
trip = <&cpu_alert>;
cooling-device =
<&cpu3 THERMAL_NO_LIMIT
THERMAL_NO_LIMIT>;
};
};
};
};
scfg: global-utilities@fc000 { scfg: global-utilities@fc000 {
compatible = "fsl,t1040-scfg"; compatible = "fsl,t1040-scfg";
reg = <0xfc000 0x1000>; reg = <0xfc000 0x1000>;

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@ -50,4 +50,4 @@
}; };
}; };
/include/ "t1040si-post.dtsi" #include "t1042si-post.dtsi"

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@ -43,4 +43,4 @@
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
}; };
/include/ "t1042si-post.dtsi" #include "t1042si-post.dtsi"

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@ -45,4 +45,4 @@
}; };
}; };
/include/ "t1042si-post.dtsi" #include "t1042si-post.dtsi"

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@ -54,4 +54,4 @@
}; };
}; };
/include/ "t1042si-post.dtsi" #include "t1042si-post.dtsi"

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@ -32,6 +32,6 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
/include/ "t1040si-post.dtsi" #include "t1040si-post.dtsi"
/* Place holder for ethernet related device tree nodes */ /* Place holder for ethernet related device tree nodes */

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@ -76,6 +76,7 @@
reg = <0>; reg = <0>;
clocks = <&mux0>; clocks = <&mux0>;
next-level-cache = <&L2_1>; next-level-cache = <&L2_1>;
#cooling-cells = <2>;
L2_1: l2-cache { L2_1: l2-cache {
next-level-cache = <&cpc>; next-level-cache = <&cpc>;
}; };
@ -85,6 +86,7 @@
reg = <1>; reg = <1>;
clocks = <&mux1>; clocks = <&mux1>;
next-level-cache = <&L2_2>; next-level-cache = <&L2_2>;
#cooling-cells = <2>;
L2_2: l2-cache { L2_2: l2-cache {
next-level-cache = <&cpc>; next-level-cache = <&cpc>;
}; };
@ -94,6 +96,7 @@
reg = <2>; reg = <2>;
clocks = <&mux2>; clocks = <&mux2>;
next-level-cache = <&L2_3>; next-level-cache = <&L2_3>;
#cooling-cells = <2>;
L2_3: l2-cache { L2_3: l2-cache {
next-level-cache = <&cpc>; next-level-cache = <&cpc>;
}; };
@ -103,6 +106,7 @@
reg = <3>; reg = <3>;
clocks = <&mux3>; clocks = <&mux3>;
next-level-cache = <&L2_4>; next-level-cache = <&L2_4>;
#cooling-cells = <2>;
L2_4: l2-cache { L2_4: l2-cache {
next-level-cache = <&cpc>; next-level-cache = <&cpc>;
}; };