powerpc/mpc85xx: Add TMU device tree support for T1040/T1042
Also add nodes and properties for thermal management support. Meanwhile preprocessor support is needed using thermal of framework. Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com> Reviewed-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
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@ -43,4 +43,4 @@
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interrupt-parent = <&mpic>;
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};
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/include/ "t1040si-post.dtsi"
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#include "t1040si-post.dtsi"
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@ -43,4 +43,4 @@
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interrupt-parent = <&mpic>;
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};
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/include/ "t1040si-post.dtsi"
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#include "t1040si-post.dtsi"
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@ -45,4 +45,4 @@
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};
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};
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/include/ "t1040si-post.dtsi"
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#include "t1040si-post.dtsi"
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@ -32,6 +32,8 @@
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <dt-bindings/thermal/thermal.h>
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&bman_fbpr {
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compatible = "fsl,bman-fbpr";
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alloc-ranges = <0 0 0x10000 0>;
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@ -484,6 +486,98 @@
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reg = <0xea000 0x4000>;
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};
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tmu: tmu@f0000 {
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compatible = "fsl,qoriq-tmu";
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reg = <0xf0000 0x1000>;
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interrupts = <18 2 0 0>;
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fsl,tmu-range = <0xa0000 0x90026 0x8004a 0x1006a>;
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fsl,tmu-calibration = <0x00000000 0x00000025
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0x00000001 0x00000028
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0x00000002 0x0000002d
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0x00000003 0x00000031
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0x00000004 0x00000036
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0x00000005 0x0000003a
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0x00000006 0x00000040
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0x00000007 0x00000044
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0x00000008 0x0000004a
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0x00000009 0x0000004f
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0x0000000a 0x00000054
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0x00010000 0x0000000d
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0x00010001 0x00000013
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0x00010002 0x00000019
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0x00010003 0x0000001f
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0x00010004 0x00000025
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0x00010005 0x0000002d
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0x00010006 0x00000033
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0x00010007 0x00000043
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0x00010008 0x0000004b
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0x00010009 0x00000053
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0x00020000 0x00000010
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0x00020001 0x00000017
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0x00020002 0x0000001f
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0x00020003 0x00000029
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0x00020004 0x00000031
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0x00020005 0x0000003c
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0x00020006 0x00000042
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0x00020007 0x0000004d
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0x00020008 0x00000056
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0x00030000 0x00000012
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0x00030001 0x0000001d>;
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#thermal-sensor-cells = <0>;
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};
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thermal-zones {
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cpu_thermal: cpu-thermal {
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polling-delay-passive = <1000>;
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polling-delay = <5000>;
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thermal-sensors = <&tmu>;
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trips {
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cpu_alert: cpu-alert {
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temperature = <85000>;
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hysteresis = <2000>;
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type = "passive";
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};
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cpu_crit: cpu-crit {
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temperature = <95000>;
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hysteresis = <2000>;
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type = "critical";
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};
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};
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cooling-maps {
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map0 {
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trip = <&cpu_alert>;
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cooling-device =
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<&cpu0 THERMAL_NO_LIMIT
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THERMAL_NO_LIMIT>;
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};
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map1 {
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trip = <&cpu_alert>;
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cooling-device =
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<&cpu1 THERMAL_NO_LIMIT
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THERMAL_NO_LIMIT>;
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};
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map2 {
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trip = <&cpu_alert>;
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cooling-device =
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<&cpu2 THERMAL_NO_LIMIT
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THERMAL_NO_LIMIT>;
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};
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map3 {
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trip = <&cpu_alert>;
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cooling-device =
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<&cpu3 THERMAL_NO_LIMIT
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THERMAL_NO_LIMIT>;
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};
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};
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};
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};
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scfg: global-utilities@fc000 {
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compatible = "fsl,t1040-scfg";
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reg = <0xfc000 0x1000>;
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};
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};
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/include/ "t1040si-post.dtsi"
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#include "t1042si-post.dtsi"
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@ -43,4 +43,4 @@
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interrupt-parent = <&mpic>;
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};
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/include/ "t1042si-post.dtsi"
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#include "t1042si-post.dtsi"
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@ -45,4 +45,4 @@
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};
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};
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/include/ "t1042si-post.dtsi"
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#include "t1042si-post.dtsi"
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@ -54,4 +54,4 @@
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};
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};
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/include/ "t1042si-post.dtsi"
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#include "t1042si-post.dtsi"
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@ -32,6 +32,6 @@
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/include/ "t1040si-post.dtsi"
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#include "t1040si-post.dtsi"
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/* Place holder for ethernet related device tree nodes */
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reg = <0>;
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clocks = <&mux0>;
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next-level-cache = <&L2_1>;
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#cooling-cells = <2>;
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L2_1: l2-cache {
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next-level-cache = <&cpc>;
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};
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reg = <1>;
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clocks = <&mux1>;
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next-level-cache = <&L2_2>;
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#cooling-cells = <2>;
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L2_2: l2-cache {
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next-level-cache = <&cpc>;
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};
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reg = <2>;
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clocks = <&mux2>;
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next-level-cache = <&L2_3>;
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#cooling-cells = <2>;
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L2_3: l2-cache {
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next-level-cache = <&cpc>;
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};
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reg = <3>;
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clocks = <&mux3>;
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next-level-cache = <&L2_4>;
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#cooling-cells = <2>;
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L2_4: l2-cache {
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next-level-cache = <&cpc>;
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};
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