OMAP hwmod and clock fixes for v3.15-rc
A few OMAP hwmod and clock fixes for v3.15-rc. Probably the most useful fix is the AM43xx DPLL patch. Basic build, boot, and PM test results are here: http://www.pwsan.com/omap/testlogs/prcm-fixes-a-v3.15-rc/20140411130021/ -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJTSFhFAAoJEMePsQ0LvSpLCR4P/3h/lC04pT5ZxR3XBapS3cr1 9YWw6a6R97hUbGFe4PbodIvk5JeN9avj1QvWImxSXUipOG+57QRm3xdSy7MhbngL oGiotZHkqnpjo8EK0r+Dw9UfcDnxJtiWqwFkNp4oE5T5HG3Sj8a3SmX5YYuE0+Jc QAbMOz7qW10P0AexZTiM2dG5MmA8mg3mOJnFxOn1cTlVbNHgdjY3aJ4+mQWWFWPd ccp4hqNlMRcvuwQdseYzLW6ZZycRUd54SECWLrylCqgNz6UqD9n4EW0Jo9f3Y3y+ sn7J8C0Ac6+6OpdsJ6O49uUo/lnrfplEJBeomSDwuzIRkN0rMbp9BVLiw2gEgwz+ aboDa74zHpHdQKxbtaiLWKSzcSDM2Jv9Vj4RVkXlnSeS3XRMS0P2gxi9rhaK8ikR WyGNqH4AIKDP+tX2bdM6hHkhCNvRHs55wToasGhwrrIhZOFZBjnlPxO/NW1KoQHA uObvb9H5D094mfwGnrKQJNYxlboh0lDlaHLlycgKOW9kOsf4PbUI1/k827fmuc7X oF5K3be7QLfNtQ8hnZIU3kgmdDdQ3d4/YHhBCPbDleAX4oNYqp0MiDLxKHtYEg/O 4Ecg14rM1DxfWkMKht20ITtVQ/kAjTEGn1F8cNO1kLLJntktsJPv8JhF6t6HYvgX ZvcHuvJTYMkzOnIMMRxs =TOEq -----END PGP SIGNATURE----- Merge tag 'for-v3.15-rc/omap-fixes-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.15/fixes OMAP hwmod and clock fixes for v3.15-rc A few OMAP hwmod and clock fixes for v3.15-rc. Probably the most useful fix is the AM43xx DPLL patch. Basic build, boot, and PM test results are here: http://www.pwsan.com/omap/testlogs/prcm-fixes-a-v3.15-rc/20140411130021/
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@ -209,7 +209,7 @@ u8 omap2_init_dpll_parent(struct clk_hw *hw)
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if (v == OMAP3XXX_EN_DPLL_LPBYPASS ||
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v == OMAP3XXX_EN_DPLL_FRBYPASS)
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return 1;
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} else if (soc_is_am33xx() || cpu_is_omap44xx()) {
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} else if (soc_is_am33xx() || cpu_is_omap44xx() || soc_is_am43xx()) {
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if (v == OMAP4XXX_EN_DPLL_LPBYPASS ||
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v == OMAP4XXX_EN_DPLL_FRBYPASS ||
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v == OMAP4XXX_EN_DPLL_MNBYPASS)
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@ -255,7 +255,7 @@ unsigned long omap2_get_dpll_rate(struct clk_hw_omap *clk)
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if (v == OMAP3XXX_EN_DPLL_LPBYPASS ||
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v == OMAP3XXX_EN_DPLL_FRBYPASS)
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return __clk_get_rate(dd->clk_bypass);
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} else if (soc_is_am33xx() || cpu_is_omap44xx()) {
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} else if (soc_is_am33xx() || cpu_is_omap44xx() || soc_is_am43xx()) {
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if (v == OMAP4XXX_EN_DPLL_LPBYPASS ||
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v == OMAP4XXX_EN_DPLL_FRBYPASS ||
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v == OMAP4XXX_EN_DPLL_MNBYPASS)
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@ -2546,11 +2546,12 @@ static int __init _init(struct omap_hwmod *oh, void *data)
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return -EINVAL;
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}
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if (np)
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if (np) {
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if (of_find_property(np, "ti,no-reset-on-init", NULL))
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oh->flags |= HWMOD_INIT_NO_RESET;
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if (of_find_property(np, "ti,no-idle-on-init", NULL))
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oh->flags |= HWMOD_INIT_NO_IDLE;
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}
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oh->_state = _HWMOD_STATE_INITIALIZED;
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@ -1964,7 +1964,7 @@ static struct omap_hwmod_irq_info omap3xxx_usb_host_hs_irqs[] = {
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static struct omap_hwmod omap3xxx_usb_host_hs_hwmod = {
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.name = "usb_host_hs",
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.class = &omap3xxx_usb_host_hs_hwmod_class,
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.clkdm_name = "l3_init_clkdm",
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.clkdm_name = "usbhost_clkdm",
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.mpu_irqs = omap3xxx_usb_host_hs_irqs,
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.main_clk = "usbhost_48m_fck",
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.prcm = {
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@ -2047,7 +2047,7 @@ static struct omap_hwmod_irq_info omap3xxx_usb_tll_hs_irqs[] = {
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static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod = {
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.name = "usb_tll_hs",
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.class = &omap3xxx_usb_tll_hs_hwmod_class,
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.clkdm_name = "l3_init_clkdm",
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.clkdm_name = "core_l4_clkdm",
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.mpu_irqs = omap3xxx_usb_tll_hs_irqs,
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.main_clk = "usbtll_fck",
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.prcm = {
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