drm/i915/display: Compute has_drrs after compute has_psr
DRRS and PSR can't be enable together, so giving preference to PSR as it allows more power-savings by complete shutting down display, so to guarantee this, it should compute DRRS state after compute PSR. Cc: Srinivas K <srinivasx.k@intel.com> Cc: Hariom Pandey <hariom.pandey@intel.com> Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200825171331.17971-1-jose.souza@intel.com
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@ -2575,6 +2575,34 @@ intel_dp_compute_hdr_metadata_infoframe_sdp(struct intel_dp *intel_dp,
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intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA);
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}
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static void
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intel_dp_drrs_compute_config(struct intel_dp *intel_dp,
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struct intel_crtc_state *pipe_config,
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int output_bpp, bool constant_n)
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{
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struct intel_connector *intel_connector = intel_dp->attached_connector;
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struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
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/*
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* DRRS and PSR can't be enable together, so giving preference to PSR
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* as it allows more power-savings by complete shutting down display,
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* so to guarantee this, intel_dp_drrs_compute_config() must be called
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* after intel_psr_compute_config().
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*/
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if (pipe_config->has_psr)
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return;
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if (!intel_connector->panel.downclock_mode ||
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dev_priv->drrs.type != SEAMLESS_DRRS_SUPPORT)
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return;
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pipe_config->has_drrs = true;
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intel_link_compute_m_n(output_bpp, pipe_config->lane_count,
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intel_connector->panel.downclock_mode->clock,
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pipe_config->port_clock, &pipe_config->dp_m2_n2,
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constant_n, pipe_config->fec_enable);
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}
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int
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intel_dp_compute_config(struct intel_encoder *encoder,
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struct intel_crtc_state *pipe_config,
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@ -2605,7 +2633,6 @@ intel_dp_compute_config(struct intel_encoder *encoder,
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if (ret)
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return ret;
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pipe_config->has_drrs = false;
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if (!intel_dp_port_has_audio(dev_priv, port))
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pipe_config->has_audio = false;
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else if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
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@ -2657,21 +2684,12 @@ intel_dp_compute_config(struct intel_encoder *encoder,
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&pipe_config->dp_m_n,
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constant_n, pipe_config->fec_enable);
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if (intel_connector->panel.downclock_mode != NULL &&
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dev_priv->drrs.type == SEAMLESS_DRRS_SUPPORT) {
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pipe_config->has_drrs = true;
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intel_link_compute_m_n(output_bpp,
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pipe_config->lane_count,
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intel_connector->panel.downclock_mode->clock,
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pipe_config->port_clock,
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&pipe_config->dp_m2_n2,
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constant_n, pipe_config->fec_enable);
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}
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if (!HAS_DDI(dev_priv))
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intel_dp_set_clock(encoder, pipe_config);
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intel_psr_compute_config(intel_dp, pipe_config);
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intel_dp_drrs_compute_config(intel_dp, pipe_config, output_bpp,
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constant_n);
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intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
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intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state);
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@ -7722,16 +7740,10 @@ void intel_edp_drrs_enable(struct intel_dp *intel_dp,
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{
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struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
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if (!crtc_state->has_drrs) {
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drm_dbg_kms(&dev_priv->drm, "Panel doesn't support DRRS\n");
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if (!crtc_state->has_drrs)
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return;
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}
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if (dev_priv->psr.enabled) {
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drm_dbg_kms(&dev_priv->drm,
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"PSR enabled. Not enabling DRRS.\n");
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return;
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}
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drm_dbg_kms(&dev_priv->drm, "Enabling DRRS\n");
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mutex_lock(&dev_priv->drrs.mutex);
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if (dev_priv->drrs.dp) {
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