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PCI/DPC: Move DPC data into struct pci_dev 

We only need 25 bits of data for DPC, so I don't think it's worth the
complexity of allocating and keeping track of the struct dpc_dev separately
from the pci_dev.  Move that data into the struct pci_dev.

Link: https://lore.kernel.org/r/98323eaa18080adbe5bb30846862f09f8722d4b3.1585000084.git.sathyanarayanan.kuppuswamy@linux.intel.com
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
Bjorn Helgaas 2020-03-23 17:26:01 -07:00
parent 6d2c894415
commit be06c1b42e
2 changed files with 36 additions and 72 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

103
drivers/pci/pcie/dpc.c
View File

@ -17,13 +17,6 @@
#include "portdrv.h" #include "portdrv.h"
#include "../pci.h" #include "../pci.h"
struct dpc_dev {
struct pcie_device *dev;
u16 cap_pos;
bool rp_extensions;
u8 rp_log_size;
};
static const char * const rp_pio_error_string[] = { static const char * const rp_pio_error_string[] = {
"Configuration Request received UR Completion", /* Bit Position 0 */ "Configuration Request received UR Completion", /* Bit Position 0 */
"Configuration Request received CA Completion", /* Bit Position 1 */ "Configuration Request received CA Completion", /* Bit Position 1 */
@ -46,63 +39,42 @@ static const char * const rp_pio_error_string[] = {
"Memory Request Completion Timeout", /* Bit Position 18 */ "Memory Request Completion Timeout", /* Bit Position 18 */
}; };
static struct dpc_dev *to_dpc_dev(struct pci_dev *dev)
{
struct device *device;
device = pcie_port_find_device(dev, PCIE_PORT_SERVICE_DPC);
if (!device)
return NULL;
return get_service_data(to_pcie_device(device));
}
void pci_save_dpc_state(struct pci_dev *dev) void pci_save_dpc_state(struct pci_dev *dev)
{ {
struct dpc_dev *dpc;
struct pci_cap_saved_state *save_state; struct pci_cap_saved_state *save_state;
u16 *cap; u16 *cap;
if (!pci_is_pcie(dev)) if (!pci_is_pcie(dev))
return; return;
dpc = to_dpc_dev(dev);
if (!dpc)
return;
save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_DPC); save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_DPC);
if (!save_state) if (!save_state)
return; return;
cap = (u16 *)&save_state->cap.data[0]; cap = (u16 *)&save_state->cap.data[0];
pci_read_config_word(dev, dpc->cap_pos + PCI_EXP_DPC_CTL, cap); pci_read_config_word(dev, dev->dpc_cap + PCI_EXP_DPC_CTL, cap);
} }
void pci_restore_dpc_state(struct pci_dev *dev) void pci_restore_dpc_state(struct pci_dev *dev)
{ {
struct dpc_dev *dpc;
struct pci_cap_saved_state *save_state; struct pci_cap_saved_state *save_state;
u16 *cap; u16 *cap;
if (!pci_is_pcie(dev)) if (!pci_is_pcie(dev))
return; return;
dpc = to_dpc_dev(dev);
if (!dpc)
return;
save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_DPC); save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_DPC);
if (!save_state) if (!save_state)
return; return;
cap = (u16 *)&save_state->cap.data[0]; cap = (u16 *)&save_state->cap.data[0];
pci_write_config_word(dev, dpc->cap_pos + PCI_EXP_DPC_CTL, *cap); pci_write_config_word(dev, dev->dpc_cap + PCI_EXP_DPC_CTL, *cap);
} }
static int dpc_wait_rp_inactive(struct dpc_dev *dpc) static int dpc_wait_rp_inactive(struct pci_dev *pdev)
{ {
unsigned long timeout = jiffies + HZ; unsigned long timeout = jiffies + HZ;
struct pci_dev *pdev = dpc->dev->port; u16 cap = pdev->dpc_cap, status;
u16 cap = dpc->cap_pos, status;
pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &status); pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &status);
while (status & PCI_EXP_DPC_RP_BUSY && while (status & PCI_EXP_DPC_RP_BUSY &&
@ -119,15 +91,13 @@ static int dpc_wait_rp_inactive(struct dpc_dev *dpc)
static pci_ers_result_t dpc_reset_link(struct pci_dev *pdev) static pci_ers_result_t dpc_reset_link(struct pci_dev *pdev)
{ {
struct dpc_dev *dpc;
u16 cap; u16 cap;
/* /*
* DPC disables the Link automatically in hardware, so it has * DPC disables the Link automatically in hardware, so it has
* already been reset by the time we get here. * already been reset by the time we get here.
*/ */
dpc = to_dpc_dev(pdev); cap = pdev->dpc_cap;
cap = dpc->cap_pos;
/* /*
* Wait until the Link is inactive, then clear DPC Trigger Status * Wait until the Link is inactive, then clear DPC Trigger Status
@ -135,7 +105,7 @@ static pci_ers_result_t dpc_reset_link(struct pci_dev *pdev)
*/ */
pcie_wait_for_link(pdev, false); pcie_wait_for_link(pdev, false);
if (dpc->rp_extensions && dpc_wait_rp_inactive(dpc)) if (pdev->dpc_rp_extensions && dpc_wait_rp_inactive(pdev))
return PCI_ERS_RESULT_DISCONNECT; return PCI_ERS_RESULT_DISCONNECT;
pci_write_config_word(pdev, cap + PCI_EXP_DPC_STATUS, pci_write_config_word(pdev, cap + PCI_EXP_DPC_STATUS,
@ -147,10 +117,9 @@ static pci_ers_result_t dpc_reset_link(struct pci_dev *pdev)
return PCI_ERS_RESULT_RECOVERED; return PCI_ERS_RESULT_RECOVERED;
} }
static void dpc_process_rp_pio_error(struct dpc_dev *dpc) static void dpc_process_rp_pio_error(struct pci_dev *pdev)
{ {
struct pci_dev *pdev = dpc->dev->port; u16 cap = pdev->dpc_cap, dpc_status, first_error;
u16 cap = dpc->cap_pos, dpc_status, first_error;
u32 status, mask, sev, syserr, exc, dw0, dw1, dw2, dw3, log, prefix; u32 status, mask, sev, syserr, exc, dw0, dw1, dw2, dw3, log, prefix;
int i; int i;
@ -175,7 +144,7 @@ static void dpc_process_rp_pio_error(struct dpc_dev *dpc)
first_error == i ? " (First)" : ""); first_error == i ? " (First)" : "");
} }
if (dpc->rp_log_size < 4) if (pdev->dpc_rp_log_size < 4)
goto clear_status; goto clear_status;
pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_HEADER_LOG, pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_HEADER_LOG,
&dw0); &dw0);
@ -188,12 +157,12 @@ static void dpc_process_rp_pio_error(struct dpc_dev *dpc)
pci_err(pdev, "TLP Header: %#010x %#010x %#010x %#010x\n", pci_err(pdev, "TLP Header: %#010x %#010x %#010x %#010x\n",
dw0, dw1, dw2, dw3); dw0, dw1, dw2, dw3);
if (dpc->rp_log_size < 5) if (pdev->dpc_rp_log_size < 5)
goto clear_status; goto clear_status;
pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_IMPSPEC_LOG, &log); pci_read_config_dword(pdev, cap + PCI_EXP_DPC_RP_PIO_IMPSPEC_LOG, &log);
pci_err(pdev, "RP PIO ImpSpec Log %#010x\n", log); pci_err(pdev, "RP PIO ImpSpec Log %#010x\n", log);
for (i = 0; i < dpc->rp_log_size - 5; i++) { for (i = 0; i < pdev->dpc_rp_log_size - 5; i++) {
pci_read_config_dword(pdev, pci_read_config_dword(pdev,
cap + PCI_EXP_DPC_RP_PIO_TLPPREFIX_LOG, &prefix); cap + PCI_EXP_DPC_RP_PIO_TLPPREFIX_LOG, &prefix);
pci_err(pdev, "TLP Prefix Header: dw%d, %#010x\n", i, prefix); pci_err(pdev, "TLP Prefix Header: dw%d, %#010x\n", i, prefix);
@ -226,10 +195,9 @@ static int dpc_get_aer_uncorrect_severity(struct pci_dev *dev,
static irqreturn_t dpc_handler(int irq, void *context) static irqreturn_t dpc_handler(int irq, void *context)
{ {
struct pci_dev *pdev = context;
u16 cap = pdev->dpc_cap, status, source, reason, ext_reason;
struct aer_err_info info; struct aer_err_info info;
struct dpc_dev *dpc = context;
struct pci_dev *pdev = dpc->dev->port;
u16 cap = dpc->cap_pos, status, source, reason, ext_reason;
pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &status); pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &status);
pci_read_config_word(pdev, cap + PCI_EXP_DPC_SOURCE_ID, &source); pci_read_config_word(pdev, cap + PCI_EXP_DPC_SOURCE_ID, &source);
@ -248,8 +216,8 @@ static irqreturn_t dpc_handler(int irq, void *context)
"reserved error"); "reserved error");
/* show RP PIO error detail information */ /* show RP PIO error detail information */
if (dpc->rp_extensions && reason == 3 && ext_reason == 0) if (pdev->dpc_rp_extensions && reason == 3 && ext_reason == 0)
dpc_process_rp_pio_error(dpc); dpc_process_rp_pio_error(pdev);
else if (reason == 0 && else if (reason == 0 &&
dpc_get_aer_uncorrect_severity(pdev, &info) && dpc_get_aer_uncorrect_severity(pdev, &info) &&
aer_get_device_error_info(pdev, &info)) { aer_get_device_error_info(pdev, &info)) {
@ -266,9 +234,8 @@ static irqreturn_t dpc_handler(int irq, void *context)
static irqreturn_t dpc_irq(int irq, void *context) static irqreturn_t dpc_irq(int irq, void *context)
{ {
struct dpc_dev *dpc = (struct dpc_dev *)context; struct pci_dev *pdev = context;
struct pci_dev *pdev = dpc->dev->port; u16 cap = pdev->dpc_cap, status;
u16 cap = dpc->cap_pos, status;
pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &status); pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &status);
@ -285,7 +252,6 @@ static irqreturn_t dpc_irq(int irq, void *context)
#define FLAG(x, y) (((x) & (y)) ? '+' : '-') #define FLAG(x, y) (((x) & (y)) ? '+' : '-')
static int dpc_probe(struct pcie_device *dev) static int dpc_probe(struct pcie_device *dev)
{ {
struct dpc_dev *dpc;
struct pci_dev *pdev = dev->port; struct pci_dev *pdev = dev->port;
struct device *device = &dev->device; struct device *device = &dev->device;
int status; int status;
@ -294,43 +260,37 @@ static int dpc_probe(struct pcie_device *dev)
if (pcie_aer_get_firmware_first(pdev) && !pcie_ports_dpc_native) if (pcie_aer_get_firmware_first(pdev) && !pcie_ports_dpc_native)
return -ENOTSUPP; return -ENOTSUPP;
dpc = devm_kzalloc(device, sizeof(*dpc), GFP_KERNEL); pdev->dpc_cap = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_DPC);
if (!dpc)
return -ENOMEM;
dpc->cap_pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_DPC);
dpc->dev = dev;
set_service_data(dev, dpc);
status = devm_request_threaded_irq(device, dev->irq, dpc_irq, status = devm_request_threaded_irq(device, dev->irq, dpc_irq,
dpc_handler, IRQF_SHARED, dpc_handler, IRQF_SHARED,
"pcie-dpc", dpc); "pcie-dpc", pdev);
if (status) { if (status) {
pci_warn(pdev, "request IRQ%d failed: %d\n", dev->irq, pci_warn(pdev, "request IRQ%d failed: %d\n", dev->irq,
status); status);
return status; return status;
} }
pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CAP, &cap); pci_read_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CAP, &cap);
pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, &ctl); pci_read_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CTL, &ctl);
dpc->rp_extensions = (cap & PCI_EXP_DPC_CAP_RP_EXT); pdev->dpc_rp_extensions = (cap & PCI_EXP_DPC_CAP_RP_EXT) ? 1 : 0;
if (dpc->rp_extensions) { if (pdev->dpc_rp_extensions) {
dpc->rp_log_size = (cap & PCI_EXP_DPC_RP_PIO_LOG_SIZE) >> 8; pdev->dpc_rp_log_size = (cap & PCI_EXP_DPC_RP_PIO_LOG_SIZE) >> 8;
if (dpc->rp_log_size < 4 || dpc->rp_log_size > 9) { if (pdev->dpc_rp_log_size < 4 || pdev->dpc_rp_log_size > 9) {
pci_err(pdev, "RP PIO log size %u is invalid\n", pci_err(pdev, "RP PIO log size %u is invalid\n",
dpc->rp_log_size); pdev->dpc_rp_log_size);
dpc->rp_log_size = 0; pdev->dpc_rp_log_size = 0;
} }
} }
ctl = (ctl & 0xfff4) | PCI_EXP_DPC_CTL_EN_FATAL | PCI_EXP_DPC_CTL_INT_EN; ctl = (ctl & 0xfff4) | PCI_EXP_DPC_CTL_EN_FATAL | PCI_EXP_DPC_CTL_INT_EN;
pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, ctl); pci_write_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CTL, ctl);
pci_info(pdev, "error containment capabilities: Int Msg #%d, RPExt%c PoisonedTLP%c SwTrigger%c RP PIO Log %d, DL_ActiveErr%c\n", pci_info(pdev, "error containment capabilities: Int Msg #%d, RPExt%c PoisonedTLP%c SwTrigger%c RP PIO Log %d, DL_ActiveErr%c\n",
cap & PCI_EXP_DPC_IRQ, FLAG(cap, PCI_EXP_DPC_CAP_RP_EXT), cap & PCI_EXP_DPC_IRQ, FLAG(cap, PCI_EXP_DPC_CAP_RP_EXT),
FLAG(cap, PCI_EXP_DPC_CAP_POISONED_TLP), FLAG(cap, PCI_EXP_DPC_CAP_POISONED_TLP),
FLAG(cap, PCI_EXP_DPC_CAP_SW_TRIGGER), dpc->rp_log_size, FLAG(cap, PCI_EXP_DPC_CAP_SW_TRIGGER), pdev->dpc_rp_log_size,
FLAG(cap, PCI_EXP_DPC_CAP_DL_ACTIVE)); FLAG(cap, PCI_EXP_DPC_CAP_DL_ACTIVE));
pci_add_ext_cap_save_buffer(pdev, PCI_EXT_CAP_ID_DPC, sizeof(u16)); pci_add_ext_cap_save_buffer(pdev, PCI_EXT_CAP_ID_DPC, sizeof(u16));
@ -339,13 +299,12 @@ static int dpc_probe(struct pcie_device *dev)
static void dpc_remove(struct pcie_device *dev) static void dpc_remove(struct pcie_device *dev)
{ {
struct dpc_dev *dpc = get_service_data(dev);
struct pci_dev *pdev = dev->port; struct pci_dev *pdev = dev->port;
u16 ctl; u16 ctl;
pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, &ctl); pci_read_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CTL, &ctl);
ctl &= ~(PCI_EXP_DPC_CTL_EN_FATAL | PCI_EXP_DPC_CTL_INT_EN); ctl &= ~(PCI_EXP_DPC_CTL_EN_FATAL | PCI_EXP_DPC_CTL_INT_EN);
pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, ctl); pci_write_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CTL, ctl);
} }
static struct pcie_port_service_driver dpcdriver = { static struct pcie_port_service_driver dpcdriver = {

5
include/linux/pci.h
View File

@ -444,6 +444,11 @@ struct pci_dev {
const struct attribute_group **msi_irq_groups; const struct attribute_group **msi_irq_groups;
#endif #endif
struct pci_vpd *vpd; struct pci_vpd *vpd;
#ifdef CONFIG_PCIE_DPC
u16 dpc_cap;
unsigned int dpc_rp_extensions:1;
u8 dpc_rp_log_size;
#endif
#ifdef CONFIG_PCI_ATS #ifdef CONFIG_PCI_ATS
union { union {
struct pci_sriov *sriov; /* PF: SR-IOV info */ struct pci_sriov *sriov; /* PF: SR-IOV info */