This pull request contains Broadcom ARM64-based SoCs Device Tree updates for
4.12, please pull the following: - Rob enables the cryptographic block on Northstar 2 (SPU) by adding the proper Device Tree nodes - Jon replaces all occurences of: status = "ok" with status = "okay" to better conform to the Device Tree specification -----BEGIN PGP SIGNATURE----- iQIcBAABCAAGBQJY1VaOAAoJEIfQlpxEBwcEcV4P/3jbaahcHY8RQgzUEV2IOHL6 r82SI54BGNzrLRZQCeOQopUzTSiVtpSuFkjaZZr3zsKg0rFOQL5krQQiqXFq4m4G uzzBRCFXJb4ePE/czylE6YyNZFjAiQmpvWltNJwRQ8vbEml5M3B/PEfWaW9OTFxx 5FulbvF1RG4zU0BG3DS1YggejQqNmNiT/CvwVBg1qLq2m9yGXd8XVsIRKMVxKGTx YZnxAEKueE/DqY5N9WvwKcTPP7JzBPPSPLqbSlPFI5+uRKn/EQ6pHBbSzCQXGEjb hpfKkMK2gFhnNw0Uvb9k5cT/sbst3evsaYGTE6q2DplKchCF1D1OQbUK5Dqn2ork MvitS7zkOavHrx+QPP0QkwPjWJrcCNnlIGwjFR/L8xl1Cz0WvSg9npyLVJr5kjmH uLDnx1RxKzDDaf/K42ZmuABRC7OURf2w7ARoAD4Z8Y4hRe+in7A9YTP8pHMjOcgG BR1aSr6zgLnqvMJDT+p0WrCTiEnd4rOJKL2zM/mmYdlYzkLe+HQ1YTi3mkCkEaTR Ao6TH8uAGJnc5ve7xY50ChNDlbKOUL6Nip/RMiayqr6JfG5OkMoqkrhF9gLYcnNo c4zLRT7sKBXJrYHqgo3xZuk41mYaiqoSsYiuXS283T1miOK1BWZ0ZzqIP+MH53yz yA1EmWP1XdHuU6hvKrZ8 =yeV5 -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-4.12/devicetree-arm64' of http://github.com/Broadcom/stblinux into next/dt64 Pull "Broadcom devicetree-arm64 changes for 4.12" from Florian Fainelli: This pull request contains Broadcom ARM64-based SoCs Device Tree updates for 4.12, please pull the following: - Rob enables the cryptographic block on Northstar 2 (SPU) by adding the proper Device Tree nodes - Jon replaces all occurences of: status = "ok" with status = "okay" to better conform to the Device Tree specification * tag 'arm-soc/for-4.12/devicetree-arm64' of http://github.com/Broadcom/stblinux: arm64: dts: NS2: convert "ok" to "okay" arm64: dts: NS2: Add Broadcom SPU driver DT entry
This commit is contained in:
commit
bda484e76e
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@ -57,55 +57,55 @@
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};
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&enet {
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status = "ok";
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status = "okay";
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};
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&pci_phy0 {
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status = "ok";
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status = "okay";
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};
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&pci_phy1 {
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status = "ok";
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status = "okay";
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};
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&pcie0 {
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status = "ok";
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status = "okay";
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};
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&pcie4 {
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status = "ok";
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status = "okay";
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};
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&pcie8 {
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status = "ok";
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status = "okay";
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};
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&i2c0 {
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status = "ok";
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status = "okay";
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};
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&i2c1 {
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status = "ok";
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status = "okay";
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};
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&uart0 {
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status = "ok";
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status = "okay";
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};
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&uart1 {
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status = "ok";
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status = "okay";
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};
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&uart2 {
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status = "ok";
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status = "okay";
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};
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&uart3 {
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status = "ok";
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status = "okay";
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};
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&ssp0 {
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status = "ok";
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status = "okay";
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slic@0 {
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compatible = "silabs,si3226x";
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@ -126,7 +126,7 @@
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};
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&ssp1 {
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status = "ok";
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status = "okay";
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at25@0 {
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compatible = "atmel,at25";
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@ -150,23 +150,23 @@
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};
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&sata_phy0 {
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status = "ok";
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status = "okay";
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};
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&sata_phy1 {
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status = "ok";
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status = "okay";
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};
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&sata {
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status = "ok";
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status = "okay";
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};
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&sdio0 {
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status = "ok";
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status = "okay";
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};
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&sdio1 {
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status = "ok";
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status = "okay";
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};
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&nand {
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@ -54,15 +54,15 @@
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};
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&enet {
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status = "ok";
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status = "okay";
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};
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&i2c0 {
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status = "ok";
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status = "okay";
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};
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&i2c1 {
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status = "ok";
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status = "okay";
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};
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&mdio_mux_iproc {
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@ -122,27 +122,27 @@
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};
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&pci_phy0 {
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status = "ok";
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status = "okay";
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};
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&pcie0 {
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status = "ok";
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status = "okay";
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};
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&pcie8 {
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status = "ok";
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status = "okay";
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};
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&sata_phy0 {
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status = "ok";
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status = "okay";
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};
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&sata_phy1 {
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status = "ok";
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status = "okay";
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};
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&sata {
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status = "ok";
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status = "okay";
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};
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&qspi {
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@ -187,5 +187,5 @@
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};
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&uart3 {
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status = "ok";
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status = "okay";
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};
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@ -217,6 +217,12 @@
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brcm,use-bcm-hdr;
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};
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crypto0: crypto@612d0000 {
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compatible = "brcm,spum-crypto";
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reg = <0x612d0000 0x900>;
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mboxes = <&pdc0 0>;
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};
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pdc1: iproc-pdc1@612e0000 {
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compatible = "brcm,iproc-pdc-mbox";
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reg = <0x612e0000 0x445>; /* PDC FS1 regs */
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@ -226,6 +232,12 @@
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brcm,use-bcm-hdr;
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};
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crypto1: crypto@612f0000 {
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compatible = "brcm,spum-crypto";
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reg = <0x612f0000 0x900>;
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mboxes = <&pdc1 0>;
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};
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pdc2: iproc-pdc2@61300000 {
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compatible = "brcm,iproc-pdc-mbox";
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reg = <0x61300000 0x445>; /* PDC FS2 regs */
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@ -235,6 +247,12 @@
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brcm,use-bcm-hdr;
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};
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crypto2: crypto@61310000 {
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compatible = "brcm,spum-crypto";
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reg = <0x61310000 0x900>;
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mboxes = <&pdc2 0>;
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};
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pdc3: iproc-pdc3@61320000 {
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compatible = "brcm,iproc-pdc-mbox";
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reg = <0x61320000 0x445>; /* PDC FS3 regs */
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brcm,use-bcm-hdr;
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};
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crypto3: crypto@61330000 {
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compatible = "brcm,spum-crypto";
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reg = <0x61330000 0x900>;
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mboxes = <&pdc3 0>;
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};
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dma0: dma@61360000 {
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compatible = "arm,pl330", "arm,primecell";
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reg = <0x61360000 0x1000>;
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