ARM64: dts: meson-gxm: add SCPI configuration for GXM

This adds the SCPI DVFS clock index and configures the CPU cores
accordingly.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This commit is contained in:
Martin Blumenstingl 2016-12-03 00:08:49 +01:00 committed by Kevin Hilman
parent 47961f1353
commit bd97abc0d0
1 changed files with 10 additions and 0 deletions

View File

@ -85,6 +85,7 @@
reg = <0x0 0x100>; reg = <0x0 0x100>;
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&l2>; next-level-cache = <&l2>;
clocks = <&scpi_dvfs 1>;
}; };
cpu5: cpu@101 { cpu5: cpu@101 {
@ -93,6 +94,7 @@
reg = <0x0 0x101>; reg = <0x0 0x101>;
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&l2>; next-level-cache = <&l2>;
clocks = <&scpi_dvfs 1>;
}; };
cpu6: cpu@102 { cpu6: cpu@102 {
@ -101,6 +103,7 @@
reg = <0x0 0x102>; reg = <0x0 0x102>;
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&l2>; next-level-cache = <&l2>;
clocks = <&scpi_dvfs 1>;
}; };
cpu7: cpu@103 { cpu7: cpu@103 {
@ -109,10 +112,17 @@
reg = <0x0 0x103>; reg = <0x0 0x103>;
enable-method = "psci"; enable-method = "psci";
next-level-cache = <&l2>; next-level-cache = <&l2>;
clocks = <&scpi_dvfs 1>;
}; };
}; };
}; };
&scpi_dvfs {
clock-indices = <0 1>;
clock-output-names = "vbig", "vlittle";
};
&vpu { &vpu {
compatible = "amlogic,meson-gxm-vpu", "amlogic,meson-gx-vpu"; compatible = "amlogic,meson-gxm-vpu", "amlogic,meson-gx-vpu";
}; };