drm/komeda: komeda_dev/pipeline/component definition and initialzation
1. Added a brief definition of komeda_dev/pipeline/component, this change didn't add the detailed component features and capabilities, which will be added in the following changes. 2. Corresponding resources discovery and initialzation functions. Changes in v4: - Deleted unnecessary headers Changes in v3: - Fixed style problem found by checkpatch.pl --strict. Changes in v2: - Unified abbreviation of "pipeline" to "pipe". Signed-off-by: James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Reviewed-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
This commit is contained in:
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37fc9bb022
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bd628c1bed
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@ -37,4 +37,6 @@ config DRM_MALI_DISPLAY
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If compiled as a module it will be called mali-dp.
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source "drivers/gpu/drm/arm/display/Kconfig"
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endmenu
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@ -3,3 +3,4 @@ obj-$(CONFIG_DRM_HDLCD) += hdlcd.o
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mali-dp-y := malidp_drv.o malidp_hw.o malidp_planes.o malidp_crtc.o
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mali-dp-y += malidp_mw.o
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obj-$(CONFIG_DRM_MALI_DISPLAY) += mali-dp.o
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obj-$(CONFIG_DRM_KOMEDA) += display/
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@ -0,0 +1,3 @@
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# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_DRM_KOMEDA) += komeda/
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@ -0,0 +1,14 @@
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# SPDX-License-Identifier: GPL-2.0
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config DRM_KOMEDA
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tristate "ARM Komeda display driver"
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depends on DRM && OF
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depends on COMMON_CLK
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select DRM_KMS_HELPER
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select DRM_KMS_CMA_HELPER
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select DRM_GEM_CMA_HELPER
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select VIDEOMODE_HELPERS
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help
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Choose this option if you want to compile the ARM Komeda display
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Processor driver. It supports the D71 variants of the hardware.
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If compiled as a module it will be called komeda.
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@ -0,0 +1,23 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* (C) COPYRIGHT 2018 ARM Limited. All rights reserved.
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* Author: James.Qian.Wang <james.qian.wang@arm.com>
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*
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*/
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#ifndef _MALIDP_PRODUCT_H_
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#define _MALIDP_PRODUCT_H_
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/* Product identification */
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#define MALIDP_CORE_ID(__product, __major, __minor, __status) \
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((((__product) & 0xFFFF) << 16) | (((__major) & 0xF) << 12) | \
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(((__minor) & 0xF) << 8) | ((__status) & 0xFF))
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#define MALIDP_CORE_ID_PRODUCT_ID(__core_id) ((__u32)(__core_id) >> 16)
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#define MALIDP_CORE_ID_MAJOR(__core_id) (((__u32)(__core_id) >> 12) & 0xF)
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#define MALIDP_CORE_ID_MINOR(__core_id) (((__u32)(__core_id) >> 8) & 0xF)
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#define MALIDP_CORE_ID_STATUS(__core_id) (((__u32)(__core_id)) & 0xFF)
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/* Mali-display product IDs */
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#define MALIDP_D71_PRODUCT_ID 0x0071
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#endif /* _MALIDP_PRODUCT_H_ */
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@ -0,0 +1,16 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* (C) COPYRIGHT 2018 ARM Limited. All rights reserved.
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* Author: James.Qian.Wang <james.qian.wang@arm.com>
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*
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*/
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#ifndef _MALIDP_UTILS_
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#define _MALIDP_UTILS_
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#define has_bit(nr, mask) (BIT(nr) & (mask))
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#define has_bits(bits, mask) (((bits) & (mask)) == (bits))
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#define dp_for_each_set_bit(bit, mask) \
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for_each_set_bit((bit), ((unsigned long *)&(mask)), sizeof(mask) * 8)
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#endif /* _MALIDP_UTILS_ */
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@ -0,0 +1,11 @@
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# SPDX-License-Identifier: GPL-2.0
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ccflags-y := \
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-I$(src)/../include \
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-I$(src)
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komeda-y := \
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komeda_dev.o \
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komeda_pipeline.o \
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obj-$(CONFIG_DRM_KOMEDA) += komeda.o
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@ -0,0 +1,114 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* (C) COPYRIGHT 2018 ARM Limited. All rights reserved.
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* Author: James.Qian.Wang <james.qian.wang@arm.com>
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*
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*/
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#include <linux/platform_device.h>
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#include <linux/of_device.h>
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#include <linux/of_graph.h>
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#include "komeda_dev.h"
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struct komeda_dev *komeda_dev_create(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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const struct komeda_product_data *product;
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struct komeda_dev *mdev;
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struct resource *io_res;
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int err = 0;
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product = of_device_get_match_data(dev);
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if (!product)
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return ERR_PTR(-ENODEV);
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io_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!io_res) {
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DRM_ERROR("No registers defined.\n");
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return ERR_PTR(-ENODEV);
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}
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mdev = devm_kzalloc(dev, sizeof(*mdev), GFP_KERNEL);
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if (!mdev)
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return ERR_PTR(-ENOMEM);
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mdev->dev = dev;
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mdev->reg_base = devm_ioremap_resource(dev, io_res);
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if (IS_ERR(mdev->reg_base)) {
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DRM_ERROR("Map register space failed.\n");
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err = PTR_ERR(mdev->reg_base);
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mdev->reg_base = NULL;
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goto err_cleanup;
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}
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mdev->pclk = devm_clk_get(dev, "pclk");
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if (IS_ERR(mdev->pclk)) {
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DRM_ERROR("Get APB clk failed.\n");
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err = PTR_ERR(mdev->pclk);
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mdev->pclk = NULL;
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goto err_cleanup;
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}
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/* Enable APB clock to access the registers */
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clk_prepare_enable(mdev->pclk);
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mdev->funcs = product->identify(mdev->reg_base, &mdev->chip);
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if (!komeda_product_match(mdev, product->product_id)) {
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DRM_ERROR("DT configured %x mismatch with real HW %x.\n",
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product->product_id,
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MALIDP_CORE_ID_PRODUCT_ID(mdev->chip.core_id));
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err = -ENODEV;
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goto err_cleanup;
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}
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DRM_INFO("Found ARM Mali-D%x version r%dp%d\n",
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MALIDP_CORE_ID_PRODUCT_ID(mdev->chip.core_id),
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MALIDP_CORE_ID_MAJOR(mdev->chip.core_id),
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MALIDP_CORE_ID_MINOR(mdev->chip.core_id));
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err = mdev->funcs->enum_resources(mdev);
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if (err) {
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DRM_ERROR("enumerate display resource failed.\n");
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goto err_cleanup;
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}
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return mdev;
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err_cleanup:
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komeda_dev_destroy(mdev);
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return ERR_PTR(err);
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}
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void komeda_dev_destroy(struct komeda_dev *mdev)
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{
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struct device *dev = mdev->dev;
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struct komeda_dev_funcs *funcs = mdev->funcs;
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int i;
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for (i = 0; i < mdev->n_pipelines; i++) {
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komeda_pipeline_destroy(mdev, mdev->pipelines[i]);
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mdev->pipelines[i] = NULL;
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}
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mdev->n_pipelines = 0;
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if (funcs && funcs->cleanup)
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funcs->cleanup(mdev);
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if (mdev->reg_base) {
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devm_iounmap(dev, mdev->reg_base);
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mdev->reg_base = NULL;
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}
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if (mdev->mclk) {
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devm_clk_put(dev, mdev->mclk);
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mdev->mclk = NULL;
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}
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if (mdev->pclk) {
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clk_disable_unprepare(mdev->pclk);
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devm_clk_put(dev, mdev->pclk);
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mdev->pclk = NULL;
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}
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devm_kfree(dev, mdev);
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}
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@ -0,0 +1,98 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* (C) COPYRIGHT 2018 ARM Limited. All rights reserved.
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* Author: James.Qian.Wang <james.qian.wang@arm.com>
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*
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*/
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#ifndef _KOMEDA_DEV_H_
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#define _KOMEDA_DEV_H_
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#include <linux/device.h>
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#include <linux/clk.h>
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#include "komeda_pipeline.h"
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#include "malidp_product.h"
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/* malidp device id */
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enum {
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MALI_D71 = 0,
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};
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/* pipeline DT ports */
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enum {
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KOMEDA_OF_PORT_OUTPUT = 0,
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KOMEDA_OF_PORT_COPROC = 1,
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};
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struct komeda_chip_info {
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u32 arch_id;
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u32 core_id;
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u32 core_info;
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u32 bus_width;
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};
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struct komeda_product_data {
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u32 product_id;
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struct komeda_dev_funcs *(*identify)(u32 __iomem *reg,
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struct komeda_chip_info *info);
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};
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struct komeda_dev;
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/**
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* struct komeda_dev_funcs
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*
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* Supplied by chip level and returned by the chip entry function xxx_identify,
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*/
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struct komeda_dev_funcs {
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/**
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* @enum_resources:
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*
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* for CHIP to report or add pipeline and component resources to CORE
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*/
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int (*enum_resources)(struct komeda_dev *mdev);
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/** @cleanup: call to chip to cleanup komeda_dev->chip data */
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void (*cleanup)(struct komeda_dev *mdev);
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};
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/**
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* struct komeda_dev
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*
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* Pipeline and component are used to describe how to handle the pixel data.
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* komeda_device is for describing the whole view of the device, and the
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* control-abilites of device.
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*/
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struct komeda_dev {
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struct device *dev;
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u32 __iomem *reg_base;
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struct komeda_chip_info chip;
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/** @pclk: APB clock for register access */
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struct clk *pclk;
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/** @mck: HW main engine clk */
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struct clk *mclk;
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int n_pipelines;
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struct komeda_pipeline *pipelines[KOMEDA_MAX_PIPELINES];
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/** @funcs: chip funcs to access to HW */
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struct komeda_dev_funcs *funcs;
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/**
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* @chip_data:
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*
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* chip data will be added by &komeda_dev_funcs.enum_resources() and
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* destroyed by &komeda_dev_funcs.cleanup()
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*/
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void *chip_data;
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};
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static inline bool
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komeda_product_match(struct komeda_dev *mdev, u32 target)
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{
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return MALIDP_CORE_ID_PRODUCT_ID(mdev->chip.core_id) == target;
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}
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struct komeda_dev *komeda_dev_create(struct device *dev);
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void komeda_dev_destroy(struct komeda_dev *mdev);
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#endif /*_KOMEDA_DEV_H_*/
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@ -0,0 +1,196 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* (C) COPYRIGHT 2018 ARM Limited. All rights reserved.
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* Author: James.Qian.Wang <james.qian.wang@arm.com>
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*
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*/
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#include "komeda_dev.h"
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#include "komeda_pipeline.h"
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/** komeda_pipeline_add - Add a pipeline to &komeda_dev */
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struct komeda_pipeline *
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komeda_pipeline_add(struct komeda_dev *mdev, size_t size,
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struct komeda_pipeline_funcs *funcs)
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{
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struct komeda_pipeline *pipe;
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if (mdev->n_pipelines + 1 > KOMEDA_MAX_PIPELINES) {
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DRM_ERROR("Exceed max support %d pipelines.\n",
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KOMEDA_MAX_PIPELINES);
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return NULL;
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}
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if (size < sizeof(*pipe)) {
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DRM_ERROR("Request pipeline size too small.\n");
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return NULL;
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}
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pipe = devm_kzalloc(mdev->dev, size, GFP_KERNEL);
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if (!pipe)
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return NULL;
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pipe->mdev = mdev;
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pipe->id = mdev->n_pipelines;
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pipe->funcs = funcs;
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mdev->pipelines[mdev->n_pipelines] = pipe;
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mdev->n_pipelines++;
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return pipe;
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}
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void komeda_pipeline_destroy(struct komeda_dev *mdev,
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struct komeda_pipeline *pipe)
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{
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struct komeda_component *c;
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int i;
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dp_for_each_set_bit(i, pipe->avail_comps) {
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c = komeda_pipeline_get_component(pipe, i);
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komeda_component_destroy(mdev, c);
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}
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clk_put(pipe->pxlclk);
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clk_put(pipe->aclk);
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devm_kfree(mdev->dev, pipe);
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}
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struct komeda_component **
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komeda_pipeline_get_component_pos(struct komeda_pipeline *pipe, int id)
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{
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struct komeda_dev *mdev = pipe->mdev;
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struct komeda_pipeline *temp = NULL;
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struct komeda_component **pos = NULL;
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switch (id) {
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case KOMEDA_COMPONENT_LAYER0:
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case KOMEDA_COMPONENT_LAYER1:
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case KOMEDA_COMPONENT_LAYER2:
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case KOMEDA_COMPONENT_LAYER3:
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pos = to_cpos(pipe->layers[id - KOMEDA_COMPONENT_LAYER0]);
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break;
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case KOMEDA_COMPONENT_WB_LAYER:
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pos = to_cpos(pipe->wb_layer);
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break;
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case KOMEDA_COMPONENT_COMPIZ0:
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case KOMEDA_COMPONENT_COMPIZ1:
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temp = mdev->pipelines[id - KOMEDA_COMPONENT_COMPIZ0];
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if (!temp) {
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DRM_ERROR("compiz-%d doesn't exist.\n", id);
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return NULL;
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}
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pos = to_cpos(temp->compiz);
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break;
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case KOMEDA_COMPONENT_SCALER0:
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case KOMEDA_COMPONENT_SCALER1:
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pos = to_cpos(pipe->scalers[id - KOMEDA_COMPONENT_SCALER0]);
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break;
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case KOMEDA_COMPONENT_IPS0:
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case KOMEDA_COMPONENT_IPS1:
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temp = mdev->pipelines[id - KOMEDA_COMPONENT_IPS0];
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if (!temp) {
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DRM_ERROR("ips-%d doesn't exist.\n", id);
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return NULL;
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}
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pos = to_cpos(temp->improc);
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break;
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case KOMEDA_COMPONENT_TIMING_CTRLR:
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pos = to_cpos(pipe->ctrlr);
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break;
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default:
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pos = NULL;
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DRM_ERROR("Unknown pipeline resource ID: %d.\n", id);
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break;
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}
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return pos;
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}
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struct komeda_component *
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komeda_pipeline_get_component(struct komeda_pipeline *pipe, int id)
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{
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struct komeda_component **pos = NULL;
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struct komeda_component *c = NULL;
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pos = komeda_pipeline_get_component_pos(pipe, id);
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if (pos)
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c = *pos;
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return c;
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}
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/** komeda_component_add - Add a component to &komeda_pipeline */
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struct komeda_component *
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komeda_component_add(struct komeda_pipeline *pipe,
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size_t comp_sz, u32 id, u32 hw_id,
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struct komeda_component_funcs *funcs,
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u8 max_active_inputs, u32 supported_inputs,
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u8 max_active_outputs, u32 __iomem *reg,
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const char *name_fmt, ...)
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{
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struct komeda_component **pos;
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struct komeda_component *c;
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int idx, *num = NULL;
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if (max_active_inputs > KOMEDA_COMPONENT_N_INPUTS) {
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WARN(1, "please large KOMEDA_COMPONENT_N_INPUTS to %d.\n",
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max_active_inputs);
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return NULL;
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}
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pos = komeda_pipeline_get_component_pos(pipe, id);
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if (!pos || (*pos))
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return NULL;
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if (has_bit(id, KOMEDA_PIPELINE_LAYERS)) {
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idx = id - KOMEDA_COMPONENT_LAYER0;
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num = &pipe->n_layers;
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if (idx != pipe->n_layers) {
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DRM_ERROR("please add Layer by id sequence.\n");
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return NULL;
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}
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} else if (has_bit(id, KOMEDA_PIPELINE_SCALERS)) {
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idx = id - KOMEDA_COMPONENT_SCALER0;
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num = &pipe->n_scalers;
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if (idx != pipe->n_scalers) {
|
||||
DRM_ERROR("please add Scaler by id sequence.\n");
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
||||
c = devm_kzalloc(pipe->mdev->dev, comp_sz, GFP_KERNEL);
|
||||
if (!c)
|
||||
return NULL;
|
||||
|
||||
c->id = id;
|
||||
c->hw_id = hw_id;
|
||||
c->reg = reg;
|
||||
c->pipeline = pipe;
|
||||
c->max_active_inputs = max_active_inputs;
|
||||
c->max_active_outputs = max_active_outputs;
|
||||
c->supported_inputs = supported_inputs;
|
||||
c->funcs = funcs;
|
||||
|
||||
if (name_fmt) {
|
||||
va_list args;
|
||||
|
||||
va_start(args, name_fmt);
|
||||
vsnprintf(c->name, sizeof(c->name), name_fmt, args);
|
||||
va_end(args);
|
||||
}
|
||||
|
||||
if (num)
|
||||
*num = *num + 1;
|
||||
|
||||
pipe->avail_comps |= BIT(c->id);
|
||||
*pos = c;
|
||||
|
||||
return c;
|
||||
}
|
||||
|
||||
void komeda_component_destroy(struct komeda_dev *mdev,
|
||||
struct komeda_component *c)
|
||||
{
|
||||
devm_kfree(mdev->dev, c);
|
||||
}
|
|
@ -0,0 +1,348 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* (C) COPYRIGHT 2018 ARM Limited. All rights reserved.
|
||||
* Author: James.Qian.Wang <james.qian.wang@arm.com>
|
||||
*
|
||||
*/
|
||||
#ifndef _KOMEDA_PIPELINE_H_
|
||||
#define _KOMEDA_PIPELINE_H_
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <drm/drm_atomic.h>
|
||||
#include <drm/drm_atomic_helper.h>
|
||||
#include "malidp_utils.h"
|
||||
|
||||
#define KOMEDA_MAX_PIPELINES 2
|
||||
#define KOMEDA_PIPELINE_MAX_LAYERS 4
|
||||
#define KOMEDA_PIPELINE_MAX_SCALERS 2
|
||||
#define KOMEDA_COMPONENT_N_INPUTS 5
|
||||
|
||||
/* pipeline component IDs */
|
||||
enum {
|
||||
KOMEDA_COMPONENT_LAYER0 = 0,
|
||||
KOMEDA_COMPONENT_LAYER1 = 1,
|
||||
KOMEDA_COMPONENT_LAYER2 = 2,
|
||||
KOMEDA_COMPONENT_LAYER3 = 3,
|
||||
KOMEDA_COMPONENT_WB_LAYER = 7, /* write back layer */
|
||||
KOMEDA_COMPONENT_SCALER0 = 8,
|
||||
KOMEDA_COMPONENT_SCALER1 = 9,
|
||||
KOMEDA_COMPONENT_SPLITTER = 12,
|
||||
KOMEDA_COMPONENT_MERGER = 14,
|
||||
KOMEDA_COMPONENT_COMPIZ0 = 16, /* compositor */
|
||||
KOMEDA_COMPONENT_COMPIZ1 = 17,
|
||||
KOMEDA_COMPONENT_IPS0 = 20, /* post image processor */
|
||||
KOMEDA_COMPONENT_IPS1 = 21,
|
||||
KOMEDA_COMPONENT_TIMING_CTRLR = 22, /* timing controller */
|
||||
};
|
||||
|
||||
#define KOMEDA_PIPELINE_LAYERS (BIT(KOMEDA_COMPONENT_LAYER0) |\
|
||||
BIT(KOMEDA_COMPONENT_LAYER1) |\
|
||||
BIT(KOMEDA_COMPONENT_LAYER2) |\
|
||||
BIT(KOMEDA_COMPONENT_LAYER3))
|
||||
|
||||
#define KOMEDA_PIPELINE_SCALERS (BIT(KOMEDA_COMPONENT_SCALER0) |\
|
||||
BIT(KOMEDA_COMPONENT_SCALER1))
|
||||
|
||||
#define KOMEDA_PIPELINE_COMPIZS (BIT(KOMEDA_COMPONENT_COMPIZ0) |\
|
||||
BIT(KOMEDA_COMPONENT_COMPIZ1))
|
||||
|
||||
#define KOMEDA_PIPELINE_IMPROCS (BIT(KOMEDA_COMPONENT_IPS0) |\
|
||||
BIT(KOMEDA_COMPONENT_IPS1))
|
||||
struct komeda_component;
|
||||
struct komeda_component_state;
|
||||
|
||||
/** komeda_component_funcs - component control functions */
|
||||
struct komeda_component_funcs {
|
||||
/** @validate: optional,
|
||||
* component may has special requirements or limitations, this function
|
||||
* supply HW the ability to do the further HW specific check.
|
||||
*/
|
||||
int (*validate)(struct komeda_component *c,
|
||||
struct komeda_component_state *state);
|
||||
/** @update: update is a active update */
|
||||
void (*update)(struct komeda_component *c,
|
||||
struct komeda_component_state *state);
|
||||
/** @disable: disable component */
|
||||
void (*disable)(struct komeda_component *c);
|
||||
/** @dump_register: Optional, dump registers to seq_file */
|
||||
void (*dump_register)(struct komeda_component *c, struct seq_file *seq);
|
||||
};
|
||||
|
||||
/**
|
||||
* struct komeda_component
|
||||
*
|
||||
* struct komeda_component describe the data flow capabilities for how to link a
|
||||
* component into the display pipeline.
|
||||
* all specified components are subclass of this structure.
|
||||
*/
|
||||
struct komeda_component {
|
||||
/** @obj: treat component as private obj */
|
||||
struct drm_private_obj obj;
|
||||
/** @pipeline: the komeda pipeline this component belongs to */
|
||||
struct komeda_pipeline *pipeline;
|
||||
/** @name: component name */
|
||||
char name[32];
|
||||
/**
|
||||
* @reg:
|
||||
* component register base,
|
||||
* which is initialized by chip and used by chip only
|
||||
*/
|
||||
u32 __iomem *reg;
|
||||
/** @id: component id */
|
||||
u32 id;
|
||||
/** @hw_ic: component hw id,
|
||||
* which is initialized by chip and used by chip only
|
||||
*/
|
||||
u32 hw_id;
|
||||
|
||||
/**
|
||||
* @max_active_inputs:
|
||||
* @max_active_outpus:
|
||||
*
|
||||
* maximum number of inputs/outputs that can be active in the same time
|
||||
* Note:
|
||||
* the number isn't the bit number of @supported_inputs or
|
||||
* @supported_outputs, but may be less than it, since component may not
|
||||
* support enabling all @supported_inputs/outputs at the same time.
|
||||
*/
|
||||
u8 max_active_inputs;
|
||||
u8 max_active_outputs;
|
||||
/**
|
||||
* @supported_inputs:
|
||||
* @supported_outputs:
|
||||
*
|
||||
* bitmask of BIT(component->id) for the supported inputs/outputs
|
||||
* describes the possibilities of how a component is linked into a
|
||||
* pipeline.
|
||||
*/
|
||||
u32 supported_inputs;
|
||||
u32 supported_outputs;
|
||||
|
||||
/**
|
||||
* @funcs: chip functions to access HW
|
||||
*/
|
||||
struct komeda_component_funcs *funcs;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct komeda_component_output
|
||||
*
|
||||
* a component has multiple outputs, if want to know where the data
|
||||
* comes from, only know the component is not enough, we still need to know
|
||||
* its output port
|
||||
*/
|
||||
struct komeda_component_output {
|
||||
/** @component: indicate which component the data comes from */
|
||||
struct komeda_component *component;
|
||||
/** @output_port:
|
||||
* the output port of the &komeda_component_output.component
|
||||
*/
|
||||
u8 output_port;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct komeda_component_state
|
||||
*
|
||||
* component_state is the data flow configuration of the component, and it's
|
||||
* the superclass of all specific component_state like @komeda_layer_state,
|
||||
* @komeda_scaler_state
|
||||
*/
|
||||
struct komeda_component_state {
|
||||
/** @obj: tracking component_state by drm_atomic_state */
|
||||
struct drm_private_state obj;
|
||||
struct komeda_component *component;
|
||||
/**
|
||||
* @binding_user:
|
||||
* currently bound user, the user can be crtc/plane/wb_conn, which is
|
||||
* valid decided by @component and @inputs
|
||||
*
|
||||
* - Layer: its user always is plane.
|
||||
* - compiz/improc/timing_ctrlr: the user is crtc.
|
||||
* - wb_layer: wb_conn;
|
||||
* - scaler: plane when input is layer, wb_conn if input is compiz.
|
||||
*/
|
||||
union {
|
||||
struct drm_crtc *crtc;
|
||||
struct drm_plane *plane;
|
||||
struct drm_connector *wb_conn;
|
||||
void *binding_user;
|
||||
};
|
||||
/**
|
||||
* @active_inputs:
|
||||
*
|
||||
* active_inputs is bitmask of @inputs index
|
||||
*
|
||||
* - active_inputs = changed_active_inputs + unchanged_active_inputs
|
||||
* - affected_inputs = old->active_inputs + new->active_inputs;
|
||||
* - disabling_inputs = affected_inputs ^ active_inputs;
|
||||
* - changed_inputs = disabling_inputs + changed_active_inputs;
|
||||
*
|
||||
* NOTE:
|
||||
* changed_inputs doesn't include all active_input but only
|
||||
* @changed_active_inputs, and this bitmask can be used in chip
|
||||
* level for dirty update.
|
||||
*/
|
||||
u16 active_inputs;
|
||||
u16 changed_active_inputs;
|
||||
u16 affected_inputs;
|
||||
/**
|
||||
* @inputs:
|
||||
*
|
||||
* the specific inputs[i] only valid on BIT(i) has been set in
|
||||
* @active_inputs, if not the inputs[i] is undefined.
|
||||
*/
|
||||
struct komeda_component_output inputs[KOMEDA_COMPONENT_N_INPUTS];
|
||||
};
|
||||
|
||||
static inline u16 component_disabling_inputs(struct komeda_component_state *st)
|
||||
{
|
||||
return st->affected_inputs ^ st->active_inputs;
|
||||
}
|
||||
|
||||
static inline u16 component_changed_inputs(struct komeda_component_state *st)
|
||||
{
|
||||
return component_disabling_inputs(st) | st->changed_active_inputs;
|
||||
}
|
||||
|
||||
#define to_comp(__c) (((__c) == NULL) ? NULL : &((__c)->base))
|
||||
#define to_cpos(__c) ((struct komeda_component **)&(__c))
|
||||
|
||||
/* these structures are going to be filled in in uture patches */
|
||||
struct komeda_layer {
|
||||
struct komeda_component base;
|
||||
/* layer specific features and caps */
|
||||
};
|
||||
|
||||
struct komeda_layer_state {
|
||||
struct komeda_component_state base;
|
||||
/* layer specific configuration state */
|
||||
};
|
||||
|
||||
struct komeda_compiz {
|
||||
struct komeda_component base;
|
||||
/* compiz specific features and caps */
|
||||
};
|
||||
|
||||
struct komeda_compiz_state {
|
||||
struct komeda_component_state base;
|
||||
/* compiz specific configuration state */
|
||||
};
|
||||
|
||||
struct komeda_scaler {
|
||||
struct komeda_component base;
|
||||
/* scaler features and caps */
|
||||
};
|
||||
|
||||
struct komeda_scaler_state {
|
||||
struct komeda_component_state base;
|
||||
};
|
||||
|
||||
struct komeda_improc {
|
||||
struct komeda_component base;
|
||||
};
|
||||
|
||||
struct komeda_improc_state {
|
||||
struct komeda_component_state base;
|
||||
};
|
||||
|
||||
/* display timing controller */
|
||||
struct komeda_timing_ctrlr {
|
||||
struct komeda_component base;
|
||||
};
|
||||
|
||||
struct komeda_timing_ctrlr_state {
|
||||
struct komeda_component_state base;
|
||||
};
|
||||
|
||||
/** struct komeda_pipeline_funcs */
|
||||
struct komeda_pipeline_funcs {
|
||||
/* dump_register: Optional, dump registers to seq_file */
|
||||
void (*dump_register)(struct komeda_pipeline *pipe,
|
||||
struct seq_file *sf);
|
||||
};
|
||||
|
||||
/**
|
||||
* struct komeda_pipeline
|
||||
*
|
||||
* Represent a complete display pipeline and hold all functional components.
|
||||
*/
|
||||
struct komeda_pipeline {
|
||||
/** @obj: link pipeline as private obj of drm_atomic_state */
|
||||
struct drm_private_obj obj;
|
||||
/** @mdev: the parent komeda_dev */
|
||||
struct komeda_dev *mdev;
|
||||
/** @pxlclk: pixel clock */
|
||||
struct clk *pxlclk;
|
||||
/** @aclk: AXI clock */
|
||||
struct clk *aclk;
|
||||
/** @id: pipeline id */
|
||||
int id;
|
||||
/** @avail_comps: available components mask of pipeline */
|
||||
u32 avail_comps;
|
||||
int n_layers;
|
||||
struct komeda_layer *layers[KOMEDA_PIPELINE_MAX_LAYERS];
|
||||
int n_scalers;
|
||||
struct komeda_scaler *scalers[KOMEDA_PIPELINE_MAX_SCALERS];
|
||||
struct komeda_compiz *compiz;
|
||||
struct komeda_layer *wb_layer;
|
||||
struct komeda_improc *improc;
|
||||
struct komeda_timing_ctrlr *ctrlr;
|
||||
struct komeda_pipeline_funcs *funcs; /* private pipeline functions */
|
||||
};
|
||||
|
||||
/**
|
||||
* struct komeda_pipeline_state
|
||||
*
|
||||
* NOTE:
|
||||
* Unlike the pipeline, pipeline_state doesn’t gather any component_state
|
||||
* into it. It because all component will be managed by drm_atomic_state.
|
||||
*/
|
||||
struct komeda_pipeline_state {
|
||||
/** @obj: tracking pipeline_state by drm_atomic_state */
|
||||
struct drm_private_state obj;
|
||||
struct komeda_pipeline *pipe;
|
||||
/** @crtc: currently bound crtc */
|
||||
struct drm_crtc *crtc;
|
||||
/**
|
||||
* @active_comps:
|
||||
*
|
||||
* bitmask - BIT(component->id) of active components
|
||||
*/
|
||||
u32 active_comps;
|
||||
};
|
||||
|
||||
#define to_layer(c) container_of(c, struct komeda_layer, base)
|
||||
#define to_compiz(c) container_of(c, struct komeda_compiz, base)
|
||||
#define to_scaler(c) container_of(c, struct komeda_scaler, base)
|
||||
#define to_improc(c) container_of(c, struct komeda_improc, base)
|
||||
#define to_ctrlr(c) container_of(c, struct komeda_timing_ctrlr, base)
|
||||
|
||||
#define to_layer_st(c) container_of(c, struct komeda_layer_state, base)
|
||||
#define to_compiz_st(c) container_of(c, struct komeda_compiz_state, base)
|
||||
#define to_scaler_st(c) container_of(c, struct komeda_scaler_state, base)
|
||||
#define to_improc_st(c) container_of(c, struct komeda_improc_state, base)
|
||||
#define to_ctrlr_st(c) container_of(c, struct komeda_timing_ctrlr_state, base)
|
||||
|
||||
/* pipeline APIs */
|
||||
struct komeda_pipeline *
|
||||
komeda_pipeline_add(struct komeda_dev *mdev, size_t size,
|
||||
struct komeda_pipeline_funcs *funcs);
|
||||
void komeda_pipeline_destroy(struct komeda_dev *mdev,
|
||||
struct komeda_pipeline *pipe);
|
||||
|
||||
struct komeda_component *
|
||||
komeda_pipeline_get_component(struct komeda_pipeline *pipe, int id);
|
||||
|
||||
/* component APIs */
|
||||
struct komeda_component *
|
||||
komeda_component_add(struct komeda_pipeline *pipe,
|
||||
size_t comp_sz, u32 id, u32 hw_id,
|
||||
struct komeda_component_funcs *funcs,
|
||||
u8 max_active_inputs, u32 supported_inputs,
|
||||
u8 max_active_outputs, u32 __iomem *reg,
|
||||
const char *name_fmt, ...);
|
||||
|
||||
void komeda_component_destroy(struct komeda_dev *mdev,
|
||||
struct komeda_component *c);
|
||||
|
||||
#endif /* _KOMEDA_PIPELINE_H_*/
|
Loading…
Reference in New Issue