staging: comedi: ni_mio_common: only do counter commands for ni_pcimio
"ni_mio_common.c" holds common code included by "ni_pcimio.c", "ni_atmio.c" and "ni_mio_cs.c", including a common initialization function `ni_E_init()`. Amongst other things, this initializes some counter subdevices to support comedi instructions and asynchronous commands. However, even though it sets up the handlers to support asynchronous commands on these subdevices, the handlers will return an error unless the `PCIDMA` macro is defined (which is defined only in "ni_pcimio.c"). If the `PCIDMA` macro is not defined, the comedi core will needlessly allocate buffers to support the asynchronous commands. Also, `s->async_dma_dir` is set to `DMA_BIDIRECTIONAL`, causing the physical pages for the buffers to be allocated using `dma_alloc_coherent()`. If the comedi core cannot call `dma_alloc_coherent()` because `CONFIG_HAS_DMA` is not defined, it will fail to allocate the buffers, which ultimately causes `ni_E_init()` to fail. Avoid the wastage and prevent the failure by only setting up asynchronous command support for the counter subdevices if the `PCIDMA` macro is defined. Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Reviewed-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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4efc4bbdc1
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drivers/staging/comedi/drivers
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@ -310,9 +310,11 @@ static int ni_gpct_insn_read(struct comedi_device *dev,
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static int ni_gpct_insn_config(struct comedi_device *dev,
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struct comedi_subdevice *s,
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struct comedi_insn *insn, unsigned int *data);
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#ifdef PCIDMA
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static int ni_gpct_cmd(struct comedi_device *dev, struct comedi_subdevice *s);
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static int ni_gpct_cmdtest(struct comedi_device *dev,
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struct comedi_subdevice *s, struct comedi_cmd *cmd);
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#endif
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static int ni_gpct_cancel(struct comedi_device *dev,
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struct comedi_subdevice *s);
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static void handle_gpct_interrupt(struct comedi_device *dev,
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@ -4617,9 +4619,7 @@ static int ni_E_init(struct comedi_device *dev)
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for (j = 0; j < NUM_GPCT; ++j) {
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s = &dev->subdevices[NI_GPCT_SUBDEV(j)];
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s->type = COMEDI_SUBD_COUNTER;
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s->subdev_flags =
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SDF_READABLE | SDF_WRITABLE | SDF_LSAMPL | SDF_CMD_READ
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/* | SDF_CMD_WRITE */ ;
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s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_LSAMPL;
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s->n_chan = 3;
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if (board->reg_type & ni_reg_m_series_mask)
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s->maxdata = 0xffffffff;
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@ -4628,11 +4628,14 @@ static int ni_E_init(struct comedi_device *dev)
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s->insn_read = &ni_gpct_insn_read;
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s->insn_write = &ni_gpct_insn_write;
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s->insn_config = &ni_gpct_insn_config;
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#ifdef PCIDMA
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s->subdev_flags |= SDF_CMD_READ /* | SDF_CMD_WRITE */;
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s->do_cmd = &ni_gpct_cmd;
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s->len_chanlist = 1;
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s->do_cmdtest = &ni_gpct_cmdtest;
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s->cancel = &ni_gpct_cancel;
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s->async_dma_dir = DMA_BIDIRECTIONAL;
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#endif
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s->private = &devpriv->counter_dev->counters[j];
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devpriv->counter_dev->counters[j].chip_index = 0;
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@ -5216,10 +5219,10 @@ static int ni_gpct_insn_write(struct comedi_device *dev,
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return ni_tio_winsn(counter, insn, data);
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}
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#ifdef PCIDMA
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static int ni_gpct_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
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{
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int retval;
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#ifdef PCIDMA
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struct ni_gpct *counter = s->private;
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/* const struct comedi_cmd *cmd = &s->async->cmd; */
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@ -5233,23 +5236,20 @@ static int ni_gpct_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
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ni_tio_acknowledge_and_confirm(counter, NULL, NULL, NULL, NULL);
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ni_e_series_enable_second_irq(dev, counter->counter_index, 1);
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retval = ni_tio_cmd(counter, s->async);
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#else
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retval = -ENOTSUPP;
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#endif
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return retval;
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}
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#endif
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#ifdef PCIDMA
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static int ni_gpct_cmdtest(struct comedi_device *dev,
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struct comedi_subdevice *s, struct comedi_cmd *cmd)
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{
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#ifdef PCIDMA
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struct ni_gpct *counter = s->private;
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return ni_tio_cmdtest(counter, cmd);
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#else
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return -ENOTSUPP;
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#endif
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}
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#endif
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static int ni_gpct_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
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{
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