firewire: fw-ohci: Bug fixes for packet-per-buffer support
This patch corrects a number of bugs in the current OHCI 1.0 packet-per-buffer support: 1. Correctly deal with payloads that cross a page boundary. The previous version would not split the descriptor at such a boundary, potentially corrupting unrelated memory. 2. Allow user-space to specify multiple packets per struct fw_cdev_iso_packet in the same way that dual-buffer allows. This is signaled by header_length being a multiple of header_size. This multiple determines the number of packets. The payload size allocated per packet is determined by dividing the total payload size by the number of packets. 3. Make sync support work properly for packet-per-buffer. I have tested this patch with libdc1394 by forcing my OHCI 1.1 controller to use the packet-per-buffer support instead of dual-buffer. I would greatly appreciate testing by those who have a DV devices and other types of iso streamers to make sure I didn't cause any regressions. Stefan, with this patch, I'm hoping that libdc1394 will work with all your OHCI 1.0 controllers now. The one bit of future work that remains for packet-per-buffer support is the automatic compaction of short payloads that I discussed with Kristian. Signed-off-by: David Moore <dcm@acm.org> Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
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@ -1461,24 +1461,24 @@ static int handle_ir_packet_per_buffer(struct context *context,
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{
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struct iso_context *ctx =
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container_of(context, struct iso_context, context);
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struct descriptor *pd = d + 1;
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struct descriptor *pd;
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__le32 *ir_header;
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size_t header_length;
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void *p, *end;
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int i, z;
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void *p;
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int i;
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if (pd->res_count == pd->req_count)
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for (pd = d; pd <= last; pd++) {
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if (pd->transfer_status)
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break;
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}
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if (pd > last)
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/* Descriptor(s) not done yet, stop iteration */
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return 0;
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header_length = le16_to_cpu(d->req_count);
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i = ctx->header_length;
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z = le32_to_cpu(pd->branch_address) & 0xf;
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p = d + z;
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end = p + header_length;
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p = last + 1;
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while (p < end && i + ctx->base.header_size <= PAGE_SIZE) {
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if (ctx->base.header_size > 0 &&
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i + ctx->base.header_size <= PAGE_SIZE) {
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/*
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* The iso header is byteswapped to little endian by
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* the controller, but the remaining header quadlets
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@ -1487,14 +1487,11 @@ static int handle_ir_packet_per_buffer(struct context *context,
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*/
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*(u32 *) (ctx->header + i) = __swab32(*(u32 *) (p + 4));
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memcpy(ctx->header + i + 4, p + 8, ctx->base.header_size - 4);
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i += ctx->base.header_size;
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p += ctx->base.header_size + 4;
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ctx->header_length += ctx->base.header_size;
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}
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ctx->header_length = i;
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if (le16_to_cpu(pd->control) & DESCRIPTOR_IRQ_ALWAYS) {
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ir_header = (__le32 *) (d + z);
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if (le16_to_cpu(last->control) & DESCRIPTOR_IRQ_ALWAYS) {
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ir_header = (__le32 *) p;
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ctx->base.callback(&ctx->base,
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le32_to_cpu(ir_header[0]) & 0xffff,
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ctx->header_length, ctx->header,
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@ -1502,7 +1499,6 @@ static int handle_ir_packet_per_buffer(struct context *context,
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ctx->header_length = 0;
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}
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return 1;
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}
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@ -1853,67 +1849,70 @@ ohci_queue_iso_receive_packet_per_buffer(struct fw_iso_context *base,
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{
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struct iso_context *ctx = container_of(base, struct iso_context, base);
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struct descriptor *d = NULL, *pd = NULL;
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struct fw_iso_packet *p;
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struct fw_iso_packet *p = packet;
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dma_addr_t d_bus, page_bus;
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u32 z, header_z, rest;
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int i, page, offset, packet_count, header_size;
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if (packet->skip) {
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d = context_get_descriptors(&ctx->context, 1, &d_bus);
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if (d == NULL)
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return -ENOMEM;
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d->control = cpu_to_le16(DESCRIPTOR_STATUS |
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DESCRIPTOR_INPUT_LAST |
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DESCRIPTOR_BRANCH_ALWAYS |
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DESCRIPTOR_WAIT);
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context_append(&ctx->context, d, 1, 0);
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}
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/* one descriptor for header, one for payload */
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/* FIXME: handle cases where we need multiple desc. for payload */
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z = 2;
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p = packet;
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int i, j, length;
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int page, offset, packet_count, header_size, payload_per_buffer;
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/*
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* The OHCI controller puts the status word in the
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* buffer too, so we need 4 extra bytes per packet.
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*/
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packet_count = p->header_length / ctx->base.header_size;
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header_size = packet_count * (ctx->base.header_size + 4);
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header_size = ctx->base.header_size + 4;
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/* Get header size in number of descriptors. */
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header_z = DIV_ROUND_UP(header_size, sizeof(*d));
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page = payload >> PAGE_SHIFT;
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offset = payload & ~PAGE_MASK;
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rest = p->payload_length;
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payload_per_buffer = p->payload_length / packet_count;
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for (i = 0; i < packet_count; i++) {
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/* d points to the header descriptor */
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z = DIV_ROUND_UP(payload_per_buffer + offset, PAGE_SIZE) + 1;
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d = context_get_descriptors(&ctx->context,
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z + header_z, &d_bus);
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z + header_z, &d_bus);
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if (d == NULL)
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return -ENOMEM;
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d->control = cpu_to_le16(DESCRIPTOR_INPUT_MORE);
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d->control = cpu_to_le16(DESCRIPTOR_STATUS |
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DESCRIPTOR_INPUT_MORE);
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if (p->skip && i == 0)
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d->control |= cpu_to_le16(DESCRIPTOR_WAIT);
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d->req_count = cpu_to_le16(header_size);
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d->res_count = d->req_count;
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d->transfer_status = 0;
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d->data_address = cpu_to_le32(d_bus + (z * sizeof(*d)));
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/* pd points to the payload descriptor */
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pd = d + 1;
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rest = payload_per_buffer;
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for (j = 1; j < z; j++) {
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pd = d + j;
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pd->control = cpu_to_le16(DESCRIPTOR_STATUS |
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DESCRIPTOR_INPUT_MORE);
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if (offset + rest < PAGE_SIZE)
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length = rest;
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else
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length = PAGE_SIZE - offset;
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pd->req_count = cpu_to_le16(length);
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pd->res_count = pd->req_count;
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pd->transfer_status = 0;
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page_bus = page_private(buffer->pages[page]);
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pd->data_address = cpu_to_le32(page_bus + offset);
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offset = (offset + length) & ~PAGE_MASK;
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rest -= length;
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if (offset == 0)
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page++;
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}
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pd->control = cpu_to_le16(DESCRIPTOR_STATUS |
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DESCRIPTOR_INPUT_LAST |
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DESCRIPTOR_BRANCH_ALWAYS);
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if (p->interrupt)
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if (p->interrupt && i == packet_count - 1)
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pd->control |= cpu_to_le16(DESCRIPTOR_IRQ_ALWAYS);
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pd->req_count = cpu_to_le16(rest);
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pd->res_count = pd->req_count;
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page_bus = page_private(buffer->pages[page]);
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pd->data_address = cpu_to_le32(page_bus + offset);
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context_append(&ctx->context, d, z, header_z);
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}
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