atheros: define a common priv struct
hw code should never use private driver data, but sometimes we need a backpointer so just stuff it on the common ath struct. Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -56,6 +56,7 @@ struct ath_bus_ops {
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struct ath_common {
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void *ah;
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void *priv;
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struct ieee80211_hw *hw;
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int debug_mask;
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@ -562,8 +562,8 @@ static const struct file_operations fops_xmit = {
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int ath9k_init_debug(struct ath_hw *ah)
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{
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struct ath_softc *sc = ah->ah_sc;
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struct ath_common *common = ath9k_hw_common(sc->sc_ah);
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struct ath_common *common = ath9k_hw_common(ah);
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struct ath_softc *sc = (struct ath_softc *) common->priv;
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common->debug_mask = ath9k_debug;
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@ -620,7 +620,8 @@ err:
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void ath9k_exit_debug(struct ath_hw *ah)
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{
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struct ath_softc *sc = ah->ah_sc;
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struct ath_common *common = ath9k_hw_common(ah);
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struct ath_softc *sc = (struct ath_softc *) common->priv;
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debugfs_remove(sc->debug.debugfs_xmit);
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debugfs_remove(sc->debug.debugfs_wiphy);
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@ -450,7 +450,6 @@ struct ath_gen_timer_table {
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struct ath_hw {
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struct ieee80211_hw *hw;
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struct ath_softc *ah_sc;
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struct ath_common common;
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struct ath9k_hw_version hw_version;
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struct ath9k_ops_config config;
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@ -1438,17 +1438,22 @@ static void ath9k_gen_timer_start(struct ath_hw *ah,
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u32 timer_next,
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u32 timer_period)
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{
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struct ath_common *common = ath9k_hw_common(ah);
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struct ath_softc *sc = (struct ath_softc *) common->priv;
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ath9k_hw_gen_timer_start(ah, timer, timer_next, timer_period);
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if ((ah->ah_sc->imask & ATH9K_INT_GENTIMER) == 0) {
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if ((sc->imask & ATH9K_INT_GENTIMER) == 0) {
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ath9k_hw_set_interrupts(ah, 0);
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ah->ah_sc->imask |= ATH9K_INT_GENTIMER;
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ath9k_hw_set_interrupts(ah, ah->ah_sc->imask);
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sc->imask |= ATH9K_INT_GENTIMER;
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ath9k_hw_set_interrupts(ah, sc->imask);
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}
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}
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static void ath9k_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer)
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{
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struct ath_common *common = ath9k_hw_common(ah);
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struct ath_softc *sc = (struct ath_softc *) common->priv;
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struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers;
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ath9k_hw_gen_timer_stop(ah, timer);
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@ -1456,8 +1461,8 @@ static void ath9k_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer)
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/* if no timer is enabled, turn off interrupt mask */
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if (timer_table->timer_mask.val == 0) {
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ath9k_hw_set_interrupts(ah, 0);
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ah->ah_sc->imask &= ~ATH9K_INT_GENTIMER;
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ath9k_hw_set_interrupts(ah, ah->ah_sc->imask);
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sc->imask &= ~ATH9K_INT_GENTIMER;
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ath9k_hw_set_interrupts(ah, sc->imask);
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}
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}
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@ -1554,28 +1559,32 @@ static int ath_init_btcoex_timer(struct ath_softc *sc)
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static void ath9k_iowrite32(void *hw_priv, u32 val, u32 reg_offset)
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{
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struct ath_hw *ah = (struct ath_hw *) hw_priv;
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struct ath_common *common = ath9k_hw_common(ah);
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struct ath_softc *sc = (struct ath_softc *) common->priv;
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if (ah->config.serialize_regmode == SER_REG_MODE_ON) {
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unsigned long flags;
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spin_lock_irqsave(&ah->ah_sc->sc_serial_rw, flags);
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iowrite32(val, ah->ah_sc->mem + reg_offset);
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spin_unlock_irqrestore(&ah->ah_sc->sc_serial_rw, flags);
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spin_lock_irqsave(&sc->sc_serial_rw, flags);
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iowrite32(val, sc->mem + reg_offset);
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spin_unlock_irqrestore(&sc->sc_serial_rw, flags);
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} else
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iowrite32(val, ah->ah_sc->mem + reg_offset);
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iowrite32(val, sc->mem + reg_offset);
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}
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static unsigned int ath9k_ioread32(void *hw_priv, u32 reg_offset)
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{
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struct ath_hw *ah = (struct ath_hw *) hw_priv;
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struct ath_common *common = ath9k_hw_common(ah);
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struct ath_softc *sc = (struct ath_softc *) common->priv;
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u32 val;
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if (ah->config.serialize_regmode == SER_REG_MODE_ON) {
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unsigned long flags;
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spin_lock_irqsave(&ah->ah_sc->sc_serial_rw, flags);
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val = ioread32(ah->ah_sc->mem + reg_offset);
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spin_unlock_irqrestore(&ah->ah_sc->sc_serial_rw, flags);
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spin_lock_irqsave(&sc->sc_serial_rw, flags);
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val = ioread32(sc->mem + reg_offset);
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spin_unlock_irqrestore(&sc->sc_serial_rw, flags);
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} else
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val = ioread32(ah->ah_sc->mem + reg_offset);
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val = ioread32(sc->mem + reg_offset);
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return val;
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}
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@ -1618,7 +1627,6 @@ static int ath_init_softc(u16 devid, struct ath_softc *sc, u16 subsysid,
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goto bad_no_ah;
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}
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ah->ah_sc = sc;
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ah->hw_version.devid = devid;
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ah->hw_version.subsysid = subsysid;
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sc->sc_ah = ah;
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@ -1628,6 +1636,7 @@ static int ath_init_softc(u16 devid, struct ath_softc *sc, u16 subsysid,
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common->bus_ops = bus_ops;
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common->ah = ah;
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common->hw = sc->hw;
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common->priv = sc;
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/*
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* Cache line size is used to size and align various
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@ -33,8 +33,7 @@ static struct pci_device_id ath_pci_id_table[] __devinitdata = {
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/* return bus cachesize in 4B word units */
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static void ath_pci_read_cachesize(struct ath_common *common, int *csz)
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{
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struct ath_hw *ah = (struct ath_hw *) common->ah;
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struct ath_softc *sc = ah->ah_sc;
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struct ath_softc *sc = (struct ath_softc *) common->priv;
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u8 u8tmp;
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pci_read_config_byte(to_pci_dev(sc->dev), PCI_CACHE_LINE_SIZE, &u8tmp);
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@ -52,8 +51,7 @@ static void ath_pci_read_cachesize(struct ath_common *common, int *csz)
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static void ath_pci_cleanup(struct ath_common *common)
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{
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struct ath_hw *ah = (struct ath_hw *) common->ah;
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struct ath_softc *sc = ah->ah_sc;
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struct ath_softc *sc = (struct ath_softc *) common->priv;
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struct pci_dev *pdev = to_pci_dev(sc->dev);
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pci_iounmap(pdev, sc->mem);
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@ -86,8 +84,7 @@ static bool ath_pci_eeprom_read(struct ath_common *common, u32 off, u16 *data)
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*/
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static void ath_pci_bt_coex_prep(struct ath_common *common)
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{
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struct ath_hw *ah = (struct ath_hw *) common->ah;
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struct ath_softc *sc = ah->ah_sc;
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struct ath_softc *sc = (struct ath_softc *) common->priv;
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struct pci_dev *pdev = to_pci_dev(sc->dev);
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u8 aspm;
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