staging: comedi: rtd520: hook up 8254 timer/counter subdevice
There is a standard 8254 Timer/Counter device on the board. Hook up the subdevice for the user. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -1064,6 +1064,7 @@ config COMEDI_NI_PCIMIO
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config COMEDI_RTD520
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tristate "Real Time Devices PCI4520/DM7520 support"
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select COMEDI_8254
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---help---
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Enable support for Real Time Devices PCI4520/DM7520
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@ -72,8 +72,6 @@
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* As far as I can tell, the About interrupt doesn't work if Sample is
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* also enabled. It turns out that About really isn't needed, since
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* we always count down samples read.
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*
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* There was some timer/counter code, but it didn't follow the right API.
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*/
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/*
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@ -99,6 +97,7 @@
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#include "../comedi_pci.h"
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#include "comedi_8254.h"
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#include "plx9080.h"
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/*
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@ -148,10 +147,7 @@
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#define LAS0_DCNT 0x0054 /* Delay counter (16 bit) */
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#define LAS0_ACNT 0x0058 /* About counter (16 bit) */
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#define LAS0_DAC_CLK 0x005c /* DAC clock (16bit) */
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#define LAS0_UTC0 0x0060 /* 8254 TC Counter 0 */
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#define LAS0_UTC1 0x0064 /* 8254 TC Counter 1 */
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#define LAS0_UTC2 0x0068 /* 8254 TC Counter 2 */
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#define LAS0_UTC_CTRL 0x006c /* 8254 TC Control */
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#define LAS0_8254_TIMER_BASE 0x0060 /* 8254 timer/counter base */
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#define LAS0_DIO0 0x0070 /* Digital I/O Port 0 */
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#define LAS0_DIO1 0x0074 /* Digital I/O Port 1 */
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#define LAS0_DIO0_CTRL 0x0078 /* Digital I/O Control */
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@ -191,12 +187,8 @@
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#define LAS0_SBUS2_ENABLE 0x019c /* SyncBus 2 enable */
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#define LAS0_ETRG_POLARITY 0x01a4 /* Ext. Trigger polarity select */
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#define LAS0_EINT_POLARITY 0x01a8 /* Ext. Interrupt polarity select */
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#define LAS0_UTC0_CLOCK 0x01ac /* UTC0 Clock select */
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#define LAS0_UTC0_GATE 0x01b0 /* UTC0 Gate select */
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#define LAS0_UTC1_CLOCK 0x01b4 /* UTC1 Clock select */
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#define LAS0_UTC1_GATE 0x01b8 /* UTC1 Gate select */
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#define LAS0_UTC2_CLOCK 0x01bc /* UTC2 Clock select */
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#define LAS0_UTC2_GATE 0x01c0 /* UTC2 Gate select */
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#define LAS0_8254_CLK_SEL(x) (0x01ac + ((x) * 0x8)) /* 8254 clock select */
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#define LAS0_8254_GATE_SEL(x) (0x01b0 + ((x) * 0x8)) /* 8254 gate select */
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#define LAS0_UOUT0_SELECT 0x01c4 /* User Output 0 source select */
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#define LAS0_UOUT1_SELECT 0x01c8 /* User Output 1 source select */
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#define LAS0_DMA0_RESET 0x01cc /* DMA0 Request state machine reset */
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@ -371,6 +363,10 @@ struct rtd_private {
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int xfer_count; /* # to transfer data. 0->1/2FIFO */
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int flags; /* flag event modes */
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unsigned fifosz;
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/* 8254 Timer/Counter gate and clock sources */
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unsigned char timer_gate_src[3];
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unsigned char timer_clk_src[3];
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};
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/* bit defines for "flags" */
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@ -1099,6 +1095,81 @@ static int rtd_dio_insn_config(struct comedi_device *dev,
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return insn->n;
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}
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static int rtd_counter_insn_config(struct comedi_device *dev,
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struct comedi_subdevice *s,
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struct comedi_insn *insn,
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unsigned int *data)
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{
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struct rtd_private *devpriv = dev->private;
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unsigned int chan = CR_CHAN(insn->chanspec);
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unsigned int max_src;
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unsigned int src;
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switch (data[0]) {
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case INSN_CONFIG_SET_GATE_SRC:
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/*
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* 8254 Timer/Counter gate sources:
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*
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* 0 = Not gated, free running (reset state)
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* 1 = Gated, off
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* 2 = Ext. TC Gate 1
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* 3 = Ext. TC Gate 2
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* 4 = Previous TC out (chan 1 and 2 only)
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*/
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src = data[2];
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max_src = (chan == 0) ? 3 : 4;
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if (src > max_src)
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return -EINVAL;
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devpriv->timer_gate_src[chan] = src;
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writeb(src, dev->mmio + LAS0_8254_GATE_SEL(chan));
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break;
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case INSN_CONFIG_GET_GATE_SRC:
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data[2] = devpriv->timer_gate_src[chan];
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break;
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case INSN_CONFIG_SET_CLOCK_SRC:
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/*
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* 8254 Timer/Counter clock sources:
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*
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* 0 = 8 MHz (reset state)
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* 1 = Ext. TC Clock 1
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* 2 = Ext. TX Clock 2
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* 3 = Ext. Pacer Clock
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* 4 = Previous TC out (chan 1 and 2 only)
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* 5 = High-Speed Digital Input Sampling signal (chan 1 only)
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*/
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src = data[1];
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switch (chan) {
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case 0:
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max_src = 3;
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break;
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case 1:
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max_src = 5;
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break;
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case 2:
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max_src = 4;
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break;
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default:
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return -EINVAL;
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}
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if (src > max_src)
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return -EINVAL;
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devpriv->timer_clk_src[chan] = src;
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writeb(src, dev->mmio + LAS0_8254_CLK_SEL(chan));
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break;
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case INSN_CONFIG_GET_CLOCK_SRC:
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src = devpriv->timer_clk_src[chan];
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data[1] = devpriv->timer_clk_src[chan];
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data[2] = (src == 0) ? RTD_CLOCK_BASE : 0;
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break;
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default:
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return -EINVAL;
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}
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return insn->n;
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}
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static void rtd_reset(struct comedi_device *dev)
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{
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struct rtd_private *devpriv = dev->private;
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@ -1126,10 +1197,6 @@ static void rtd_init_board(struct comedi_device *dev)
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writel(0, dev->mmio + LAS0_DAC_RESET(1));
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/* clear digital IO fifo */
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writew(0, dev->mmio + LAS0_DIO_STATUS);
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writeb((0 << 6) | 0x30, dev->mmio + LAS0_UTC_CTRL);
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writeb((1 << 6) | 0x30, dev->mmio + LAS0_UTC_CTRL);
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writeb((2 << 6) | 0x30, dev->mmio + LAS0_UTC_CTRL);
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writeb((3 << 6) | 0x00, dev->mmio + LAS0_UTC_CTRL);
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/* TODO: set user out source ??? */
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}
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@ -1232,12 +1299,15 @@ static int rtd_auto_attach(struct comedi_device *dev,
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s->insn_bits = rtd_dio_insn_bits;
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s->insn_config = rtd_dio_insn_config;
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/* timer/counter subdevices (not currently supported) */
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/* 8254 Timer/Counter subdevice */
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s = &dev->subdevices[3];
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s->type = COMEDI_SUBD_COUNTER;
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s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
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s->n_chan = 3;
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s->maxdata = 0xffff;
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dev->pacer = comedi_8254_mm_init(dev->mmio + LAS0_8254_TIMER_BASE,
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RTD_CLOCK_BASE, I8254_IO8, 2);
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if (!dev->pacer)
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return -ENOMEM;
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comedi_8254_subdevice_init(s, dev->pacer);
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dev->pacer->insn_config = rtd_counter_insn_config;
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rtd_init_board(dev);
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