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drm/nouveau/gpio: use base constructor for all implementations 

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2014-05-13 10:33:23 +10:00
parent f4277a0e42
commit bc3b0c41b1
8 changed files with 47 additions and 119 deletions
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5
drivers/gpu/drm/nouveau/core/include/subdev/gpio.h
View File

@ -13,12 +13,7 @@ struct nouveau_gpio {
struct nouveau_event *events;
/* hardware interfaces */
void (*reset)(struct nouveau_gpio *, u8 func);
int (*drive)(struct nouveau_gpio *, int line, int dir, int out);
int (*sense)(struct nouveau_gpio *, int line);
/* software interfaces */
int (*find)(struct nouveau_gpio *, int idx, u8 tag, u8 line,
struct dcb_gpio_func *);
int (*set)(struct nouveau_gpio *, int idx, u8 tag, u8 line, int state);

7
drivers/gpu/drm/nouveau/core/subdev/gpio/base.c
View File

@ -31,13 +31,15 @@ static int
nouveau_gpio_drive(struct nouveau_gpio *gpio,
int idx, int line, int dir, int out)
{
return gpio->drive ? gpio->drive(gpio, line, dir, out) : -ENODEV;
const struct nouveau_gpio_impl *impl = (void *)nv_object(gpio)->oclass;
return impl->drive ? impl->drive(gpio, line, dir, out) : -ENODEV;
}
static int
nouveau_gpio_sense(struct nouveau_gpio *gpio, int idx, int line)
{
return gpio->sense ? gpio->sense(gpio, line) : -ENODEV;
const struct nouveau_gpio_impl *impl = (void *)nv_object(gpio)->oclass;
return impl->sense ? impl->sense(gpio, line) : -ENODEV;
}
static int
@ -201,6 +203,7 @@ nouveau_gpio_create_(struct nouveau_object *parent,
gpio->find = nouveau_gpio_find;
gpio->set = nouveau_gpio_set;
gpio->get = nouveau_gpio_get;
gpio->reset = impl->reset;
ret = nouveau_event_create(1, impl->lines, &gpio->events);
if (ret)

26
drivers/gpu/drm/nouveau/core/subdev/gpio/nv10.c
View File

@ -26,10 +26,6 @@
#include "priv.h"
struct nv10_gpio_priv {
struct nouveau_gpio base;
};
static int
nv10_gpio_sense(struct nouveau_gpio *gpio, int line)
{
@ -103,29 +99,11 @@ nv10_gpio_intr_mask(struct nouveau_gpio *gpio, u32 type, u32 mask, u32 data)
nv_wr32(gpio, 0x001144, inte);
}
static int
nv10_gpio_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass *oclass, void *data, u32 size,
struct nouveau_object **pobject)
{
struct nv10_gpio_priv *priv;
int ret;
ret = nouveau_gpio_create(parent, engine, oclass, &priv);
*pobject = nv_object(priv);
if (ret)
return ret;
priv->base.drive = nv10_gpio_drive;
priv->base.sense = nv10_gpio_sense;
return 0;
}
struct nouveau_oclass *
nv10_gpio_oclass = &(struct nouveau_gpio_impl) {
.base.handle = NV_SUBDEV(GPIO, 0x10),
.base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nv10_gpio_ctor,
.ctor = _nouveau_gpio_ctor,
.dtor = _nouveau_gpio_dtor,
.init = _nouveau_gpio_init,
.fini = _nouveau_gpio_fini,
@ -133,4 +111,6 @@ nv10_gpio_oclass = &(struct nouveau_gpio_impl) {
.lines = 16,
.intr_stat = nv10_gpio_intr_stat,
.intr_mask = nv10_gpio_intr_mask,
.drive = nv10_gpio_drive,
.sense = nv10_gpio_sense,
}.base;

37
drivers/gpu/drm/nouveau/core/subdev/gpio/nv50.c
View File

@ -24,15 +24,10 @@
#include "priv.h"
struct nv50_gpio_priv {
struct nouveau_gpio base;
};
static void
void
nv50_gpio_reset(struct nouveau_gpio *gpio, u8 match)
{
struct nouveau_bios *bios = nouveau_bios(gpio);
struct nv50_gpio_priv *priv = (void *)gpio;
u8 ver, len;
u16 entry;
int ent = -1;
@ -55,7 +50,7 @@ nv50_gpio_reset(struct nouveau_gpio *gpio, u8 match)
gpio->set(gpio, 0, func, line, defs);
nv_mask(priv, reg, 0x00010001 << lsh, val << lsh);
nv_mask(gpio, reg, 0x00010001 << lsh, val << lsh);
}
}
@ -72,7 +67,7 @@ nv50_gpio_location(int line, u32 *reg, u32 *shift)
return 0;
}
static int
int
nv50_gpio_drive(struct nouveau_gpio *gpio, int line, int dir, int out)
{
u32 reg, shift;
@ -84,7 +79,7 @@ nv50_gpio_drive(struct nouveau_gpio *gpio, int line, int dir, int out)
return 0;
}
static int
int
nv50_gpio_sense(struct nouveau_gpio *gpio, int line)
{
u32 reg, shift;
@ -116,30 +111,11 @@ nv50_gpio_intr_mask(struct nouveau_gpio *gpio, u32 type, u32 mask, u32 data)
nv_wr32(gpio, 0x00e050, inte);
}
int
nv50_gpio_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass *oclass, void *data, u32 size,
struct nouveau_object **pobject)
{
struct nv50_gpio_priv *priv;
int ret;
ret = nouveau_gpio_create(parent, engine, oclass, &priv);
*pobject = nv_object(priv);
if (ret)
return ret;
priv->base.reset = nv50_gpio_reset;
priv->base.drive = nv50_gpio_drive;
priv->base.sense = nv50_gpio_sense;
return 0;
}
struct nouveau_oclass *
nv50_gpio_oclass = &(struct nouveau_gpio_impl) {
.base.handle = NV_SUBDEV(GPIO, 0x50),
.base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nv50_gpio_ctor,
.ctor = _nouveau_gpio_ctor,
.dtor = _nouveau_gpio_dtor,
.init = _nouveau_gpio_init,
.fini = _nouveau_gpio_fini,
@ -147,4 +123,7 @@ nv50_gpio_oclass = &(struct nouveau_gpio_impl) {
.lines = 16,
.intr_stat = nv50_gpio_intr_stat,
.intr_mask = nv50_gpio_intr_mask,
.drive = nv50_gpio_drive,
.sense = nv50_gpio_sense,
.reset = nv50_gpio_reset,
}.base;

5
drivers/gpu/drm/nouveau/core/subdev/gpio/nv92.c
View File

@ -60,7 +60,7 @@ struct nouveau_oclass *
nv92_gpio_oclass = &(struct nouveau_gpio_impl) {
.base.handle = NV_SUBDEV(GPIO, 0x92),
.base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nv50_gpio_ctor,
.ctor = _nouveau_gpio_ctor,
.dtor = _nouveau_gpio_dtor,
.init = _nouveau_gpio_init,
.fini = _nouveau_gpio_fini,
@ -68,4 +68,7 @@ nv92_gpio_oclass = &(struct nouveau_gpio_impl) {
.lines = 32,
.intr_stat = nv92_gpio_intr_stat,
.intr_mask = nv92_gpio_intr_mask,
.drive = nv50_gpio_drive,
.sense = nv50_gpio_sense,
.reset = nv50_gpio_reset,
}.base;

33
drivers/gpu/drm/nouveau/core/subdev/gpio/nvd0.c
View File

@ -24,15 +24,10 @@
#include "priv.h"
struct nvd0_gpio_priv {
struct nouveau_gpio base;
};
void
nvd0_gpio_reset(struct nouveau_gpio *gpio, u8 match)
{
struct nouveau_bios *bios = nouveau_bios(gpio);
struct nvd0_gpio_priv *priv = (void *)gpio;
u8 ver, len;
u16 entry;
int ent = -1;
@ -51,9 +46,9 @@ nvd0_gpio_reset(struct nouveau_gpio *gpio, u8 match)
gpio->set(gpio, 0, func, line, defs);
nv_mask(priv, 0x00d610 + (line * 4), 0xff, unk0);
nv_mask(gpio, 0x00d610 + (line * 4), 0xff, unk0);
if (unk1--)
nv_mask(priv, 0x00d740 + (unk1 * 4), 0xff, line);
nv_mask(gpio, 0x00d740 + (unk1 * 4), 0xff, line);
}
}
@ -72,30 +67,11 @@ nvd0_gpio_sense(struct nouveau_gpio *gpio, int line)
return !!(nv_rd32(gpio, 0x00d610 + (line * 4)) & 0x00004000);
}
static int
nvd0_gpio_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass *oclass, void *data, u32 size,
struct nouveau_object **pobject)
{
struct nvd0_gpio_priv *priv;
int ret;
ret = nouveau_gpio_create(parent, engine, oclass, &priv);
*pobject = nv_object(priv);
if (ret)
return ret;
priv->base.reset = nvd0_gpio_reset;
priv->base.drive = nvd0_gpio_drive;
priv->base.sense = nvd0_gpio_sense;
return 0;
}
struct nouveau_oclass *
nvd0_gpio_oclass = &(struct nouveau_gpio_impl) {
.base.handle = NV_SUBDEV(GPIO, 0xd0),
.base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nvd0_gpio_ctor,
.ctor = _nouveau_gpio_ctor,
.dtor = _nouveau_gpio_dtor,
.init = _nouveau_gpio_init,
.fini = _nouveau_gpio_fini,
@ -103,4 +79,7 @@ nvd0_gpio_oclass = &(struct nouveau_gpio_impl) {
.lines = 32,
.intr_stat = nv92_gpio_intr_stat,
.intr_mask = nv92_gpio_intr_mask,
.drive = nvd0_gpio_drive,
.sense = nvd0_gpio_sense,
.reset = nvd0_gpio_reset,
}.base;

28
drivers/gpu/drm/nouveau/core/subdev/gpio/nve0.c
View File

@ -24,10 +24,6 @@
#include "priv.h"
struct nve0_gpio_priv {
struct nouveau_gpio base;
};
static void
nve0_gpio_intr_stat(struct nouveau_gpio *gpio, u32 *hi, u32 *lo)
{
@ -60,30 +56,11 @@ nve0_gpio_intr_mask(struct nouveau_gpio *gpio, u32 type, u32 mask, u32 data)
nv_wr32(gpio, 0x00dc88, inte1);
}
static int
nve0_gpio_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass *oclass, void *data, u32 size,
struct nouveau_object **pobject)
{
struct nve0_gpio_priv *priv;
int ret;
ret = nouveau_gpio_create(parent, engine, oclass, &priv);
*pobject = nv_object(priv);
if (ret)
return ret;
priv->base.reset = nvd0_gpio_reset;
priv->base.drive = nvd0_gpio_drive;
priv->base.sense = nvd0_gpio_sense;
return 0;
}
struct nouveau_oclass *
nve0_gpio_oclass = &(struct nouveau_gpio_impl) {
.base.handle = NV_SUBDEV(GPIO, 0xe0),
.base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = nve0_gpio_ctor,
.ctor = _nouveau_gpio_ctor,
.dtor = _nouveau_gpio_dtor,
.init = _nouveau_gpio_init,
.fini = _nouveau_gpio_fini,
@ -91,4 +68,7 @@ nve0_gpio_oclass = &(struct nouveau_gpio_impl) {
.lines = 32,
.intr_stat = nve0_gpio_intr_stat,
.intr_mask = nve0_gpio_intr_mask,
.drive = nvd0_gpio_drive,
.sense = nvd0_gpio_sense,
.reset = nvd0_gpio_reset,
}.base;

25
drivers/gpu/drm/nouveau/core/subdev/gpio/priv.h
View File

@ -27,14 +27,6 @@ void _nouveau_gpio_dtor(struct nouveau_object *);
int _nouveau_gpio_init(struct nouveau_object *);
int _nouveau_gpio_fini(struct nouveau_object *, bool);
int nv50_gpio_ctor(struct nouveau_object *, struct nouveau_object *,
struct nouveau_oclass *, void *, u32,
struct nouveau_object **);
void nvd0_gpio_reset(struct nouveau_gpio *, u8);
int nvd0_gpio_drive(struct nouveau_gpio *, int, int, int);
int nvd0_gpio_sense(struct nouveau_gpio *, int);
enum nvkm_gpio_event {
NVKM_GPIO_HI = 1,
NVKM_GPIO_LO = 2,
@ -55,10 +47,27 @@ struct nouveau_gpio_impl {
* given set of gpio lines
*/
void (*intr_mask)(struct nouveau_gpio *, u32, u32, u32);
/* configure gpio direction and output value */
int (*drive)(struct nouveau_gpio *, int line, int dir, int out);
/* sense current state of given gpio line */
int (*sense)(struct nouveau_gpio *, int line);
/*XXX*/
void (*reset)(struct nouveau_gpio *, u8);
};
void nv50_gpio_reset(struct nouveau_gpio *, u8);
int nv50_gpio_drive(struct nouveau_gpio *, int, int, int);
int nv50_gpio_sense(struct nouveau_gpio *, int);
void nv92_gpio_intr_stat(struct nouveau_gpio *, u32 *, u32 *);
void nv92_gpio_intr_mask(struct nouveau_gpio *, u32, u32, u32);
void nvd0_gpio_reset(struct nouveau_gpio *, u8);
int nvd0_gpio_drive(struct nouveau_gpio *, int, int, int);
int nvd0_gpio_sense(struct nouveau_gpio *, int);
#endif