ARM: dts: NSP: Add USB3 and USB3 PHY to NSP
This uses the existing Northstar USB3 PHY driver to enable the USB3 ports on NSP. Signed-off-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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@ -302,6 +302,16 @@
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#size-cells = <0>;
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};
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xhci: usb@29000 {
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compatible = "generic-xhci";
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reg = <0x29000 0x1000>;
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interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
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phys = <&usb3_phy>;
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phy-names = "usb3-phy";
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dma-coherent;
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status = "disabled";
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};
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ehci0: usb@2a000 {
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compatible = "generic-ehci";
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reg = <0x2a000 0x100>;
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@ -469,6 +479,15 @@
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phy-names = "sata-phy";
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};
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};
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usb3_phy: usb3-phy@104000 {
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compatible = "brcm,ns-bx-usb3-phy";
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reg = <0x104000 0x1000>,
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<0x032000 0x1000>;
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reg-names = "dmp", "ccb-mii";
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#phy-cells = <0>;
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status = "disabled";
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};
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};
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pcie0: pcie@18012000 {
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@ -170,3 +170,11 @@
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&uart0 {
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status = "okay";
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};
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&usb3_phy {
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status = "okay";
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};
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&xhci {
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status = "okay";
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};
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@ -182,3 +182,11 @@
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&uart0 {
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status = "okay";
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};
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&usb3_phy {
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status = "okay";
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};
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&xhci {
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status = "okay";
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};
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@ -202,3 +202,11 @@
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&uart0 {
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status = "okay";
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};
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&usb3_phy {
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status = "okay";
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};
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&xhci {
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status = "okay";
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};
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@ -219,3 +219,11 @@
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&uart0 {
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status = "okay";
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};
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&usb3_phy {
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status = "okay";
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};
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&xhci {
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status = "okay";
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};
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@ -227,3 +227,11 @@
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&uart0 {
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status = "okay";
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};
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&usb3_phy {
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status = "okay";
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};
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&xhci {
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status = "okay";
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};
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@ -229,3 +229,11 @@
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&uart0 {
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status = "okay";
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};
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&usb3_phy {
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status = "okay";
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};
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&xhci {
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status = "okay";
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};
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@ -264,3 +264,11 @@
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&uart1 {
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status = "okay";
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};
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&usb3_phy {
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status = "okay";
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};
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&xhci {
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status = "okay";
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};
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