ARM: perf: support percpu irqs for the CPU PMU
Some CPU PMUs are wired up with one PPI for all the CPUs instead of with a different SPI for each CPU. Add support for these devices. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
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@ -16,6 +16,8 @@
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/uaccess.h>
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#include <linux/irq.h>
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#include <linux/irqdesc.h>
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#include <asm/irq_regs.h>
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#include <asm/pmu.h>
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@ -295,9 +297,15 @@ validate_group(struct perf_event *event)
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static irqreturn_t armpmu_dispatch_irq(int irq, void *dev)
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{
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struct arm_pmu *armpmu = (struct arm_pmu *) dev;
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struct platform_device *plat_device = armpmu->plat_device;
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struct arm_pmu_platdata *plat = dev_get_platdata(&plat_device->dev);
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struct arm_pmu *armpmu;
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struct platform_device *plat_device;
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struct arm_pmu_platdata *plat;
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if (irq_is_percpu(irq))
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dev = *(void **)dev;
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armpmu = dev;
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plat_device = armpmu->plat_device;
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plat = dev_get_platdata(&plat_device->dev);
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if (plat && plat->handle_irq)
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return plat->handle_irq(irq, dev, armpmu->handle_irq);
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@ -25,6 +25,8 @@
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/irq.h>
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#include <linux/irqdesc.h>
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#include <asm/cputype.h>
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#include <asm/irq_regs.h>
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@ -33,6 +35,7 @@
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/* Set at runtime when we know what CPU type we are. */
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static struct arm_pmu *cpu_pmu;
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static DEFINE_PER_CPU(struct arm_pmu *, percpu_pmu);
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static DEFINE_PER_CPU(struct perf_event * [ARMPMU_MAX_HWEVENTS], hw_events);
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static DEFINE_PER_CPU(unsigned long [BITS_TO_LONGS(ARMPMU_MAX_HWEVENTS)], used_mask);
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static DEFINE_PER_CPU(struct pmu_hw_events, cpu_hw_events);
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@ -71,6 +74,26 @@ static struct pmu_hw_events *cpu_pmu_get_cpu_events(void)
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return this_cpu_ptr(&cpu_hw_events);
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}
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static void cpu_pmu_enable_percpu_irq(void *data)
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{
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struct arm_pmu *cpu_pmu = data;
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struct platform_device *pmu_device = cpu_pmu->plat_device;
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int irq = platform_get_irq(pmu_device, 0);
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enable_percpu_irq(irq, IRQ_TYPE_NONE);
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cpumask_set_cpu(smp_processor_id(), &cpu_pmu->active_irqs);
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}
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static void cpu_pmu_disable_percpu_irq(void *data)
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{
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struct arm_pmu *cpu_pmu = data;
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struct platform_device *pmu_device = cpu_pmu->plat_device;
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int irq = platform_get_irq(pmu_device, 0);
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cpumask_clear_cpu(smp_processor_id(), &cpu_pmu->active_irqs);
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disable_percpu_irq(irq);
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}
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static void cpu_pmu_free_irq(struct arm_pmu *cpu_pmu)
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{
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int i, irq, irqs;
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@ -78,6 +101,11 @@ static void cpu_pmu_free_irq(struct arm_pmu *cpu_pmu)
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irqs = min(pmu_device->num_resources, num_possible_cpus());
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irq = platform_get_irq(pmu_device, 0);
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if (irq >= 0 && irq_is_percpu(irq)) {
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on_each_cpu(cpu_pmu_disable_percpu_irq, cpu_pmu, 1);
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free_percpu_irq(irq, &percpu_pmu);
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} else {
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for (i = 0; i < irqs; ++i) {
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if (!cpumask_test_and_clear_cpu(i, &cpu_pmu->active_irqs))
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continue;
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@ -85,6 +113,7 @@ static void cpu_pmu_free_irq(struct arm_pmu *cpu_pmu)
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if (irq >= 0)
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free_irq(irq, cpu_pmu);
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}
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}
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}
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static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler)
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@ -101,6 +130,16 @@ static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler)
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return -ENODEV;
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}
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irq = platform_get_irq(pmu_device, 0);
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if (irq >= 0 && irq_is_percpu(irq)) {
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err = request_percpu_irq(irq, handler, "arm-pmu", &percpu_pmu);
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if (err) {
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pr_err("unable to request IRQ%d for ARM PMU counters\n",
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irq);
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return err;
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}
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on_each_cpu(cpu_pmu_enable_percpu_irq, cpu_pmu, 1);
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} else {
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for (i = 0; i < irqs; ++i) {
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err = 0;
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irq = platform_get_irq(pmu_device, i);
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@ -129,6 +168,7 @@ static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler)
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cpumask_set_cpu(i, &cpu_pmu->active_irqs);
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}
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}
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return 0;
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}
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@ -141,6 +181,7 @@ static void cpu_pmu_init(struct arm_pmu *cpu_pmu)
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events->events = per_cpu(hw_events, cpu);
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events->used_mask = per_cpu(used_mask, cpu);
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raw_spin_lock_init(&events->pmu_lock);
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per_cpu(percpu_pmu, cpu) = cpu_pmu;
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}
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cpu_pmu->get_hw_events = cpu_pmu_get_cpu_events;
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