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drm/bridge/sii8620: start MHL transmission after HDMI signal detection 

The vendor code waits for infoframe to detect video mode set by source.
We do not need to follow this pattern, because video mode information is
provided by drm core. As a result most of the infoframe handling
code can be removed.

Start transmission immediately after detecting stream on HDMI lines
in irq_scdt() function without waiting for infoframe interrupt.

Signed-off-by: Maciej Purski <m.purski@samsung.com>
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1511956130-24482-1-git-send-email-m.purski@samsung.com
This commit is contained in:
Maciej Purski 2017-11-29 12:48:50 +01:00 committed by Andrzej Hajda
parent 9378cecb1c
commit bbc05e172f
1 changed files with 2 additions and 51 deletions
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51
drivers/gpu/drm/bridge/sil-sii8620.c
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@ -1941,14 +1941,6 @@ static void sii8620_irq_edid(struct sii8620 *ctx)
ctx->mt_state = MT_STATE_DONE;
}
static void sii8620_scdt_high(struct sii8620 *ctx)
{
sii8620_write_seq_static(ctx,
REG_INTR8_MASK, BIT_CEA_NEW_AVI | BIT_CEA_NEW_VSI,
REG_TPI_SC, BIT_TPI_SC_TPI_OUTPUT_MODE_0_HDMI,
);
}
static void sii8620_irq_scdt(struct sii8620 *ctx)
{
u8 stat = sii8620_readb(ctx, REG_INTR5);
@ -1956,53 +1948,13 @@ static void sii8620_irq_scdt(struct sii8620 *ctx)
if (stat & BIT_INTR_SCDT_CHANGE) {
u8 cstat = sii8620_readb(ctx, REG_TMDS_CSTAT_P3);
if (cstat & BIT_TMDS_CSTAT_P3_SCDT) {
if (ctx->sink_type == SINK_HDMI)
/* enable infoframe interrupt */
sii8620_scdt_high(ctx);
else
if (cstat & BIT_TMDS_CSTAT_P3_SCDT)
sii8620_start_video(ctx);
}
}
sii8620_write(ctx, REG_INTR5, stat);
}
static void sii8620_new_vsi(struct sii8620 *ctx)
{
u8 vsif[11];
sii8620_write(ctx, REG_RX_HDMI_CTRL2,
VAL_RX_HDMI_CTRL2_DEFVAL |
BIT_RX_HDMI_CTRL2_VSI_MON_SEL_VSI);
sii8620_read_buf(ctx, REG_RX_HDMI_MON_PKT_HEADER1, vsif,
ARRAY_SIZE(vsif));
}
static void sii8620_new_avi(struct sii8620 *ctx)
{
sii8620_write(ctx, REG_RX_HDMI_CTRL2, VAL_RX_HDMI_CTRL2_DEFVAL);
sii8620_read_buf(ctx, REG_RX_HDMI_MON_PKT_HEADER1, ctx->avif,
ARRAY_SIZE(ctx->avif));
}
static void sii8620_irq_infr(struct sii8620 *ctx)
{
u8 stat = sii8620_readb(ctx, REG_INTR8)
& (BIT_CEA_NEW_VSI | BIT_CEA_NEW_AVI);
sii8620_write(ctx, REG_INTR8, stat);
if (stat & BIT_CEA_NEW_VSI)
sii8620_new_vsi(ctx);
if (stat & BIT_CEA_NEW_AVI)
sii8620_new_avi(ctx);
if (stat & (BIT_CEA_NEW_VSI | BIT_CEA_NEW_AVI))
sii8620_start_video(ctx);
}
static void sii8620_got_xdevcap(struct sii8620 *ctx, int ret)
{
if (ret < 0)
@ -2084,7 +2036,6 @@ static irqreturn_t sii8620_irq_thread(int irq, void *data)
{ BIT_FAST_INTR_STAT_EDID, sii8620_irq_edid },
{ BIT_FAST_INTR_STAT_DDC, sii8620_irq_ddc },
{ BIT_FAST_INTR_STAT_SCDT, sii8620_irq_scdt },
{ BIT_FAST_INTR_STAT_INFR, sii8620_irq_infr },
};
struct sii8620 *ctx = data;
u8 stats[LEN_FAST_INTR_STAT];