Merge branch kvm-arm64/single-step-async-exception into kvmarm-master/next
* kvm-arm64/single-step-async-exception: : . : Single-step fixes from Reiji Watanabe: : : "This series fixes two bugs of single-step execution enabled by : userspace, and add a test case for KVM_GUESTDBG_SINGLESTEP to : the debug-exception test to verify the single-step behavior." : . KVM: arm64: selftests: Add a test case for KVM_GUESTDBG_SINGLESTEP KVM: arm64: selftests: Refactor debug-exceptions to make it amenable to new test cases KVM: arm64: Clear PSTATE.SS when the Software Step state was Active-pending KVM: arm64: Preserve PSTATE.SS for the guest while single-step is enabled Signed-off-by: Marc Zyngier <maz@kernel.org>
This commit is contained in:
commit
bb0cca240a
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@ -393,6 +393,7 @@ struct kvm_vcpu_arch {
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*/
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struct {
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u32 mdscr_el1;
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bool pstate_ss;
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} guest_debug_preserved;
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/* vcpu power state */
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@ -535,6 +536,9 @@ struct kvm_vcpu_arch {
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#define IN_WFIT __vcpu_single_flag(sflags, BIT(3))
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/* vcpu system registers loaded on physical CPU */
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#define SYSREGS_ON_CPU __vcpu_single_flag(sflags, BIT(4))
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/* Software step state is Active-pending */
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#define DBG_SS_ACTIVE_PENDING __vcpu_single_flag(sflags, BIT(5))
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/* Pointer to the vcpu's SVE FFR for sve_{save,load}_state() */
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#define vcpu_sve_pffr(vcpu) (kern_hyp_va((vcpu)->arch.sve_state) + \
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@ -32,6 +32,10 @@ static DEFINE_PER_CPU(u64, mdcr_el2);
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*
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* Guest access to MDSCR_EL1 is trapped by the hypervisor and handled
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* after we have restored the preserved value to the main context.
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*
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* When single-step is enabled by userspace, we tweak PSTATE.SS on every
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* guest entry. Preserve PSTATE.SS so we can restore the original value
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* for the vcpu after the single-step is disabled.
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*/
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static void save_guest_debug_regs(struct kvm_vcpu *vcpu)
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{
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@ -41,6 +45,9 @@ static void save_guest_debug_regs(struct kvm_vcpu *vcpu)
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trace_kvm_arm_set_dreg32("Saved MDSCR_EL1",
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vcpu->arch.guest_debug_preserved.mdscr_el1);
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vcpu->arch.guest_debug_preserved.pstate_ss =
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(*vcpu_cpsr(vcpu) & DBG_SPSR_SS);
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}
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static void restore_guest_debug_regs(struct kvm_vcpu *vcpu)
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@ -51,6 +58,11 @@ static void restore_guest_debug_regs(struct kvm_vcpu *vcpu)
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trace_kvm_arm_set_dreg32("Restored MDSCR_EL1",
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vcpu_read_sys_reg(vcpu, MDSCR_EL1));
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if (vcpu->arch.guest_debug_preserved.pstate_ss)
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*vcpu_cpsr(vcpu) |= DBG_SPSR_SS;
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else
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*vcpu_cpsr(vcpu) &= ~DBG_SPSR_SS;
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}
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/**
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@ -188,7 +200,18 @@ void kvm_arm_setup_debug(struct kvm_vcpu *vcpu)
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* debugging the system.
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*/
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if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
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*vcpu_cpsr(vcpu) |= DBG_SPSR_SS;
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/*
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* If the software step state at the last guest exit
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* was Active-pending, we don't set DBG_SPSR_SS so
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* that the state is maintained (to not run another
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* single-step until the pending Software Step
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* exception is taken).
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*/
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if (!vcpu_get_flag(vcpu, DBG_SS_ACTIVE_PENDING))
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*vcpu_cpsr(vcpu) |= DBG_SPSR_SS;
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else
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*vcpu_cpsr(vcpu) &= ~DBG_SPSR_SS;
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mdscr = vcpu_read_sys_reg(vcpu, MDSCR_EL1);
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mdscr |= DBG_MDSCR_SS;
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vcpu_write_sys_reg(vcpu, mdscr, MDSCR_EL1);
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@ -262,6 +285,15 @@ void kvm_arm_clear_debug(struct kvm_vcpu *vcpu)
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* Restore the guest's debug registers if we were using them.
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*/
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if (vcpu->guest_debug || kvm_vcpu_os_lock_enabled(vcpu)) {
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if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
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if (!(*vcpu_cpsr(vcpu) & DBG_SPSR_SS))
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/*
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* Mark the vcpu as ACTIVE_PENDING
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* until Software Step exception is taken.
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*/
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vcpu_set_flag(vcpu, DBG_SS_ACTIVE_PENDING);
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}
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restore_guest_debug_regs(vcpu);
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/*
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@ -937,6 +937,7 @@ int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
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} else {
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/* If not enabled clear all flags */
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vcpu->guest_debug = 0;
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vcpu_clear_flag(vcpu, DBG_SS_ACTIVE_PENDING);
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}
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out:
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@ -152,8 +152,14 @@ static int kvm_handle_guest_debug(struct kvm_vcpu *vcpu)
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run->debug.arch.hsr_high = upper_32_bits(esr);
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run->flags = KVM_DEBUG_ARCH_HSR_HIGH_VALID;
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if (ESR_ELx_EC(esr) == ESR_ELx_EC_WATCHPT_LOW)
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switch (ESR_ELx_EC(esr)) {
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case ESR_ELx_EC_WATCHPT_LOW:
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run->debug.arch.far = vcpu->arch.fault.far_el2;
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break;
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case ESR_ELx_EC_SOFTSTP_LOW:
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vcpu_clear_flag(vcpu, DBG_SS_ACTIVE_PENDING);
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break;
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}
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return 0;
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}
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@ -22,6 +22,7 @@
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#define SPSR_SS (1 << 21)
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extern unsigned char sw_bp, sw_bp2, hw_bp, hw_bp2, bp_svc, bp_brk, hw_wp, ss_start;
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extern unsigned char iter_ss_begin, iter_ss_end;
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static volatile uint64_t sw_bp_addr, hw_bp_addr;
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static volatile uint64_t wp_addr, wp_data_addr;
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static volatile uint64_t svc_addr;
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@ -238,6 +239,46 @@ static void guest_svc_handler(struct ex_regs *regs)
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svc_addr = regs->pc;
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}
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enum single_step_op {
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SINGLE_STEP_ENABLE = 0,
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SINGLE_STEP_DISABLE = 1,
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};
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static void guest_code_ss(int test_cnt)
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{
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uint64_t i;
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uint64_t bvr, wvr, w_bvr, w_wvr;
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for (i = 0; i < test_cnt; i++) {
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/* Bits [1:0] of dbg{b,w}vr are RES0 */
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w_bvr = i << 2;
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w_wvr = i << 2;
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/* Enable Single Step execution */
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GUEST_SYNC(SINGLE_STEP_ENABLE);
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/*
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* The userspace will veriry that the pc is as expected during
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* single step execution between iter_ss_begin and iter_ss_end.
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*/
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asm volatile("iter_ss_begin:nop\n");
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write_sysreg(w_bvr, dbgbvr0_el1);
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write_sysreg(w_wvr, dbgwvr0_el1);
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bvr = read_sysreg(dbgbvr0_el1);
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wvr = read_sysreg(dbgwvr0_el1);
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asm volatile("iter_ss_end:\n");
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/* Disable Single Step execution */
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GUEST_SYNC(SINGLE_STEP_DISABLE);
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GUEST_ASSERT(bvr == w_bvr);
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GUEST_ASSERT(wvr == w_wvr);
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}
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GUEST_DONE();
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}
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static int debug_version(struct kvm_vcpu *vcpu)
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{
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uint64_t id_aa64dfr0;
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@ -246,7 +287,7 @@ static int debug_version(struct kvm_vcpu *vcpu)
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return id_aa64dfr0 & 0xf;
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}
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int main(int argc, char *argv[])
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static void test_guest_debug_exceptions(void)
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{
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struct kvm_vcpu *vcpu;
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struct kvm_vm *vm;
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vm_init_descriptor_tables(vm);
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vcpu_init_descriptor_tables(vcpu);
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__TEST_REQUIRE(debug_version(vcpu) >= 6,
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"Armv8 debug architecture not supported.");
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vm_install_sync_handler(vm, VECTOR_SYNC_CURRENT,
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ESR_EC_BRK_INS, guest_sw_bp_handler);
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vm_install_sync_handler(vm, VECTOR_SYNC_CURRENT,
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@ -294,5 +332,108 @@ int main(int argc, char *argv[])
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done:
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kvm_vm_free(vm);
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}
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void test_single_step_from_userspace(int test_cnt)
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{
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struct kvm_vcpu *vcpu;
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struct kvm_vm *vm;
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struct ucall uc;
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struct kvm_run *run;
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uint64_t pc, cmd;
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uint64_t test_pc = 0;
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bool ss_enable = false;
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struct kvm_guest_debug debug = {};
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vm = vm_create_with_one_vcpu(&vcpu, guest_code_ss);
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ucall_init(vm, NULL);
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run = vcpu->run;
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vcpu_args_set(vcpu, 1, test_cnt);
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while (1) {
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vcpu_run(vcpu);
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if (run->exit_reason != KVM_EXIT_DEBUG) {
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cmd = get_ucall(vcpu, &uc);
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if (cmd == UCALL_ABORT) {
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REPORT_GUEST_ASSERT(uc);
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/* NOT REACHED */
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} else if (cmd == UCALL_DONE) {
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break;
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}
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TEST_ASSERT(cmd == UCALL_SYNC,
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"Unexpected ucall cmd 0x%lx", cmd);
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if (uc.args[1] == SINGLE_STEP_ENABLE) {
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debug.control = KVM_GUESTDBG_ENABLE |
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KVM_GUESTDBG_SINGLESTEP;
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ss_enable = true;
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} else {
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debug.control = SINGLE_STEP_DISABLE;
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ss_enable = false;
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}
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vcpu_guest_debug_set(vcpu, &debug);
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continue;
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}
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TEST_ASSERT(ss_enable, "Unexpected KVM_EXIT_DEBUG");
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/* Check if the current pc is expected. */
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vcpu_get_reg(vcpu, ARM64_CORE_REG(regs.pc), &pc);
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TEST_ASSERT(!test_pc || pc == test_pc,
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"Unexpected pc 0x%lx (expected 0x%lx)",
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pc, test_pc);
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/*
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* If the current pc is between iter_ss_bgin and
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* iter_ss_end, the pc for the next KVM_EXIT_DEBUG should
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* be the current pc + 4.
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*/
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if ((pc >= (uint64_t)&iter_ss_begin) &&
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(pc < (uint64_t)&iter_ss_end))
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test_pc = pc + 4;
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else
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test_pc = 0;
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}
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kvm_vm_free(vm);
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}
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static void help(char *name)
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{
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puts("");
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printf("Usage: %s [-h] [-i iterations of the single step test]\n", name);
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puts("");
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exit(0);
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}
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int main(int argc, char *argv[])
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{
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struct kvm_vcpu *vcpu;
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struct kvm_vm *vm;
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int opt;
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int ss_iteration = 10000;
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vm = vm_create_with_one_vcpu(&vcpu, guest_code);
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__TEST_REQUIRE(debug_version(vcpu) >= 6,
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"Armv8 debug architecture not supported.");
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kvm_vm_free(vm);
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while ((opt = getopt(argc, argv, "i:")) != -1) {
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switch (opt) {
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case 'i':
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ss_iteration = atoi(optarg);
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break;
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case 'h':
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default:
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help(argv[0]);
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break;
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}
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}
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test_guest_debug_exceptions();
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test_single_step_from_userspace(ss_iteration);
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return 0;
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}
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