arm64/sysreg: Standardise naming for DCZID_EL0 field names
The constants defining field names for DCZID_EL0 do not include the _EL0 that is included as part of our standard naming scheme. In preparation for automatic generation of the defines add the _EL0 in. No functional change. Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20220704170302.2609529-8-broonie@kernel.org Signed-off-by: Will Deacon <will@kernel.org>
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@ -1099,8 +1099,8 @@
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#define CTR_EL0_IDC_SHIFT 28
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#define CTR_EL0_DIC_SHIFT 29
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#define DCZID_DZP_SHIFT 4
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#define DCZID_BS_SHIFT 0
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#define DCZID_EL0_DZP_SHIFT 4
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#define DCZID_EL0_BS_SHIFT 0
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#define CPACR_EL1_FPEN_EL1EN (BIT(20)) /* enable EL1 access */
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#define CPACR_EL1_FPEN_EL0EN (BIT(21)) /* enable EL0 access, if EL1EN set */
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@ -453,8 +453,8 @@ static const struct arm64_ftr_bits ftr_mvfr2[] = {
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};
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static const struct arm64_ftr_bits ftr_dczid[] = {
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ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_EXACT, DCZID_DZP_SHIFT, 1, 1),
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ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, DCZID_BS_SHIFT, 4, 0),
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ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_EXACT, DCZID_EL0_DZP_SHIFT, 1, 1),
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ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, DCZID_EL0_BS_SHIFT, 4, 0),
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ARM64_FTR_END,
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};
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