[PATCH] ppc32: Remove board support for K2

Support for the K2 board is no longer maintained and thus being removed

Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Kumar Gala 2005-09-03 15:55:23 -07:00 committed by Linus Torvalds
parent 94cb20e951
commit ba9d1e2a3d
7 changed files with 1 additions and 1390 deletions

View File

@ -637,9 +637,6 @@ config SANDPOINT
config RADSTONE_PPC7D config RADSTONE_PPC7D
bool "Radstone Technology PPC7D board" bool "Radstone Technology PPC7D board"
config K2
bool "SBS-K2"
config PAL4 config PAL4
bool "SBS-Palomar4" bool "SBS-Palomar4"
@ -794,7 +791,7 @@ config PPC_OF
config PPC_GEN550 config PPC_GEN550
bool bool
depends on SANDPOINT || MCPN765 || SPRUCE || PPLUS || PCORE || \ depends on SANDPOINT || MCPN765 || SPRUCE || PPLUS || PCORE || \
PRPMC750 || K2 || PRPMC800 || LOPEC || \ PRPMC750 || PRPMC800 || LOPEC || \
(EV64260 && !SERIAL_MPSC) || CHESTNUT || RADSTONE_PPC7D || \ (EV64260 && !SERIAL_MPSC) || CHESTNUT || RADSTONE_PPC7D || \
83xx 83xx
default y default y
@ -883,10 +880,6 @@ config SANDPOINT_ENABLE_UART1
If this option is enabled then the MPC824x processor will run If this option is enabled then the MPC824x processor will run
in DUART mode instead of UART mode. in DUART mode instead of UART mode.
config CPC710_DATA_GATHERING
bool "Enable CPC710 data gathering"
depends on K2
config HARRIER_STORE_GATHERING config HARRIER_STORE_GATHERING
bool "Enable Harrier store gathering" bool "Enable Harrier store gathering"
depends on HARRIER depends on HARRIER

View File

@ -96,10 +96,6 @@ zimageinitrd-$(CONFIG_OCOTEA) := zImage.initrd-TREE
zimageinitrd-$(CONFIG_GEMINI) := zImage.initrd-STRIPELF zimageinitrd-$(CONFIG_GEMINI) := zImage.initrd-STRIPELF
end-$(CONFIG_GEMINI) := gemini end-$(CONFIG_GEMINI) := gemini
extra.o-$(CONFIG_K2) := prepmap.o
end-$(CONFIG_K2) := k2
cacheflag-$(CONFIG_K2) := -include $(clear_L2_L3)
extra.o-$(CONFIG_KATANA) := misc-katana.o extra.o-$(CONFIG_KATANA) := misc-katana.o
end-$(CONFIG_KATANA) := katana end-$(CONFIG_KATANA) := katana
cacheflag-$(CONFIG_KATANA) := -include $(clear_L2_L3) cacheflag-$(CONFIG_KATANA) := -include $(clear_L2_L3)

View File

@ -1,680 +0,0 @@
#
# Automatically generated make config: don't edit
#
CONFIG_MMU=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_HAVE_DEC_LOCK=y
CONFIG_PPC=y
CONFIG_PPC32=y
CONFIG_GENERIC_NVRAM=y
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
CONFIG_STANDALONE=y
CONFIG_BROKEN_ON_SMP=y
#
# General setup
#
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_AS=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_OBSOLETE_MODPARM=y
# CONFIG_MODVERSIONS is not set
CONFIG_KMOD=y
#
# Processor
#
CONFIG_6xx=y
# CONFIG_40x is not set
# CONFIG_44x is not set
# CONFIG_POWER3 is not set
# CONFIG_POWER4 is not set
# CONFIG_8xx is not set
# CONFIG_ALTIVEC is not set
# CONFIG_TAU is not set
# CONFIG_CPU_FREQ is not set
CONFIG_PPC_STD_MMU=y
#
# Platform options
#
# CONFIG_PPC_MULTIPLATFORM is not set
# CONFIG_APUS is not set
# CONFIG_WILLOW is not set
# CONFIG_PCORE is not set
# CONFIG_POWERPMC250 is not set
# CONFIG_EV64260 is not set
# CONFIG_SPRUCE is not set
# CONFIG_LOPEC is not set
# CONFIG_MCPN765 is not set
# CONFIG_MVME5100 is not set
# CONFIG_PPLUS is not set
# CONFIG_PRPMC750 is not set
# CONFIG_PRPMC800 is not set
# CONFIG_SANDPOINT is not set
# CONFIG_ADIR is not set
CONFIG_K2=y
# CONFIG_PAL4 is not set
# CONFIG_GEMINI is not set
# CONFIG_EST8260 is not set
# CONFIG_SBS8260 is not set
# CONFIG_RPX6 is not set
# CONFIG_TQM8260 is not set
CONFIG_PPC_GEN550=y
# CONFIG_CPC710_DATA_GATHERING is not set
# CONFIG_SMP is not set
# CONFIG_PREEMPT is not set
# CONFIG_HIGHMEM is not set
CONFIG_KERNEL_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE="ip=on"
#
# Bus options
#
CONFIG_GENERIC_ISA_DMA=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PCI_LEGACY_PROC is not set
# CONFIG_PCI_NAMES is not set
#
# Advanced setup
#
# CONFIG_ADVANCED_OPTIONS is not set
#
# Default settings for advanced configuration options are used
#
CONFIG_HIGHMEM_START=0xfe000000
CONFIG_LOWMEM_SIZE=0x30000000
CONFIG_KERNEL_START=0xc0000000
CONFIG_TASK_SIZE=0x80000000
CONFIG_BOOT_LOAD=0x00800000
#
# Device Drivers
#
#
# Generic Driver Options
#
#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_CARMEL is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_INITRD=y
# CONFIG_LBD is not set
#
# ATA/ATAPI/MFM/RLL support
#
CONFIG_IDE=y
CONFIG_BLK_DEV_IDE=y
#
# Please see Documentation/ide.txt for help/info on IDE drives
#
CONFIG_BLK_DEV_IDEDISK=y
# CONFIG_IDEDISK_MULTI_MODE is not set
# CONFIG_IDEDISK_STROKE is not set
# CONFIG_BLK_DEV_IDECD is not set
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_BLK_DEV_IDEFLOPPY is not set
# CONFIG_IDE_TASK_IOCTL is not set
# CONFIG_IDE_TASKFILE_IO is not set
#
# IDE chipset support/bugfixes
#
# CONFIG_IDE_GENERIC is not set
CONFIG_BLK_DEV_IDEPCI=y
# CONFIG_IDEPCI_SHARE_IRQ is not set
# CONFIG_BLK_DEV_OFFBOARD is not set
# CONFIG_BLK_DEV_GENERIC is not set
# CONFIG_BLK_DEV_OPTI621 is not set
# CONFIG_BLK_DEV_SL82C105 is not set
CONFIG_BLK_DEV_IDEDMA_PCI=y
# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
# CONFIG_IDEDMA_PCI_AUTO is not set
CONFIG_BLK_DEV_ADMA=y
# CONFIG_BLK_DEV_AEC62XX is not set
CONFIG_BLK_DEV_ALI15X3=y
# CONFIG_WDC_ALI15X3 is not set
# CONFIG_BLK_DEV_AMD74XX is not set
# CONFIG_BLK_DEV_CMD64X is not set
# CONFIG_BLK_DEV_TRIFLEX is not set
# CONFIG_BLK_DEV_CY82C693 is not set
# CONFIG_BLK_DEV_CS5520 is not set
# CONFIG_BLK_DEV_CS5530 is not set
# CONFIG_BLK_DEV_HPT34X is not set
# CONFIG_BLK_DEV_HPT366 is not set
# CONFIG_BLK_DEV_SC1200 is not set
# CONFIG_BLK_DEV_PIIX is not set
# CONFIG_BLK_DEV_NS87415 is not set
# CONFIG_BLK_DEV_PDC202XX_OLD is not set
# CONFIG_BLK_DEV_PDC202XX_NEW is not set
# CONFIG_BLK_DEV_SVWKS is not set
# CONFIG_BLK_DEV_SIIMAGE is not set
# CONFIG_BLK_DEV_SLC90E66 is not set
# CONFIG_BLK_DEV_TRM290 is not set
# CONFIG_BLK_DEV_VIA82CXXX is not set
CONFIG_BLK_DEV_IDEDMA=y
# CONFIG_IDEDMA_IVB is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_BLK_DEV_HD is not set
#
# SCSI device support
#
# CONFIG_SCSI is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Fusion MPT device support
#
# CONFIG_FUSION is not set
#
# IEEE 1394 (FireWire) support
#
# CONFIG_IEEE1394 is not set
#
# I2O device support
#
# CONFIG_I2O is not set
#
# Macintosh device drivers
#
#
# Networking support
#
CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_MMAP is not set
# CONFIG_NETLINK_DEV is not set
CONFIG_UNIX=y
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
# CONFIG_IP_PNP_BOOTP is not set
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_ARPD is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
#
# IP: Virtual Server Configuration
#
# CONFIG_IP_VS is not set
# CONFIG_IPV6 is not set
CONFIG_NETFILTER=y
# CONFIG_NETFILTER_DEBUG is not set
#
# IP: Netfilter Configuration
#
CONFIG_IP_NF_CONNTRACK=m
CONFIG_IP_NF_FTP=m
# CONFIG_IP_NF_IRC is not set
# CONFIG_IP_NF_TFTP is not set
# CONFIG_IP_NF_AMANDA is not set
# CONFIG_IP_NF_QUEUE is not set
CONFIG_IP_NF_IPTABLES=m
CONFIG_IP_NF_MATCH_LIMIT=m
# CONFIG_IP_NF_MATCH_IPRANGE is not set
CONFIG_IP_NF_MATCH_MAC=m
CONFIG_IP_NF_MATCH_PKTTYPE=m
CONFIG_IP_NF_MATCH_MARK=m
CONFIG_IP_NF_MATCH_MULTIPORT=m
CONFIG_IP_NF_MATCH_TOS=m
# CONFIG_IP_NF_MATCH_RECENT is not set
CONFIG_IP_NF_MATCH_ECN=m
CONFIG_IP_NF_MATCH_DSCP=m
CONFIG_IP_NF_MATCH_AH_ESP=m
# CONFIG_IP_NF_MATCH_LENGTH is not set
# CONFIG_IP_NF_MATCH_TTL is not set
CONFIG_IP_NF_MATCH_TCPMSS=m
CONFIG_IP_NF_MATCH_HELPER=m
CONFIG_IP_NF_MATCH_STATE=m
CONFIG_IP_NF_MATCH_CONNTRACK=m
CONFIG_IP_NF_MATCH_OWNER=m
CONFIG_IP_NF_FILTER=m
CONFIG_IP_NF_TARGET_REJECT=m
CONFIG_IP_NF_NAT=m
CONFIG_IP_NF_NAT_NEEDED=y
CONFIG_IP_NF_TARGET_MASQUERADE=m
CONFIG_IP_NF_TARGET_REDIRECT=m
# CONFIG_IP_NF_TARGET_NETMAP is not set
# CONFIG_IP_NF_TARGET_SAME is not set
# CONFIG_IP_NF_NAT_SNMP_BASIC is not set
CONFIG_IP_NF_NAT_FTP=m
# CONFIG_IP_NF_MANGLE is not set
# CONFIG_IP_NF_TARGET_LOG is not set
CONFIG_IP_NF_TARGET_ULOG=m
CONFIG_IP_NF_TARGET_TCPMSS=m
CONFIG_IP_NF_ARPTABLES=m
CONFIG_IP_NF_ARPFILTER=m
# CONFIG_IP_NF_ARP_MANGLE is not set
CONFIG_IP_NF_COMPAT_IPCHAINS=m
# CONFIG_IP_NF_COMPAT_IPFWADM is not set
# CONFIG_IP_NF_RAW is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_SCTP is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_NET_HW_FLOWCONTROL is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_HAMRADIO is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
#
# ARCnet devices
#
# CONFIG_ARCNET is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
# CONFIG_OAKNET is not set
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNGEM is not set
# CONFIG_NET_VENDOR_3COM is not set
#
# Tulip family network device support
#
# CONFIG_NET_TULIP is not set
# CONFIG_HP100 is not set
CONFIG_NET_PCI=y
# CONFIG_PCNET32 is not set
# CONFIG_AMD8111_ETH is not set
# CONFIG_ADAPTEC_STARFIRE is not set
# CONFIG_B44 is not set
# CONFIG_FORCEDETH is not set
# CONFIG_DGRS is not set
CONFIG_EEPRO100=y
# CONFIG_EEPRO100_PIO is not set
# CONFIG_E100 is not set
# CONFIG_FEALNX is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
# CONFIG_8139CP is not set
# CONFIG_8139TOO is not set
# CONFIG_SIS900 is not set
# CONFIG_EPIC100 is not set
# CONFIG_SUNDANCE is not set
# CONFIG_TLAN is not set
# CONFIG_VIA_RHINE is not set
#
# Ethernet (1000 Mbit)
#
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
# CONFIG_E1000 is not set
# CONFIG_NS83820 is not set
# CONFIG_HAMACHI is not set
# CONFIG_YELLOWFIN is not set
# CONFIG_R8169 is not set
# CONFIG_SK98LIN is not set
# CONFIG_TIGON3 is not set
#
# Ethernet (10000 Mbit)
#
# CONFIG_IXGB is not set
# CONFIG_S2IO is not set
#
# Token Ring devices
#
# CONFIG_TR is not set
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_RCPCI is not set
# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
#
# ISDN subsystem
#
# CONFIG_ISDN is not set
#
# Telephony Support
#
# CONFIG_PHONE is not set
#
# Input device support
#
# CONFIG_INPUT is not set
#
# Userland interfaces
#
#
# Input I/O drivers
#
# CONFIG_GAMEPORT is not set
CONFIG_SOUND_GAMEPORT=y
# CONFIG_SERIO is not set
# CONFIG_SERIO_I8042 is not set
#
# Input Device Drivers
#
#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=2
# CONFIG_SERIAL_8250_EXTENDED is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_QIC02_TAPE is not set
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_NVRAM is not set
CONFIG_GEN_RTC=y
# CONFIG_GEN_RTC_X is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_FTAPE is not set
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# I2C support
#
# CONFIG_I2C is not set
#
# Misc devices
#
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
#
# Graphics support
#
# CONFIG_FB is not set
#
# Sound
#
# CONFIG_SOUND is not set
#
# USB support
#
# CONFIG_USB is not set
#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_FAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
CONFIG_SYSFS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_DEVPTS_FS_XATTR is not set
CONFIG_TMPFS=y
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
# CONFIG_NFS_V4 is not set
# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
# CONFIG_EXPORTFS is not set
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_INTERMEZZO_FS is not set
# CONFIG_AFS_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
#
# Native Language Support
#
# CONFIG_NLS is not set
#
# Library routines
#
# CONFIG_CRC32 is not set
#
# Kernel hacking
#
# CONFIG_DEBUG_KERNEL is not set
# CONFIG_SERIAL_TEXT_DEBUG is not set
#
# Security options
#
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
# CONFIG_CRYPTO is not set

View File

@ -27,7 +27,6 @@ obj-$(CONFIG_CPCI690) += cpci690.o
obj-$(CONFIG_EV64260) += ev64260.o obj-$(CONFIG_EV64260) += ev64260.o
obj-$(CONFIG_CHESTNUT) += chestnut.o obj-$(CONFIG_CHESTNUT) += chestnut.o
obj-$(CONFIG_GEMINI) += gemini_pci.o gemini_setup.o gemini_prom.o obj-$(CONFIG_GEMINI) += gemini_pci.o gemini_setup.o gemini_prom.o
obj-$(CONFIG_K2) += k2.o
obj-$(CONFIG_LOPEC) += lopec.o obj-$(CONFIG_LOPEC) += lopec.o
obj-$(CONFIG_KATANA) += katana.o obj-$(CONFIG_KATANA) += katana.o
obj-$(CONFIG_HDPU) += hdpu.o obj-$(CONFIG_HDPU) += hdpu.o

View File

@ -1,613 +0,0 @@
/*
* arch/ppc/platforms/k2.c
*
* Board setup routines for SBS K2
*
* Author: Matt Porter <mporter@mvista.com>
*
* Updated by: Randy Vinson <rvinson@mvista.com.
*
* 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*/
#include <linux/config.h>
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/reboot.h>
#include <linux/pci.h>
#include <linux/kdev_t.h>
#include <linux/types.h>
#include <linux/major.h>
#include <linux/initrd.h>
#include <linux/console.h>
#include <linux/delay.h>
#include <linux/ide.h>
#include <linux/irq.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>
#include <asm/system.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <asm/dma.h>
#include <asm/io.h>
#include <asm/machdep.h>
#include <asm/time.h>
#include <asm/i8259.h>
#include <asm/todc.h>
#include <asm/bootinfo.h>
#include <syslib/cpc710.h>
#include "k2.h"
extern unsigned long loops_per_jiffy;
extern void gen550_progress(char *, unsigned short);
static unsigned int cpu_7xx[16] = {
0, 15, 14, 0, 0, 13, 5, 9, 6, 11, 8, 10, 16, 12, 7, 0
};
static unsigned int cpu_6xx[16] = {
0, 0, 14, 0, 0, 13, 5, 9, 6, 11, 8, 10, 0, 12, 7, 0
};
static inline int __init
k2_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
{
struct pci_controller *hose = pci_bus_to_hose(dev->bus->number);
/*
* Check our hose index. If we are zero then we are on the
* local PCI hose, otherwise we are on the cPCI hose.
*/
if (!hose->index) {
static char pci_irq_table[][4] =
/*
* PCI IDSEL/INTPIN->INTLINE
* A B C D
*/
{
{1, 0, 0, 0}, /* Ethernet */
{5, 5, 5, 5}, /* PMC Site 1 */
{6, 6, 6, 6}, /* PMC Site 2 */
{0, 0, 0, 0}, /* unused */
{0, 0, 0, 0}, /* unused */
{0, 0, 0, 0}, /* PCI-ISA Bridge */
{0, 0, 0, 0}, /* unused */
{0, 0, 0, 0}, /* unused */
{0, 0, 0, 0}, /* unused */
{0, 0, 0, 0}, /* unused */
{0, 0, 0, 0}, /* unused */
{0, 0, 0, 0}, /* unused */
{0, 0, 0, 0}, /* unused */
{0, 0, 0, 0}, /* unused */
{15, 0, 0, 0}, /* M5229 IDE */
};
const long min_idsel = 3, max_idsel = 17, irqs_per_slot = 4;
return PCI_IRQ_TABLE_LOOKUP;
} else {
static char pci_irq_table[][4] =
/*
* PCI IDSEL/INTPIN->INTLINE
* A B C D
*/
{
{10, 11, 12, 9}, /* cPCI slot 8 */
{11, 12, 9, 10}, /* cPCI slot 7 */
{12, 9, 10, 11}, /* cPCI slot 6 */
{9, 10, 11, 12}, /* cPCI slot 5 */
{10, 11, 12, 9}, /* cPCI slot 4 */
{11, 12, 9, 10}, /* cPCI slot 3 */
{12, 9, 10, 11}, /* cPCI slot 2 */
};
const long min_idsel = 15, max_idsel = 21, irqs_per_slot = 4;
return PCI_IRQ_TABLE_LOOKUP;
}
}
void k2_pcibios_fixup(void)
{
#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
struct pci_dev *ide_dev;
/*
* Enable DMA support on hdc
*/
ide_dev = pci_get_device(PCI_VENDOR_ID_AL,
PCI_DEVICE_ID_AL_M5229, NULL);
if (ide_dev) {
unsigned long ide_dma_base;
ide_dma_base = pci_resource_start(ide_dev, 4);
outb(0x00, ide_dma_base + 0x2);
outb(0x20, ide_dma_base + 0xa);
pci_dev_put(ide_dev);
}
#endif
}
void k2_pcibios_fixup_resources(struct pci_dev *dev)
{
int i;
if ((dev->vendor == PCI_VENDOR_ID_IBM) &&
(dev->device == PCI_DEVICE_ID_IBM_CPC710_PCI64)) {
pr_debug("Fixup CPC710 resources\n");
for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
dev->resource[i].start = 0;
dev->resource[i].end = 0;
}
}
}
void k2_setup_hoses(void)
{
struct pci_controller *hose_a, *hose_b;
/*
* Reconfigure CPC710 memory map so
* we have some more PCI memory space.
*/
/* Set FPHB mode */
__raw_writel(0x808000e0, PGCHP); /* Set FPHB mode */
/* PCI32 mappings */
__raw_writel(0x00000000, K2_PCI32_BAR + PIBAR); /* PCI I/O base */
__raw_writel(0x00000000, K2_PCI32_BAR + PMBAR); /* PCI Mem base */
__raw_writel(0xf0000000, K2_PCI32_BAR + MSIZE); /* 256MB */
__raw_writel(0xfff00000, K2_PCI32_BAR + IOSIZE); /* 1MB */
__raw_writel(0xc0000000, K2_PCI32_BAR + SMBAR); /* Base@0xc0000000 */
__raw_writel(0x80000000, K2_PCI32_BAR + SIBAR); /* Base@0x80000000 */
__raw_writel(0x000000c0, K2_PCI32_BAR + PSSIZE); /* 1GB space */
__raw_writel(0x000000c0, K2_PCI32_BAR + PPSIZE); /* 1GB space */
__raw_writel(0x00000000, K2_PCI32_BAR + BARPS); /* Base@0x00000000 */
__raw_writel(0x00000000, K2_PCI32_BAR + BARPP); /* Base@0x00000000 */
__raw_writel(0x00000080, K2_PCI32_BAR + PSBAR); /* Base@0x80 */
__raw_writel(0x00000000, K2_PCI32_BAR + PPBAR);
__raw_writel(0xc0000000, K2_PCI32_BAR + BPMDLK);
__raw_writel(0xd0000000, K2_PCI32_BAR + TPMDLK);
__raw_writel(0x80000000, K2_PCI32_BAR + BIODLK);
__raw_writel(0x80100000, K2_PCI32_BAR + TIODLK);
__raw_writel(0xe0008000, K2_PCI32_BAR + DLKCTRL);
__raw_writel(0xffffffff, K2_PCI32_BAR + DLKDEV);
/* PCI64 mappings */
__raw_writel(0x00100000, K2_PCI64_BAR + PIBAR); /* PCI I/O base */
__raw_writel(0x10000000, K2_PCI64_BAR + PMBAR); /* PCI Mem base */
__raw_writel(0xf0000000, K2_PCI64_BAR + MSIZE); /* 256MB */
__raw_writel(0xfff00000, K2_PCI64_BAR + IOSIZE); /* 1MB */
__raw_writel(0xd0000000, K2_PCI64_BAR + SMBAR); /* Base@0xd0000000 */
__raw_writel(0x80100000, K2_PCI64_BAR + SIBAR); /* Base@0x80100000 */
__raw_writel(0x000000c0, K2_PCI64_BAR + PSSIZE); /* 1GB space */
__raw_writel(0x000000c0, K2_PCI64_BAR + PPSIZE); /* 1GB space */
__raw_writel(0x00000000, K2_PCI64_BAR + BARPS); /* Base@0x00000000 */
__raw_writel(0x00000000, K2_PCI64_BAR + BARPP); /* Base@0x00000000 */
/* Setup PCI32 hose */
hose_a = pcibios_alloc_controller();
if (!hose_a)
return;
hose_a->first_busno = 0;
hose_a->last_busno = 0xff;
hose_a->pci_mem_offset = K2_PCI32_MEM_BASE;
pci_init_resource(&hose_a->io_resource,
K2_PCI32_LOWER_IO,
K2_PCI32_UPPER_IO,
IORESOURCE_IO, "PCI32 host bridge");
pci_init_resource(&hose_a->mem_resources[0],
K2_PCI32_LOWER_MEM + K2_PCI32_MEM_BASE,
K2_PCI32_UPPER_MEM + K2_PCI32_MEM_BASE,
IORESOURCE_MEM, "PCI32 host bridge");
hose_a->io_space.start = K2_PCI32_LOWER_IO;
hose_a->io_space.end = K2_PCI32_UPPER_IO;
hose_a->mem_space.start = K2_PCI32_LOWER_MEM;
hose_a->mem_space.end = K2_PCI32_UPPER_MEM;
hose_a->io_base_virt = (void *)K2_ISA_IO_BASE;
setup_indirect_pci(hose_a, K2_PCI32_CONFIG_ADDR, K2_PCI32_CONFIG_DATA);
/* Initialize PCI32 bus registers */
early_write_config_byte(hose_a,
hose_a->first_busno,
PCI_DEVFN(0, 0),
CPC710_BUS_NUMBER, hose_a->first_busno);
early_write_config_byte(hose_a,
hose_a->first_busno,
PCI_DEVFN(0, 0),
CPC710_SUB_BUS_NUMBER, hose_a->last_busno);
/* Enable PCI interrupt polling */
early_write_config_byte(hose_a,
hose_a->first_busno,
PCI_DEVFN(8, 0), 0x45, 0x80);
/* Route polled PCI interrupts */
early_write_config_byte(hose_a,
hose_a->first_busno,
PCI_DEVFN(8, 0), 0x48, 0x58);
early_write_config_byte(hose_a,
hose_a->first_busno,
PCI_DEVFN(8, 0), 0x49, 0x07);
early_write_config_byte(hose_a,
hose_a->first_busno,
PCI_DEVFN(8, 0), 0x4a, 0x31);
early_write_config_byte(hose_a,
hose_a->first_busno,
PCI_DEVFN(8, 0), 0x4b, 0xb9);
/* route secondary IDE channel interrupt to IRQ 15 */
early_write_config_byte(hose_a,
hose_a->first_busno,
PCI_DEVFN(8, 0), 0x75, 0x0f);
/* enable IDE controller IDSEL */
early_write_config_byte(hose_a,
hose_a->first_busno,
PCI_DEVFN(8, 0), 0x58, 0x48);
/* Enable IDE function */
early_write_config_byte(hose_a,
hose_a->first_busno,
PCI_DEVFN(17, 0), 0x50, 0x03);
/* Set M5229 IDE controller to native mode */
early_write_config_byte(hose_a,
hose_a->first_busno,
PCI_DEVFN(17, 0), PCI_CLASS_PROG, 0xdf);
hose_a->last_busno = pciauto_bus_scan(hose_a, hose_a->first_busno);
/* Write out correct max subordinate bus number for hose A */
early_write_config_byte(hose_a,
hose_a->first_busno,
PCI_DEVFN(0, 0),
CPC710_SUB_BUS_NUMBER, hose_a->last_busno);
/* Only setup PCI64 hose if we are in the system slot */
if (!(readb(K2_MISC_REG) & K2_SYS_SLOT_MASK)) {
/* Setup PCI64 hose */
hose_b = pcibios_alloc_controller();
if (!hose_b)
return;
hose_b->first_busno = hose_a->last_busno + 1;
hose_b->last_busno = 0xff;
/* Reminder: quit changing the following, it is correct. */
hose_b->pci_mem_offset = K2_PCI32_MEM_BASE;
pci_init_resource(&hose_b->io_resource,
K2_PCI64_LOWER_IO,
K2_PCI64_UPPER_IO,
IORESOURCE_IO, "PCI64 host bridge");
pci_init_resource(&hose_b->mem_resources[0],
K2_PCI64_LOWER_MEM + K2_PCI32_MEM_BASE,
K2_PCI64_UPPER_MEM + K2_PCI32_MEM_BASE,
IORESOURCE_MEM, "PCI64 host bridge");
hose_b->io_space.start = K2_PCI64_LOWER_IO;
hose_b->io_space.end = K2_PCI64_UPPER_IO;
hose_b->mem_space.start = K2_PCI64_LOWER_MEM;
hose_b->mem_space.end = K2_PCI64_UPPER_MEM;
hose_b->io_base_virt = (void *)K2_ISA_IO_BASE;
setup_indirect_pci(hose_b,
K2_PCI64_CONFIG_ADDR, K2_PCI64_CONFIG_DATA);
/* Initialize PCI64 bus registers */
early_write_config_byte(hose_b,
0,
PCI_DEVFN(0, 0),
CPC710_SUB_BUS_NUMBER, 0xff);
early_write_config_byte(hose_b,
0,
PCI_DEVFN(0, 0),
CPC710_BUS_NUMBER, hose_b->first_busno);
hose_b->last_busno = pciauto_bus_scan(hose_b,
hose_b->first_busno);
/* Write out correct max subordinate bus number for hose B */
early_write_config_byte(hose_b,
hose_b->first_busno,
PCI_DEVFN(0, 0),
CPC710_SUB_BUS_NUMBER,
hose_b->last_busno);
/* Configure PCI64 PSBAR */
early_write_config_dword(hose_b,
hose_b->first_busno,
PCI_DEVFN(0, 0),
PCI_BASE_ADDRESS_0,
K2_PCI64_SYS_MEM_BASE);
}
/* Configure i8259 level/edge settings */
outb(0x62, 0x4d0);
outb(0xde, 0x4d1);
#ifdef CONFIG_CPC710_DATA_GATHERING
{
unsigned int tmp;
tmp = __raw_readl(ABCNTL);
/* Enable data gathering on both PCI interfaces */
__raw_writel(tmp | 0x05000000, ABCNTL);
}
#endif
ppc_md.pcibios_fixup = k2_pcibios_fixup;
ppc_md.pcibios_fixup_resources = k2_pcibios_fixup_resources;
ppc_md.pci_swizzle = common_swizzle;
ppc_md.pci_map_irq = k2_map_irq;
}
static int k2_get_bus_speed(void)
{
int bus_speed;
unsigned char board_id;
board_id = *(unsigned char *)K2_BOARD_ID_REG;
switch (K2_BUS_SPD(board_id)) {
case 0:
default:
bus_speed = 100000000;
break;
case 1:
bus_speed = 83333333;
break;
case 2:
bus_speed = 75000000;
break;
case 3:
bus_speed = 66666666;
break;
}
return bus_speed;
}
static int k2_get_cpu_speed(void)
{
unsigned long hid1;
int cpu_speed;
hid1 = mfspr(SPRN_HID1) >> 28;
if ((mfspr(SPRN_PVR) >> 16) == 8)
hid1 = cpu_7xx[hid1];
else
hid1 = cpu_6xx[hid1];
cpu_speed = k2_get_bus_speed() * hid1 / 2;
return cpu_speed;
}
static void __init k2_calibrate_decr(void)
{
int freq, divisor = 4;
/* determine processor bus speed */
freq = k2_get_bus_speed();
tb_ticks_per_jiffy = freq / HZ / divisor;
tb_to_us = mulhwu_scale_factor(freq / divisor, 1000000);
}
static int k2_show_cpuinfo(struct seq_file *m)
{
unsigned char k2_geo_bits, k2_system_slot;
seq_printf(m, "vendor\t\t: SBS\n");
seq_printf(m, "machine\t\t: K2\n");
seq_printf(m, "cpu speed\t: %dMhz\n", k2_get_cpu_speed() / 1000000);
seq_printf(m, "bus speed\t: %dMhz\n", k2_get_bus_speed() / 1000000);
seq_printf(m, "memory type\t: SDRAM\n");
k2_geo_bits = readb(K2_MSIZ_GEO_REG) & K2_GEO_ADR_MASK;
k2_system_slot = !(readb(K2_MISC_REG) & K2_SYS_SLOT_MASK);
seq_printf(m, "backplane\t: %s slot board",
k2_system_slot ? "System" : "Non system");
seq_printf(m, "with geographical address %x\n", k2_geo_bits);
return 0;
}
TODC_ALLOC();
static void __init k2_setup_arch(void)
{
unsigned int cpu;
/* Setup TODC access */
TODC_INIT(TODC_TYPE_MK48T37, 0, 0,
ioremap(K2_RTC_BASE_ADDRESS, K2_RTC_SIZE), 8);
/* init to some ~sane value until calibrate_delay() runs */
loops_per_jiffy = 50000000 / HZ;
/* make FLASH transactions higher priority than PCI to avoid deadlock */
__raw_writel(__raw_readl(SIOC1) | 0x80000000, SIOC1);
/* Set hardware to access FLASH page 2 */
__raw_writel(1 << 29, GPOUT);
/* Setup PCI host bridges */
k2_setup_hoses();
#ifdef CONFIG_BLK_DEV_INITRD
if (initrd_start)
ROOT_DEV = Root_RAM0;
else
#endif
#ifdef CONFIG_ROOT_NFS
ROOT_DEV = Root_NFS;
#else
ROOT_DEV = Root_HDC1;
#endif
/* Identify the system */
printk(KERN_INFO "System Identification: SBS K2 - PowerPC 750 @ "
"%d Mhz\n", k2_get_cpu_speed() / 1000000);
printk(KERN_INFO "Port by MontaVista Software, Inc. "
"(source@mvista.com)\n");
/* Identify the CPU manufacturer */
cpu = PVR_REV(mfspr(SPRN_PVR));
printk(KERN_INFO "CPU manufacturer: %s [rev=%04x]\n",
(cpu & (1 << 15)) ? "IBM" : "Motorola", cpu);
}
static void k2_restart(char *cmd)
{
local_irq_disable();
/* Flip FLASH back to page 1 to access firmware image */
__raw_writel(0, GPOUT);
/* SRR0 has system reset vector, SRR1 has default MSR value */
/* rfi restores MSR from SRR1 and sets the PC to the SRR0 value */
mtspr(SPRN_SRR0, 0xfff00100);
mtspr(SPRN_SRR1, 0);
__asm__ __volatile__("rfi\n\t");
/* not reached */
for (;;) ;
}
static void k2_power_off(void)
{
for (;;) ;
}
static void k2_halt(void)
{
k2_restart(NULL);
}
/*
* Set BAT 3 to map PCI32 I/O space.
*/
static __inline__ void k2_set_bat(void)
{
/* wait for all outstanding memory accesses to complete */
mb();
/* setup DBATs */
mtspr(SPRN_DBAT2U, 0x80001ffe);
mtspr(SPRN_DBAT2L, 0x8000002a);
mtspr(SPRN_DBAT3U, 0xf0001ffe);
mtspr(SPRN_DBAT3L, 0xf000002a);
/* wait for updates */
mb();
}
static unsigned long __init k2_find_end_of_memory(void)
{
unsigned long total;
unsigned char msize = 7; /* Default to 128MB */
msize = K2_MEM_SIZE(readb(K2_MSIZ_GEO_REG));
switch (msize) {
case 2:
/*
* This will break without a lowered
* KERNELBASE or CONFIG_HIGHMEM on.
* It seems non 1GB builds exist yet,
* though.
*/
total = K2_MEM_SIZE_1GB;
break;
case 3:
case 4:
total = K2_MEM_SIZE_512MB;
break;
case 5:
case 6:
total = K2_MEM_SIZE_256MB;
break;
case 7:
total = K2_MEM_SIZE_128MB;
break;
default:
printk
("K2: Invalid memory size detected, defaulting to 128MB\n");
total = K2_MEM_SIZE_128MB;
break;
}
return total;
}
static void __init k2_map_io(void)
{
io_block_mapping(K2_PCI32_IO_BASE,
K2_PCI32_IO_BASE, 0x00200000, _PAGE_IO);
io_block_mapping(0xff000000, 0xff000000, 0x01000000, _PAGE_IO);
}
static void __init k2_init_irq(void)
{
int i;
for (i = 0; i < 16; i++)
irq_desc[i].handler = &i8259_pic;
i8259_init(0);
}
void __init platform_init(unsigned long r3, unsigned long r4,
unsigned long r5, unsigned long r6, unsigned long r7)
{
parse_bootinfo((struct bi_record *)(r3 + KERNELBASE));
k2_set_bat();
isa_io_base = K2_ISA_IO_BASE;
isa_mem_base = K2_ISA_MEM_BASE;
pci_dram_offset = K2_PCI32_SYS_MEM_BASE;
ppc_md.setup_arch = k2_setup_arch;
ppc_md.show_cpuinfo = k2_show_cpuinfo;
ppc_md.init_IRQ = k2_init_irq;
ppc_md.get_irq = i8259_irq;
ppc_md.find_end_of_memory = k2_find_end_of_memory;
ppc_md.setup_io_mappings = k2_map_io;
ppc_md.restart = k2_restart;
ppc_md.power_off = k2_power_off;
ppc_md.halt = k2_halt;
ppc_md.time_init = todc_time_init;
ppc_md.set_rtc_time = todc_set_rtc_time;
ppc_md.get_rtc_time = todc_get_rtc_time;
ppc_md.calibrate_decr = k2_calibrate_decr;
ppc_md.nvram_read_val = todc_direct_read_val;
ppc_md.nvram_write_val = todc_direct_write_val;
#ifdef CONFIG_SERIAL_TEXT_DEBUG
ppc_md.progress = gen550_progress;
#endif
}

View File

@ -1,82 +0,0 @@
/*
* arch/ppc/platforms/k2.h
*
* Definitions for SBS K2 board support
*
* Author: Matt Porter <mporter@mvista.com>
*
* 2001 (c) MontaVista, Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*/
#ifndef __PPC_PLATFORMS_K2_H
#define __PPC_PLATFORMS_K2_H
/*
* SBS K2 definitions
*/
#define K2_PCI64_BAR 0xff400000
#define K2_PCI32_BAR 0xff500000
#define K2_PCI64_CONFIG_ADDR (K2_PCI64_BAR + 0x000f8000)
#define K2_PCI64_CONFIG_DATA (K2_PCI64_BAR + 0x000f8010)
#define K2_PCI32_CONFIG_ADDR (K2_PCI32_BAR + 0x000f8000)
#define K2_PCI32_CONFIG_DATA (K2_PCI32_BAR + 0x000f8010)
#define K2_PCI64_MEM_BASE 0xd0000000
#define K2_PCI64_IO_BASE 0x80100000
#define K2_PCI32_MEM_BASE 0xc0000000
#define K2_PCI32_IO_BASE 0x80000000
#define K2_PCI32_SYS_MEM_BASE 0x80000000
#define K2_PCI64_SYS_MEM_BASE K2_PCI32_SYS_MEM_BASE
#define K2_PCI32_LOWER_MEM 0x00000000
#define K2_PCI32_UPPER_MEM 0x0fffffff
#define K2_PCI32_LOWER_IO 0x00000000
#define K2_PCI32_UPPER_IO 0x000fffff
#define K2_PCI64_LOWER_MEM 0x10000000
#define K2_PCI64_UPPER_MEM 0x1fffffff
#define K2_PCI64_LOWER_IO 0x00100000
#define K2_PCI64_UPPER_IO 0x001fffff
#define K2_ISA_IO_BASE K2_PCI32_IO_BASE
#define K2_ISA_MEM_BASE K2_PCI32_MEM_BASE
#define K2_BOARD_ID_REG (K2_ISA_IO_BASE + 0x800)
#define K2_MISC_REG (K2_ISA_IO_BASE + 0x804)
#define K2_MSIZ_GEO_REG (K2_ISA_IO_BASE + 0x808)
#define K2_HOT_SWAP_REG (K2_ISA_IO_BASE + 0x80c)
#define K2_PLD2_REG (K2_ISA_IO_BASE + 0x80e)
#define K2_PLD3_REG (K2_ISA_IO_BASE + 0x80f)
#define K2_BUS_SPD(board_id) (board_id >> 2) & 3
#define K2_RTC_BASE_OFFSET 0x90000
#define K2_RTC_BASE_ADDRESS (K2_PCI32_MEM_BASE + K2_RTC_BASE_OFFSET)
#define K2_RTC_SIZE 0x8000
#define K2_MEM_SIZE_MASK 0xe0
#define K2_MEM_SIZE(size_reg) (size_reg & K2_MEM_SIZE_MASK) >> 5
#define K2_MEM_SIZE_1GB 0x40000000
#define K2_MEM_SIZE_512MB 0x20000000
#define K2_MEM_SIZE_256MB 0x10000000
#define K2_MEM_SIZE_128MB 0x08000000
#define K2_L2CACHE_MASK 0x03 /* Mask for 2 L2 Cache bits */
#define K2_L2CACHE_512KB 0x00 /* 512KB */
#define K2_L2CACHE_256KB 0x01 /* 256KB */
#define K2_L2CACHE_1MB 0x02 /* 1MB */
#define K2_L2CACHE_NONE 0x03 /* None */
#define K2_GEO_ADR_MASK 0x1f
#define K2_SYS_SLOT_MASK 0x08
#endif /* __PPC_PLATFORMS_K2_H */

View File

@ -50,8 +50,6 @@ obj-$(CONFIG_EV64260) += todc_time.o pci_auto.o
obj-$(CONFIG_CHESTNUT) += mv64360_pic.o pci_auto.o obj-$(CONFIG_CHESTNUT) += mv64360_pic.o pci_auto.o
obj-$(CONFIG_GEMINI) += open_pic.o indirect_pci.o obj-$(CONFIG_GEMINI) += open_pic.o indirect_pci.o
obj-$(CONFIG_GT64260) += gt64260_pic.o obj-$(CONFIG_GT64260) += gt64260_pic.o
obj-$(CONFIG_K2) += i8259.o indirect_pci.o todc_time.o \
pci_auto.o
obj-$(CONFIG_LOPEC) += i8259.o pci_auto.o todc_time.o obj-$(CONFIG_LOPEC) += i8259.o pci_auto.o todc_time.o
obj-$(CONFIG_HDPU) += pci_auto.o obj-$(CONFIG_HDPU) += pci_auto.o
obj-$(CONFIG_LUAN) += indirect_pci.o pci_auto.o todc_time.o obj-$(CONFIG_LUAN) += indirect_pci.o pci_auto.o todc_time.o