soc: ti: pruss: support CORECLK_MUX and IEPCLK_MUX
The IEPCLK_MUX is present on all SoCs whereas the CORECLK_MUX is present only on AM65x SoCs and J721E. Add support for both these CLK muxes. This allows the clock rates and clock parents for these to be controlled through DT leveraging the clk infrastructure for configuring the default parents and rates. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
This commit is contained in:
Grzegorz Jaszczyk
Santosh Shilimkar
parent
25bafac940
commit
ba59c9b43c
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@ -8,6 +8,7 @@
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* Andrew F. Davis <afd@ti.com>
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*/
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#include <linux/clk-provider.h>
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#include <linux/dma-mapping.h>
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#include <linux/io.h>
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#include <linux/mfd/syscon.h>
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@ -16,13 +17,150 @@
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#include <linux/of_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/pruss_driver.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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/**
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* struct pruss_private_data - PRUSS driver private data
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* @has_no_sharedram: flag to indicate the absence of PRUSS Shared Data RAM
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* @has_core_mux_clock: flag to indicate the presence of PRUSS core clock
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*/
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struct pruss_private_data {
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bool has_no_sharedram;
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bool has_core_mux_clock;
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};
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static void pruss_of_free_clk_provider(void *data)
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{
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struct device_node *clk_mux_np = data;
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of_clk_del_provider(clk_mux_np);
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of_node_put(clk_mux_np);
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}
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static int pruss_clk_mux_setup(struct pruss *pruss, struct clk *clk_mux,
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char *mux_name, struct device_node *clks_np)
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{
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struct device_node *clk_mux_np;
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struct device *dev = pruss->dev;
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char *clk_mux_name;
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unsigned int num_parents;
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const char **parent_names;
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void __iomem *reg;
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u32 reg_offset;
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int ret;
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clk_mux_np = of_get_child_by_name(clks_np, mux_name);
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if (!clk_mux_np) {
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dev_err(dev, "%pOF is missing its '%s' node\n", clks_np,
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mux_name);
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return -ENODEV;
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}
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num_parents = of_clk_get_parent_count(clk_mux_np);
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if (num_parents < 1) {
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dev_err(dev, "mux-clock %pOF must have parents\n", clk_mux_np);
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ret = -EINVAL;
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goto put_clk_mux_np;
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}
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parent_names = devm_kcalloc(dev, sizeof(*parent_names), num_parents,
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GFP_KERNEL);
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if (!parent_names) {
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ret = -ENOMEM;
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goto put_clk_mux_np;
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}
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of_clk_parent_fill(clk_mux_np, parent_names, num_parents);
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clk_mux_name = devm_kasprintf(dev, GFP_KERNEL, "%s.%pOFn",
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dev_name(dev), clk_mux_np);
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if (!clk_mux_name) {
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ret = -ENOMEM;
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goto put_clk_mux_np;
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}
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ret = of_property_read_u32(clk_mux_np, "reg", ®_offset);
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if (ret)
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goto put_clk_mux_np;
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reg = pruss->cfg_base + reg_offset;
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clk_mux = clk_register_mux(NULL, clk_mux_name, parent_names,
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num_parents, 0, reg, 0, 1, 0, NULL);
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if (IS_ERR(clk_mux)) {
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ret = PTR_ERR(clk_mux);
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goto put_clk_mux_np;
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}
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ret = devm_add_action_or_reset(dev, (void(*)(void *))clk_unregister_mux,
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clk_mux);
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if (ret) {
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dev_err(dev, "failed to add clkmux unregister action %d", ret);
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goto put_clk_mux_np;
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}
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ret = of_clk_add_provider(clk_mux_np, of_clk_src_simple_get, clk_mux);
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if (ret)
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goto put_clk_mux_np;
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ret = devm_add_action_or_reset(dev, pruss_of_free_clk_provider,
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clk_mux_np);
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if (ret) {
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dev_err(dev, "failed to add clkmux free action %d", ret);
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goto put_clk_mux_np;
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}
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return 0;
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put_clk_mux_np:
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of_node_put(clk_mux_np);
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return ret;
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}
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static int pruss_clk_init(struct pruss *pruss, struct device_node *cfg_node)
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{
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const struct pruss_private_data *data;
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struct device_node *clks_np;
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struct device *dev = pruss->dev;
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int ret = 0;
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data = of_device_get_match_data(dev);
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if (IS_ERR(data))
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return -ENODEV;
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clks_np = of_get_child_by_name(cfg_node, "clocks");
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if (!clks_np) {
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dev_err(dev, "%pOF is missing its 'clocks' node\n", clks_np);
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return -ENODEV;
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}
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if (data && data->has_core_mux_clock) {
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ret = pruss_clk_mux_setup(pruss, pruss->core_clk_mux,
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"coreclk-mux", clks_np);
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if (ret) {
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dev_err(dev, "failed to setup coreclk-mux\n");
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goto put_clks_node;
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}
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}
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ret = pruss_clk_mux_setup(pruss, pruss->iep_clk_mux, "iepclk-mux",
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clks_np);
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if (ret) {
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dev_err(dev, "failed to setup iepclk-mux\n");
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goto put_clks_node;
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}
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put_clks_node:
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of_node_put(clks_np);
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return ret;
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}
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static struct regmap_config regmap_conf = {
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.reg_bits = 32,
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.val_bits = 32,
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.reg_stride = 4,
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};
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static int pruss_probe(struct platform_device *pdev)
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@ -114,21 +252,49 @@ static int pruss_probe(struct platform_device *pdev)
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goto rpm_put;
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}
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pruss->cfg_regmap = syscon_node_to_regmap(child);
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of_node_put(child);
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if (of_address_to_resource(child, 0, &res)) {
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ret = -ENOMEM;
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goto node_put;
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}
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pruss->cfg_base = devm_ioremap(dev, res.start, resource_size(&res));
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if (!pruss->cfg_base) {
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ret = -ENOMEM;
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goto node_put;
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}
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regmap_conf.name = kasprintf(GFP_KERNEL, "%pOFn@%llx", child,
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(u64)res.start);
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regmap_conf.max_register = resource_size(&res) - 4;
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pruss->cfg_regmap = devm_regmap_init_mmio(dev, pruss->cfg_base,
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®map_conf);
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kfree(regmap_conf.name);
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if (IS_ERR(pruss->cfg_regmap)) {
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ret = -ENODEV;
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goto rpm_put;
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dev_err(dev, "regmap_init_mmio failed for cfg, ret = %ld\n",
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PTR_ERR(pruss->cfg_regmap));
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ret = PTR_ERR(pruss->cfg_regmap);
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goto node_put;
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}
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ret = pruss_clk_init(pruss, child);
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if (ret) {
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dev_err(dev, "failed to setup coreclk-mux\n");
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goto node_put;
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}
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ret = devm_of_platform_populate(dev);
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if (ret) {
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dev_err(dev, "failed to register child devices\n");
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goto rpm_put;
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goto node_put;
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}
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of_node_put(child);
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return 0;
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node_put:
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of_node_put(child);
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rpm_put:
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pm_runtime_put_sync(dev);
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rpm_disable:
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@ -157,14 +323,18 @@ static const struct pruss_private_data am437x_pruss0_data = {
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.has_no_sharedram = true,
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};
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static const struct pruss_private_data am65x_j721e_pruss_data = {
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.has_core_mux_clock = true,
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};
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static const struct of_device_id pruss_of_match[] = {
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{ .compatible = "ti,am3356-pruss" },
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{ .compatible = "ti,am4376-pruss0", .data = &am437x_pruss0_data, },
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{ .compatible = "ti,am4376-pruss1", .data = &am437x_pruss1_data, },
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{ .compatible = "ti,am5728-pruss" },
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{ .compatible = "ti,k2g-pruss" },
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{ .compatible = "ti,am654-icssg" },
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{ .compatible = "ti,j721e-icssg" },
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{ .compatible = "ti,am654-icssg", .data = &am65x_j721e_pruss_data, },
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{ .compatible = "ti,j721e-icssg", .data = &am65x_j721e_pruss_data, },
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{},
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};
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MODULE_DEVICE_TABLE(of, pruss_of_match);
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@ -36,13 +36,19 @@ struct pruss_mem_region {
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/**
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* struct pruss - PRUSS parent structure
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* @dev: pruss device pointer
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* @cfg_base: base iomap for CFG region
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* @cfg_regmap: regmap for config region
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* @mem_regions: data for each of the PRUSS memory regions
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* @core_clk_mux: clk handle for PRUSS CORE_CLK_MUX
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* @iep_clk_mux: clk handle for PRUSS IEP_CLK_MUX
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*/
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struct pruss {
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struct device *dev;
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void __iomem *cfg_base;
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struct regmap *cfg_regmap;
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struct pruss_mem_region mem_regions[PRUSS_MEM_MAX];
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struct clk *core_clk_mux;
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struct clk *iep_clk_mux;
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};
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#endif /* _PRUSS_DRIVER_H_ */
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