cpumask: use modern cpumask style in drivers/edac/amd64_edac.c
cpumask_t -> struct cpumask, and don't put one on the stack. (Note: this is actually on the stack unless CONFIG_CPUMASK_OFFSTACK=y). Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
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@ -2631,7 +2631,7 @@ static int amd64_init_csrows(struct mem_ctl_info *mci)
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static void amd64_enable_ecc_error_reporting(struct mem_ctl_info *mci)
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{
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struct amd64_pvt *pvt = mci->pvt_info;
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const cpumask_t *cpumask = cpumask_of_node(pvt->mc_node_id);
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const struct cpumask *cpumask = cpumask_of_node(pvt->mc_node_id);
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int cpu, idx = 0, err = 0;
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struct msr msrs[cpumask_weight(cpumask)];
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u32 value;
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@ -2707,7 +2707,7 @@ static void amd64_enable_ecc_error_reporting(struct mem_ctl_info *mci)
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static void amd64_restore_ecc_error_reporting(struct amd64_pvt *pvt)
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{
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const cpumask_t *cpumask = cpumask_of_node(pvt->mc_node_id);
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const struct cpumask *cpumask = cpumask_of_node(pvt->mc_node_id);
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int cpu, idx = 0, err = 0;
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struct msr msrs[cpumask_weight(cpumask)];
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u32 value;
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@ -2740,7 +2740,7 @@ static void amd64_restore_ecc_error_reporting(struct amd64_pvt *pvt)
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}
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/* get all cores on this DCT */
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static void get_cpus_on_this_dct_cpumask(cpumask_t *mask, int nid)
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static void get_cpus_on_this_dct_cpumask(struct cpumask *mask, int nid)
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{
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int cpu;
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@ -2752,25 +2752,30 @@ static void get_cpus_on_this_dct_cpumask(cpumask_t *mask, int nid)
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/* check MCG_CTL on all the cpus on this node */
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static bool amd64_nb_mce_bank_enabled_on_node(int nid)
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{
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cpumask_t mask;
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cpumask_var_t mask;
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struct msr *msrs;
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int cpu, nbe, idx = 0;
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bool ret = false;
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cpumask_clear(&mask);
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if (!zalloc_cpumask_var(&mask, GFP_KERNEL)) {
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amd64_printk(KERN_WARNING, "%s: error allocating mask\n",
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__func__);
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return false;
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}
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get_cpus_on_this_dct_cpumask(&mask, nid);
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get_cpus_on_this_dct_cpumask(mask, nid);
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msrs = kzalloc(sizeof(struct msr) * cpumask_weight(&mask), GFP_KERNEL);
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msrs = kzalloc(sizeof(struct msr) * cpumask_weight(mask), GFP_KERNEL);
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if (!msrs) {
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amd64_printk(KERN_WARNING, "%s: error allocating msrs\n",
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__func__);
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free_cpumask_var(mask);
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return false;
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}
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rdmsr_on_cpus(&mask, MSR_IA32_MCG_CTL, msrs);
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rdmsr_on_cpus(mask, MSR_IA32_MCG_CTL, msrs);
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for_each_cpu(cpu, &mask) {
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for_each_cpu(cpu, mask) {
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nbe = msrs[idx].l & K8_MSR_MCGCTL_NBE;
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debugf0("core: %u, MCG_CTL: 0x%llx, NB MSR is %s\n",
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@ -2786,6 +2791,7 @@ static bool amd64_nb_mce_bank_enabled_on_node(int nid)
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out:
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kfree(msrs);
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free_cpumask_var(mask);
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return ret;
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}
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