Merge branches 'atags', 'cache-l2x0', 'clkdev', 'fixes', 'integrator', 'misc', 'opcodes' and 'syscall' into for-linus
This commit is contained in:
Russell King
commit
ba4a63f89c
|
|
@ -210,3 +210,15 @@ Users:
|
|||
firmware assigned instance number of the PCI
|
||||
device that can help in understanding the firmware
|
||||
intended order of the PCI device.
|
||||
|
||||
What: /sys/bus/pci/devices/.../d3cold_allowed
|
||||
Date: July 2012
|
||||
Contact: Huang Ying <ying.huang@intel.com>
|
||||
Description:
|
||||
d3cold_allowed is bit to control whether the corresponding PCI
|
||||
device can be put into D3Cold state. If it is cleared, the
|
||||
device will never be put into D3Cold state. If it is set, the
|
||||
device may be put into D3Cold state if other requirements are
|
||||
satisfied too. Reading this attribute will show the current
|
||||
value of d3cold_allowed bit. Writing this attribute will set
|
||||
the value of d3cold_allowed bit.
|
||||
|
|
|
|||
|
|
@ -5,4 +5,15 @@ Contact: "Ike Panhc <ike.pan@canonical.com>"
|
|||
Description:
|
||||
Control the power of camera module. 1 means on, 0 means off.
|
||||
|
||||
What: /sys/devices/platform/ideapad/fan_mode
|
||||
Date: June 2012
|
||||
KernelVersion: 3.6
|
||||
Contact: "Maxim Mikityanskiy <maxtram95@gmail.com>"
|
||||
Description:
|
||||
Change fan mode
|
||||
There are four available modes:
|
||||
* 0 -> Super Silent Mode
|
||||
* 1 -> Standard Mode
|
||||
* 2 -> Dust Cleaning
|
||||
* 4 -> Efficient Thermal Dissipation Mode
|
||||
|
||||
|
|
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|||
|
|
@ -224,8 +224,8 @@ all your transactions.
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|||
</para>
|
||||
|
||||
<para>
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||||
Then at umount time , in your put_super() (2.4) or write_super() (2.5)
|
||||
you can then call journal_destroy() to clean up your in-core journal object.
|
||||
Then at umount time , in your put_super() you can then call journal_destroy()
|
||||
to clean up your in-core journal object.
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</para>
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||||
|
||||
<para>
|
||||
|
|
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|||
|
|
@ -125,7 +125,7 @@ the structure refers to a radio tuner the
|
|||
<constant>V4L2_TUNER_CAP_NORM</constant> flags can't be used.</para>
|
||||
<para>If multiple frequency bands are supported, then
|
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<structfield>capability</structfield> is the union of all
|
||||
<structfield>capability></structfield> fields of each &v4l2-frequency-band;.
|
||||
<structfield>capability</structfield> fields of each &v4l2-frequency-band;.
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||||
</para></entry>
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</row>
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<row>
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|
|
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|
|
@ -3,15 +3,21 @@
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|||
biodoc.txt
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||||
- Notes on the Generic Block Layer Rewrite in Linux 2.5
|
||||
capability.txt
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- Generic Block Device Capability (/sys/block/<disk>/capability)
|
||||
- Generic Block Device Capability (/sys/block/<device>/capability)
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cfq-iosched.txt
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||||
- CFQ IO scheduler tunables
|
||||
data-integrity.txt
|
||||
- Block data integrity
|
||||
deadline-iosched.txt
|
||||
- Deadline IO scheduler tunables
|
||||
ioprio.txt
|
||||
- Block io priorities (in CFQ scheduler)
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||||
queue-sysfs.txt
|
||||
- Queue's sysfs entries
|
||||
request.txt
|
||||
- The members of struct request (in include/linux/blkdev.h)
|
||||
stat.txt
|
||||
- Block layer statistics in /sys/block/<dev>/stat
|
||||
- Block layer statistics in /sys/block/<device>/stat
|
||||
switching-sched.txt
|
||||
- Switching I/O schedulers at runtime
|
||||
writeback_cache_control.txt
|
||||
|
|
|
|||
|
|
@ -1,3 +1,14 @@
|
|||
CFQ (Complete Fairness Queueing)
|
||||
===============================
|
||||
|
||||
The main aim of CFQ scheduler is to provide a fair allocation of the disk
|
||||
I/O bandwidth for all the processes which requests an I/O operation.
|
||||
|
||||
CFQ maintains the per process queue for the processes which request I/O
|
||||
operation(syncronous requests). In case of asynchronous requests, all the
|
||||
requests from all the processes are batched together according to their
|
||||
process's I/O priority.
|
||||
|
||||
CFQ ioscheduler tunables
|
||||
========================
|
||||
|
||||
|
|
@ -25,6 +36,72 @@ there are multiple spindles behind single LUN (Host based hardware RAID
|
|||
controller or for storage arrays), setting slice_idle=0 might end up in better
|
||||
throughput and acceptable latencies.
|
||||
|
||||
back_seek_max
|
||||
-------------
|
||||
This specifies, given in Kbytes, the maximum "distance" for backward seeking.
|
||||
The distance is the amount of space from the current head location to the
|
||||
sectors that are backward in terms of distance.
|
||||
|
||||
This parameter allows the scheduler to anticipate requests in the "backward"
|
||||
direction and consider them as being the "next" if they are within this
|
||||
distance from the current head location.
|
||||
|
||||
back_seek_penalty
|
||||
-----------------
|
||||
This parameter is used to compute the cost of backward seeking. If the
|
||||
backward distance of request is just 1/back_seek_penalty from a "front"
|
||||
request, then the seeking cost of two requests is considered equivalent.
|
||||
|
||||
So scheduler will not bias toward one or the other request (otherwise scheduler
|
||||
will bias toward front request). Default value of back_seek_penalty is 2.
|
||||
|
||||
fifo_expire_async
|
||||
-----------------
|
||||
This parameter is used to set the timeout of asynchronous requests. Default
|
||||
value of this is 248ms.
|
||||
|
||||
fifo_expire_sync
|
||||
----------------
|
||||
This parameter is used to set the timeout of synchronous requests. Default
|
||||
value of this is 124ms. In case to favor synchronous requests over asynchronous
|
||||
one, this value should be decreased relative to fifo_expire_async.
|
||||
|
||||
slice_async
|
||||
-----------
|
||||
This parameter is same as of slice_sync but for asynchronous queue. The
|
||||
default value is 40ms.
|
||||
|
||||
slice_async_rq
|
||||
--------------
|
||||
This parameter is used to limit the dispatching of asynchronous request to
|
||||
device request queue in queue's slice time. The maximum number of request that
|
||||
are allowed to be dispatched also depends upon the io priority. Default value
|
||||
for this is 2.
|
||||
|
||||
slice_sync
|
||||
----------
|
||||
When a queue is selected for execution, the queues IO requests are only
|
||||
executed for a certain amount of time(time_slice) before switching to another
|
||||
queue. This parameter is used to calculate the time slice of synchronous
|
||||
queue.
|
||||
|
||||
time_slice is computed using the below equation:-
|
||||
time_slice = slice_sync + (slice_sync/5 * (4 - prio)). To increase the
|
||||
time_slice of synchronous queue, increase the value of slice_sync. Default
|
||||
value is 100ms.
|
||||
|
||||
quantum
|
||||
-------
|
||||
This specifies the number of request dispatched to the device queue. In a
|
||||
queue's time slice, a request will not be dispatched if the number of request
|
||||
in the device exceeds this parameter. This parameter is used for synchronous
|
||||
request.
|
||||
|
||||
In case of storage with several disk, this setting can limit the parallel
|
||||
processing of request. Therefore, increasing the value can imporve the
|
||||
performace although this can cause the latency of some I/O to increase due
|
||||
to more number of requests.
|
||||
|
||||
CFQ IOPS Mode for group scheduling
|
||||
===================================
|
||||
Basic CFQ design is to provide priority based time slices. Higher priority
|
||||
|
|
|
|||
|
|
@ -9,20 +9,71 @@ These files are the ones found in the /sys/block/xxx/queue/ directory.
|
|||
Files denoted with a RO postfix are readonly and the RW postfix means
|
||||
read-write.
|
||||
|
||||
add_random (RW)
|
||||
----------------
|
||||
This file allows to trun off the disk entropy contribution. Default
|
||||
value of this file is '1'(on).
|
||||
|
||||
discard_granularity (RO)
|
||||
-----------------------
|
||||
This shows the size of internal allocation of the device in bytes, if
|
||||
reported by the device. A value of '0' means device does not support
|
||||
the discard functionality.
|
||||
|
||||
discard_max_bytes (RO)
|
||||
----------------------
|
||||
Devices that support discard functionality may have internal limits on
|
||||
the number of bytes that can be trimmed or unmapped in a single operation.
|
||||
The discard_max_bytes parameter is set by the device driver to the maximum
|
||||
number of bytes that can be discarded in a single operation. Discard
|
||||
requests issued to the device must not exceed this limit. A discard_max_bytes
|
||||
value of 0 means that the device does not support discard functionality.
|
||||
|
||||
discard_zeroes_data (RO)
|
||||
------------------------
|
||||
When read, this file will show if the discarded block are zeroed by the
|
||||
device or not. If its value is '1' the blocks are zeroed otherwise not.
|
||||
|
||||
hw_sector_size (RO)
|
||||
-------------------
|
||||
This is the hardware sector size of the device, in bytes.
|
||||
|
||||
iostats (RW)
|
||||
-------------
|
||||
This file is used to control (on/off) the iostats accounting of the
|
||||
disk.
|
||||
|
||||
logical_block_size (RO)
|
||||
-----------------------
|
||||
This is the logcal block size of the device, in bytes.
|
||||
|
||||
max_hw_sectors_kb (RO)
|
||||
----------------------
|
||||
This is the maximum number of kilobytes supported in a single data transfer.
|
||||
|
||||
max_integrity_segments (RO)
|
||||
---------------------------
|
||||
When read, this file shows the max limit of integrity segments as
|
||||
set by block layer which a hardware controller can handle.
|
||||
|
||||
max_sectors_kb (RW)
|
||||
-------------------
|
||||
This is the maximum number of kilobytes that the block layer will allow
|
||||
for a filesystem request. Must be smaller than or equal to the maximum
|
||||
size allowed by the hardware.
|
||||
|
||||
max_segments (RO)
|
||||
-----------------
|
||||
Maximum number of segments of the device.
|
||||
|
||||
max_segment_size (RO)
|
||||
---------------------
|
||||
Maximum segment size of the device.
|
||||
|
||||
minimum_io_size (RO)
|
||||
--------------------
|
||||
This is the smallest preferred io size reported by the device.
|
||||
|
||||
nomerges (RW)
|
||||
-------------
|
||||
This enables the user to disable the lookup logic involved with IO
|
||||
|
|
@ -45,11 +96,24 @@ per-block-cgroup request pool. IOW, if there are N block cgroups,
|
|||
each request queue may have upto N request pools, each independently
|
||||
regulated by nr_requests.
|
||||
|
||||
optimal_io_size (RO)
|
||||
--------------------
|
||||
This is the optimal io size reported by the device.
|
||||
|
||||
physical_block_size (RO)
|
||||
------------------------
|
||||
This is the physical block size of device, in bytes.
|
||||
|
||||
read_ahead_kb (RW)
|
||||
------------------
|
||||
Maximum number of kilobytes to read-ahead for filesystems on this block
|
||||
device.
|
||||
|
||||
rotational (RW)
|
||||
---------------
|
||||
This file is used to stat if the device is of rotational type or
|
||||
non-rotational type.
|
||||
|
||||
rq_affinity (RW)
|
||||
----------------
|
||||
If this option is '1', the block layer will migrate request completions to the
|
||||
|
|
|
|||
|
|
@ -1,3 +1,15 @@
|
|||
ARM Integrator/AP (Application Platform) and Integrator/CP (Compact Platform)
|
||||
-----------------------------------------------------------------------------
|
||||
ARM's oldest Linux-supported platform with connectors for different core
|
||||
tiles of ARMv4, ARMv5 and ARMv6 type.
|
||||
|
||||
Required properties (in root node):
|
||||
compatible = "arm,integrator-ap"; /* Application Platform */
|
||||
compatible = "arm,integrator-cp"; /* Compact Platform */
|
||||
|
||||
FPGA type interrupt controllers, see the versatile-fpga-irq binding doc.
|
||||
|
||||
|
||||
ARM Versatile Application and Platform Baseboards
|
||||
-------------------------------------------------
|
||||
ARM's development hardware platform with connectors for customizable
|
||||
|
|
|
|||
|
|
@ -0,0 +1,31 @@
|
|||
* ARM Versatile FPGA interrupt controller
|
||||
|
||||
One or more FPGA IRQ controllers can be synthesized in an ARM reference board
|
||||
such as the Integrator or Versatile family. The output of these different
|
||||
controllers are OR:ed together and fed to the CPU tile's IRQ input. Each
|
||||
instance can handle up to 32 interrupts.
|
||||
|
||||
Required properties:
|
||||
- compatible: "arm,versatile-fpga-irq"
|
||||
- interrupt-controller: Identifies the node as an interrupt controller
|
||||
- #interrupt-cells: The number of cells to define the interrupts. Must be 1
|
||||
as the FPGA IRQ controller has no configuration options for interrupt
|
||||
sources. The cell is a u32 and defines the interrupt number.
|
||||
- reg: The register bank for the FPGA interrupt controller.
|
||||
- clear-mask: a u32 number representing the mask written to clear all IRQs
|
||||
on the controller at boot for example.
|
||||
- valid-mask: a u32 number representing a bit mask determining which of
|
||||
the interrupts are valid. Unconnected/unused lines are set to 0, and
|
||||
the system till not make it possible for devices to request these
|
||||
interrupts.
|
||||
|
||||
Example:
|
||||
|
||||
pic: pic@14000000 {
|
||||
compatible = "arm,versatile-fpga-irq";
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
reg = <0x14000000 0x100>;
|
||||
clear-mask = <0xffffffff>;
|
||||
valid-mask = <0x003fffff>;
|
||||
};
|
||||
|
|
@ -10,8 +10,8 @@ Required properties:
|
|||
- compatible : Should be "fsl,<chip>-esdhc"
|
||||
|
||||
Optional properties:
|
||||
- fsl,cd-internal : Indicate to use controller internal card detection
|
||||
- fsl,wp-internal : Indicate to use controller internal write protection
|
||||
- fsl,cd-controller : Indicate to use controller internal card detection
|
||||
- fsl,wp-controller : Indicate to use controller internal write protection
|
||||
|
||||
Examples:
|
||||
|
||||
|
|
@ -19,8 +19,8 @@ esdhc@70004000 {
|
|||
compatible = "fsl,imx51-esdhc";
|
||||
reg = <0x70004000 0x4000>;
|
||||
interrupts = <1>;
|
||||
fsl,cd-internal;
|
||||
fsl,wp-internal;
|
||||
fsl,cd-controller;
|
||||
fsl,wp-controller;
|
||||
};
|
||||
|
||||
esdhc@70008000 {
|
||||
|
|
|
|||
|
|
@ -9,9 +9,9 @@ Required properties:
|
|||
- regulators: list of regulators provided by this controller, must have
|
||||
property "regulator-compatible" to match their hardware counterparts:
|
||||
sm[0-2], ldo[0-9] and ldo_rtc
|
||||
- sm0-supply: The input supply for the SM0.
|
||||
- sm1-supply: The input supply for the SM1.
|
||||
- sm2-supply: The input supply for the SM2.
|
||||
- vin-sm0-supply: The input supply for the SM0.
|
||||
- vin-sm1-supply: The input supply for the SM1.
|
||||
- vin-sm2-supply: The input supply for the SM2.
|
||||
- vinldo01-supply: The input supply for the LDO1 and LDO2
|
||||
- vinldo23-supply: The input supply for the LDO2 and LDO3
|
||||
- vinldo4-supply: The input supply for the LDO4
|
||||
|
|
@ -30,9 +30,9 @@ Example:
|
|||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
|
||||
sm0-supply = <&some_reg>;
|
||||
sm1-supply = <&some_reg>;
|
||||
sm2-supply = <&some_reg>;
|
||||
vin-sm0-supply = <&some_reg>;
|
||||
vin-sm1-supply = <&some_reg>;
|
||||
vin-sm2-supply = <&some_reg>;
|
||||
vinldo01-supply = <...>;
|
||||
vinldo23-supply = <...>;
|
||||
vinldo4-supply = <...>;
|
||||
|
|
|
|||
|
|
@ -579,7 +579,7 @@ Why: KVM tracepoints provide mostly equivalent information in a much more
|
|||
----------------------------
|
||||
|
||||
What: at91-mci driver ("CONFIG_MMC_AT91")
|
||||
When: 3.7
|
||||
When: 3.8
|
||||
Why: There are two mci drivers: at91-mci and atmel-mci. The PDC support
|
||||
was added to atmel-mci as a first step to support more chips.
|
||||
Then at91-mci was kept only for old IP versions (on at91rm9200 and
|
||||
|
|
|
|||
|
|
@ -114,7 +114,6 @@ prototypes:
|
|||
int (*drop_inode) (struct inode *);
|
||||
void (*evict_inode) (struct inode *);
|
||||
void (*put_super) (struct super_block *);
|
||||
void (*write_super) (struct super_block *);
|
||||
int (*sync_fs)(struct super_block *sb, int wait);
|
||||
int (*freeze_fs) (struct super_block *);
|
||||
int (*unfreeze_fs) (struct super_block *);
|
||||
|
|
@ -136,7 +135,6 @@ write_inode:
|
|||
drop_inode: !!!inode->i_lock!!!
|
||||
evict_inode:
|
||||
put_super: write
|
||||
write_super: read
|
||||
sync_fs: read
|
||||
freeze_fs: write
|
||||
unfreeze_fs: write
|
||||
|
|
|
|||
|
|
@ -94,9 +94,8 @@ protected.
|
|||
---
|
||||
[mandatory]
|
||||
|
||||
BKL is also moved from around sb operations. ->write_super() Is now called
|
||||
without BKL held. BKL should have been shifted into individual fs sb_op
|
||||
functions. If you don't need it, remove it.
|
||||
BKL is also moved from around sb operations. BKL should have been shifted into
|
||||
individual fs sb_op functions. If you don't need it, remove it.
|
||||
|
||||
---
|
||||
[informational]
|
||||
|
|
|
|||
|
|
@ -137,6 +137,17 @@ errors=panic|continue|remount-ro
|
|||
without doing anything or remount the partition in
|
||||
read-only mode (default behavior).
|
||||
|
||||
discard -- If set, issues discard/TRIM commands to the block
|
||||
device when blocks are freed. This is useful for SSD devices
|
||||
and sparse/thinly-provisoned LUNs.
|
||||
|
||||
nfs -- This option maintains an index (cache) of directory
|
||||
inodes by i_logstart which is used by the nfs-related code to
|
||||
improve look-ups.
|
||||
|
||||
Enable this only if you want to export the FAT filesystem
|
||||
over NFS
|
||||
|
||||
<bool>: 0,1,yes,no,true,false
|
||||
|
||||
TODO
|
||||
|
|
|
|||
|
|
@ -216,7 +216,6 @@ struct super_operations {
|
|||
void (*drop_inode) (struct inode *);
|
||||
void (*delete_inode) (struct inode *);
|
||||
void (*put_super) (struct super_block *);
|
||||
void (*write_super) (struct super_block *);
|
||||
int (*sync_fs)(struct super_block *sb, int wait);
|
||||
int (*freeze_fs) (struct super_block *);
|
||||
int (*unfreeze_fs) (struct super_block *);
|
||||
|
|
@ -273,9 +272,6 @@ or bottom half).
|
|||
put_super: called when the VFS wishes to free the superblock
|
||||
(i.e. unmount). This is called with the superblock lock held
|
||||
|
||||
write_super: called when the VFS superblock needs to be written to
|
||||
disc. This method is optional
|
||||
|
||||
sync_fs: called when VFS is writing out all dirty data associated with
|
||||
a superblock. The second parameter indicates whether the method
|
||||
should wait until the write out has been completed. Optional.
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@ Supported adapters:
|
|||
* Intel DH89xxCC (PCH)
|
||||
* Intel Panther Point (PCH)
|
||||
* Intel Lynx Point (PCH)
|
||||
* Intel Lynx Point-LP (PCH)
|
||||
Datasheets: Publicly available at the Intel website
|
||||
|
||||
On Intel Patsburg and later chipsets, both the normal host SMBus controller
|
||||
|
|
|
|||
|
|
@ -262,9 +262,9 @@ MINIMUM_BATTERY_MINUTES=10
|
|||
|
||||
#
|
||||
# Allowed dirty background ratio, in percent. Once DIRTY_RATIO has been
|
||||
# exceeded, the kernel will wake pdflush which will then reduce the amount
|
||||
# of dirty memory to dirty_background_ratio. Set this nice and low, so once
|
||||
# some writeout has commenced, we do a lot of it.
|
||||
# exceeded, the kernel will wake flusher threads which will then reduce the
|
||||
# amount of dirty memory to dirty_background_ratio. Set this nice and low,
|
||||
# so once some writeout has commenced, we do a lot of it.
|
||||
#
|
||||
#DIRTY_BACKGROUND_RATIO=5
|
||||
|
||||
|
|
@ -384,9 +384,9 @@ CPU_MAXFREQ=${CPU_MAXFREQ:-'slowest'}
|
|||
|
||||
#
|
||||
# Allowed dirty background ratio, in percent. Once DIRTY_RATIO has been
|
||||
# exceeded, the kernel will wake pdflush which will then reduce the amount
|
||||
# of dirty memory to dirty_background_ratio. Set this nice and low, so once
|
||||
# some writeout has commenced, we do a lot of it.
|
||||
# exceeded, the kernel will wake flusher threads which will then reduce the
|
||||
# amount of dirty memory to dirty_background_ratio. Set this nice and low,
|
||||
# so once some writeout has commenced, we do a lot of it.
|
||||
#
|
||||
DIRTY_BACKGROUND_RATIO=${DIRTY_BACKGROUND_RATIO:-'5'}
|
||||
|
||||
|
|
|
|||
|
|
@ -51,8 +51,23 @@ Built-in netconsole starts immediately after the TCP stack is
|
|||
initialized and attempts to bring up the supplied dev at the supplied
|
||||
address.
|
||||
|
||||
The remote host can run either 'netcat -u -l -p <port>',
|
||||
'nc -l -u <port>' or syslogd.
|
||||
The remote host has several options to receive the kernel messages,
|
||||
for example:
|
||||
|
||||
1) syslogd
|
||||
|
||||
2) netcat
|
||||
|
||||
On distributions using a BSD-based netcat version (e.g. Fedora,
|
||||
openSUSE and Ubuntu) the listening port must be specified without
|
||||
the -p switch:
|
||||
|
||||
'nc -u -l -p <port>' / 'nc -u -l <port>' or
|
||||
'netcat -u -l -p <port>' / 'netcat -u -l <port>'
|
||||
|
||||
3) socat
|
||||
|
||||
'socat udp-recv:<port> -'
|
||||
|
||||
Dynamic reconfiguration:
|
||||
========================
|
||||
|
|
|
|||
|
|
@ -840,9 +840,9 @@ static unsigned long i2c_pin_configs[] = {
|
|||
|
||||
static struct pinctrl_map __initdata mapping[] = {
|
||||
PIN_MAP_MUX_GROUP("foo-i2c.0", PINCTRL_STATE_DEFAULT, "pinctrl-foo", "i2c0", "i2c0"),
|
||||
PIN_MAP_MUX_CONFIGS_GROUP("foo-i2c.0", PINCTRL_STATE_DEFAULT, "pinctrl-foo", "i2c0", i2c_grp_configs),
|
||||
PIN_MAP_MUX_CONFIGS_PIN("foo-i2c.0", PINCTRL_STATE_DEFAULT, "pinctrl-foo", "i2c0scl", i2c_pin_configs),
|
||||
PIN_MAP_MUX_CONFIGS_PIN("foo-i2c.0", PINCTRL_STATE_DEFAULT, "pinctrl-foo", "i2c0sda", i2c_pin_configs),
|
||||
PIN_MAP_CONFIGS_GROUP("foo-i2c.0", PINCTRL_STATE_DEFAULT, "pinctrl-foo", "i2c0", i2c_grp_configs),
|
||||
PIN_MAP_CONFIGS_PIN("foo-i2c.0", PINCTRL_STATE_DEFAULT, "pinctrl-foo", "i2c0scl", i2c_pin_configs),
|
||||
PIN_MAP_CONFIGS_PIN("foo-i2c.0", PINCTRL_STATE_DEFAULT, "pinctrl-foo", "i2c0sda", i2c_pin_configs),
|
||||
};
|
||||
|
||||
Finally, some devices expect the mapping table to contain certain specific
|
||||
|
|
|
|||
|
|
@ -46,14 +46,13 @@ restrictions, it can call prctl(PR_SET_PTRACER, PR_SET_PTRACER_ANY, ...)
|
|||
so that any otherwise allowed process (even those in external pid namespaces)
|
||||
may attach.
|
||||
|
||||
These restrictions do not change how ptrace via PTRACE_TRACEME operates.
|
||||
|
||||
The sysctl settings are:
|
||||
The sysctl settings (writable only with CAP_SYS_PTRACE) are:
|
||||
|
||||
0 - classic ptrace permissions: a process can PTRACE_ATTACH to any other
|
||||
process running under the same uid, as long as it is dumpable (i.e.
|
||||
did not transition uids, start privileged, or have called
|
||||
prctl(PR_SET_DUMPABLE...) already).
|
||||
prctl(PR_SET_DUMPABLE...) already). Similarly, PTRACE_TRACEME is
|
||||
unchanged.
|
||||
|
||||
1 - restricted ptrace: a process must have a predefined relationship
|
||||
with the inferior it wants to call PTRACE_ATTACH on. By default,
|
||||
|
|
@ -61,12 +60,13 @@ The sysctl settings are:
|
|||
classic criteria is also met. To change the relationship, an
|
||||
inferior can call prctl(PR_SET_PTRACER, debugger, ...) to declare
|
||||
an allowed debugger PID to call PTRACE_ATTACH on the inferior.
|
||||
Using PTRACE_TRACEME is unchanged.
|
||||
|
||||
2 - admin-only attach: only processes with CAP_SYS_PTRACE may use ptrace
|
||||
with PTRACE_ATTACH.
|
||||
with PTRACE_ATTACH, or through children calling PTRACE_TRACEME.
|
||||
|
||||
3 - no attach: no processes may use ptrace with PTRACE_ATTACH. Once set,
|
||||
this sysctl cannot be changed to a lower value.
|
||||
3 - no attach: no processes may use ptrace with PTRACE_ATTACH nor via
|
||||
PTRACE_TRACEME. Once set, this sysctl value cannot be changed.
|
||||
|
||||
The original children-only logic was based on the restrictions in grsecurity.
|
||||
|
||||
|
|
|
|||
|
|
@ -76,8 +76,8 @@ huge pages although processes will also directly compact memory as required.
|
|||
|
||||
dirty_background_bytes
|
||||
|
||||
Contains the amount of dirty memory at which the pdflush background writeback
|
||||
daemon will start writeback.
|
||||
Contains the amount of dirty memory at which the background kernel
|
||||
flusher threads will start writeback.
|
||||
|
||||
Note: dirty_background_bytes is the counterpart of dirty_background_ratio. Only
|
||||
one of them may be specified at a time. When one sysctl is written it is
|
||||
|
|
@ -89,7 +89,7 @@ other appears as 0 when read.
|
|||
dirty_background_ratio
|
||||
|
||||
Contains, as a percentage of total system memory, the number of pages at which
|
||||
the pdflush background writeback daemon will start writing out dirty data.
|
||||
the background kernel flusher threads will start writing out dirty data.
|
||||
|
||||
==============================================================
|
||||
|
||||
|
|
@ -112,9 +112,9 @@ retained.
|
|||
dirty_expire_centisecs
|
||||
|
||||
This tunable is used to define when dirty data is old enough to be eligible
|
||||
for writeout by the pdflush daemons. It is expressed in 100'ths of a second.
|
||||
Data which has been dirty in-memory for longer than this interval will be
|
||||
written out next time a pdflush daemon wakes up.
|
||||
for writeout by the kernel flusher threads. It is expressed in 100'ths
|
||||
of a second. Data which has been dirty in-memory for longer than this
|
||||
interval will be written out next time a flusher thread wakes up.
|
||||
|
||||
==============================================================
|
||||
|
||||
|
|
@ -128,7 +128,7 @@ data.
|
|||
|
||||
dirty_writeback_centisecs
|
||||
|
||||
The pdflush writeback daemons will periodically wake up and write `old' data
|
||||
The kernel flusher threads will periodically wake up and write `old' data
|
||||
out to disk. This tunable expresses the interval between those wakeups, in
|
||||
100'ths of a second.
|
||||
|
||||
|
|
|
|||
|
|
@ -133,7 +133,7 @@ character devices for this group:
|
|||
$ lspci -n -s 0000:06:0d.0
|
||||
06:0d.0 0401: 1102:0002 (rev 08)
|
||||
# echo 0000:06:0d.0 > /sys/bus/pci/devices/0000:06:0d.0/driver/unbind
|
||||
# echo 1102 0002 > /sys/bus/pci/drivers/vfio/new_id
|
||||
# echo 1102 0002 > /sys/bus/pci/drivers/vfio-pci/new_id
|
||||
|
||||
Now we need to look at what other devices are in the group to free
|
||||
it for use by VFIO:
|
||||
|
|
|
|||
|
|
@ -299,11 +299,17 @@ map_hugetlb.c.
|
|||
*******************************************************************
|
||||
|
||||
/*
|
||||
* hugepage-shm: see Documentation/vm/hugepage-shm.c
|
||||
* map_hugetlb: see tools/testing/selftests/vm/map_hugetlb.c
|
||||
*/
|
||||
|
||||
*******************************************************************
|
||||
|
||||
/*
|
||||
* hugepage-mmap: see Documentation/vm/hugepage-mmap.c
|
||||
* hugepage-shm: see tools/testing/selftests/vm/hugepage-shm.c
|
||||
*/
|
||||
|
||||
*******************************************************************
|
||||
|
||||
/*
|
||||
* hugepage-mmap: see tools/testing/selftests/vm/hugepage-mmap.c
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -3,6 +3,7 @@ Kernel driver w1_therm
|
|||
|
||||
Supported chips:
|
||||
* Maxim ds18*20 based temperature sensors.
|
||||
* Maxim ds1825 based temperature sensors.
|
||||
|
||||
Author: Evgeniy Polyakov <johnpol@2ka.mipt.ru>
|
||||
|
||||
|
|
@ -15,6 +16,7 @@ supported family codes:
|
|||
W1_THERM_DS18S20 0x10
|
||||
W1_THERM_DS1822 0x22
|
||||
W1_THERM_DS18B20 0x28
|
||||
W1_THERM_DS1825 0x3B
|
||||
|
||||
Support is provided through the sysfs w1_slave file. Each open and
|
||||
read sequence will initiate a temperature conversion then provide two
|
||||
|
|
|
|||
|
|
@ -31,7 +31,7 @@ static void keep_alive(void)
|
|||
* or "-e" to enable the card.
|
||||
*/
|
||||
|
||||
void term(int sig)
|
||||
static void term(int sig)
|
||||
{
|
||||
close(fd);
|
||||
fprintf(stderr, "Stopping watchdog ticks...\n");
|
||||
|
|
|
|||
86
MAINTAINERS
86
MAINTAINERS
|
|
@ -827,24 +827,24 @@ F: arch/arm/mach-pxa/colibri-pxa270-income.c
|
|||
|
||||
ARM/INTEL IOP32X ARM ARCHITECTURE
|
||||
M: Lennert Buytenhek <kernel@wantstofly.org>
|
||||
M: Dan Williams <dan.j.williams@intel.com>
|
||||
M: Dan Williams <djbw@fb.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
|
||||
ARM/INTEL IOP33X ARM ARCHITECTURE
|
||||
M: Dan Williams <dan.j.williams@intel.com>
|
||||
M: Dan Williams <djbw@fb.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
|
||||
ARM/INTEL IOP13XX ARM ARCHITECTURE
|
||||
M: Lennert Buytenhek <kernel@wantstofly.org>
|
||||
M: Dan Williams <dan.j.williams@intel.com>
|
||||
M: Dan Williams <djbw@fb.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
|
||||
ARM/INTEL IQ81342EX MACHINE SUPPORT
|
||||
M: Lennert Buytenhek <kernel@wantstofly.org>
|
||||
M: Dan Williams <dan.j.williams@intel.com>
|
||||
M: Dan Williams <djbw@fb.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
|
||||
|
|
@ -869,7 +869,7 @@ F: drivers/pcmcia/pxa2xx_stargate2.c
|
|||
|
||||
ARM/INTEL XSC3 (MANZANO) ARM CORE
|
||||
M: Lennert Buytenhek <kernel@wantstofly.org>
|
||||
M: Dan Williams <dan.j.williams@intel.com>
|
||||
M: Dan Williams <djbw@fb.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
|
||||
|
|
@ -925,14 +925,14 @@ S: Maintained
|
|||
|
||||
ARM/NOMADIK ARCHITECTURE
|
||||
M: Alessandro Rubini <rubini@unipv.it>
|
||||
M: Linus Walleij <linus.walleij@stericsson.com>
|
||||
M: Linus Walleij <linus.walleij@linaro.org>
|
||||
M: STEricsson <STEricsson_nomadik_linux@list.st.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: arch/arm/mach-nomadik/
|
||||
F: arch/arm/plat-nomadik/
|
||||
F: drivers/i2c/busses/i2c-nomadik.c
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik.git
|
||||
|
||||
ARM/OPENMOKO NEO FREERUNNER (GTA02) MACHINE SUPPORT
|
||||
M: Nelson Castillo <arhuaco@freaks-unidos.net>
|
||||
|
|
@ -1146,7 +1146,7 @@ F: drivers/usb/host/ehci-w90x900.c
|
|||
F: drivers/video/nuc900fb.c
|
||||
|
||||
ARM/U300 MACHINE SUPPORT
|
||||
M: Linus Walleij <linus.walleij@stericsson.com>
|
||||
M: Linus Walleij <linus.walleij@linaro.org>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
F: arch/arm/mach-u300/
|
||||
|
|
@ -1161,15 +1161,20 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson.git
|
|||
|
||||
ARM/Ux500 ARM ARCHITECTURE
|
||||
M: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
|
||||
M: Linus Walleij <linus.walleij@stericsson.com>
|
||||
M: Linus Walleij <linus.walleij@linaro.org>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: arch/arm/mach-ux500/
|
||||
F: drivers/clocksource/clksrc-dbx500-prcmu.c
|
||||
F: drivers/dma/ste_dma40*
|
||||
F: drivers/hwspinlock/u8500_hsem.c
|
||||
F: drivers/mfd/abx500*
|
||||
F: drivers/mfd/ab8500*
|
||||
F: drivers/mfd/stmpe*
|
||||
F: drivers/mfd/dbx500*
|
||||
F: drivers/mfd/db8500*
|
||||
F: drivers/pinctrl/pinctrl-nomadik*
|
||||
F: drivers/rtc/rtc-ab8500.c
|
||||
F: drivers/rtc/rtc-pl031.c
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson.git
|
||||
|
||||
ARM/VFP SUPPORT
|
||||
|
|
@ -1227,9 +1232,9 @@ S: Maintained
|
|||
F: drivers/hwmon/asb100.c
|
||||
|
||||
ASYNCHRONOUS TRANSFERS/TRANSFORMS (IOAT) API
|
||||
M: Dan Williams <dan.j.williams@intel.com>
|
||||
M: Dan Williams <djbw@fb.com>
|
||||
W: http://sourceforge.net/projects/xscaleiop
|
||||
S: Supported
|
||||
S: Maintained
|
||||
F: Documentation/crypto/async-tx-api.txt
|
||||
F: crypto/async_tx/
|
||||
F: drivers/dma/
|
||||
|
|
@ -2212,7 +2217,7 @@ S: Maintained
|
|||
F: drivers/scsi/tmscsim.*
|
||||
|
||||
DC395x SCSI driver
|
||||
M: Oliver Neukum <oliver@neukum.name>
|
||||
M: Oliver Neukum <oliver@neukum.org>
|
||||
M: Ali Akcaagac <aliakc@web.de>
|
||||
M: Jamie Lenehan <lenehan@twibble.org>
|
||||
W: http://twibble.org/dist/dc395x/
|
||||
|
|
@ -2359,7 +2364,7 @@ T: git git://git.linaro.org/people/sumitsemwal/linux-dma-buf.git
|
|||
|
||||
DMA GENERIC OFFLOAD ENGINE SUBSYSTEM
|
||||
M: Vinod Koul <vinod.koul@intel.com>
|
||||
M: Dan Williams <dan.j.williams@intel.com>
|
||||
M: Dan Williams <djbw@fb.com>
|
||||
S: Supported
|
||||
F: drivers/dma/
|
||||
F: include/linux/dma*
|
||||
|
|
@ -3094,7 +3099,7 @@ F: include/linux/gigaset_dev.h
|
|||
|
||||
GPIO SUBSYSTEM
|
||||
M: Grant Likely <grant.likely@secretlab.ca>
|
||||
M: Linus Walleij <linus.walleij@stericsson.com>
|
||||
M: Linus Walleij <linus.walleij@linaro.org>
|
||||
S: Maintained
|
||||
T: git git://git.secretlab.ca/git/linux-2.6.git
|
||||
F: Documentation/gpio.txt
|
||||
|
|
@ -3383,7 +3388,7 @@ M: "Wolfram Sang (embedded platforms)" <w.sang@pengutronix.de>
|
|||
L: linux-i2c@vger.kernel.org
|
||||
W: http://i2c.wiki.kernel.org/
|
||||
T: quilt kernel.org/pub/linux/kernel/people/jdelvare/linux-2.6/jdelvare-i2c/
|
||||
T: git git://git.fluff.org/bjdooks/linux.git
|
||||
T: git git://git.pengutronix.de/git/wsa/linux.git
|
||||
S: Maintained
|
||||
F: Documentation/i2c/
|
||||
F: drivers/i2c/
|
||||
|
|
@ -3547,12 +3552,12 @@ K: \b(ABS|SYN)_MT_
|
|||
|
||||
INTEL C600 SERIES SAS CONTROLLER DRIVER
|
||||
M: Intel SCU Linux support <intel-linux-scu@intel.com>
|
||||
M: Dan Williams <dan.j.williams@intel.com>
|
||||
M: Lukasz Dorau <lukasz.dorau@intel.com>
|
||||
M: Maciej Patelczyk <maciej.patelczyk@intel.com>
|
||||
M: Dave Jiang <dave.jiang@intel.com>
|
||||
M: Ed Nadolski <edmund.nadolski@intel.com>
|
||||
L: linux-scsi@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/djbw/isci.git
|
||||
S: Maintained
|
||||
T: git git://git.code.sf.net/p/intel-sas/isci
|
||||
S: Supported
|
||||
F: drivers/scsi/isci/
|
||||
F: firmware/isci/
|
||||
|
||||
|
|
@ -3590,8 +3595,8 @@ F: arch/x86/kernel/microcode_core.c
|
|||
F: arch/x86/kernel/microcode_intel.c
|
||||
|
||||
INTEL I/OAT DMA DRIVER
|
||||
M: Dan Williams <dan.j.williams@intel.com>
|
||||
S: Supported
|
||||
M: Dan Williams <djbw@fb.com>
|
||||
S: Maintained
|
||||
F: drivers/dma/ioat*
|
||||
|
||||
INTEL IOMMU (VT-d)
|
||||
|
|
@ -3603,8 +3608,8 @@ F: drivers/iommu/intel-iommu.c
|
|||
F: include/linux/intel-iommu.h
|
||||
|
||||
INTEL IOP-ADMA DMA DRIVER
|
||||
M: Dan Williams <dan.j.williams@intel.com>
|
||||
S: Maintained
|
||||
M: Dan Williams <djbw@fb.com>
|
||||
S: Odd fixes
|
||||
F: drivers/dma/iop-adma.c
|
||||
|
||||
INTEL IXP4XX QMGR, NPE, ETHERNET and HSS SUPPORT
|
||||
|
|
@ -3662,11 +3667,12 @@ F: Documentation/networking/README.ipw2200
|
|||
F: drivers/net/wireless/ipw2x00/
|
||||
|
||||
INTEL(R) TRUSTED EXECUTION TECHNOLOGY (TXT)
|
||||
M: Joseph Cihula <joseph.cihula@intel.com>
|
||||
M: Richard L Maliszewski <richard.l.maliszewski@intel.com>
|
||||
M: Gang Wei <gang.wei@intel.com>
|
||||
M: Shane Wang <shane.wang@intel.com>
|
||||
L: tboot-devel@lists.sourceforge.net
|
||||
W: http://tboot.sourceforge.net
|
||||
T: Mercurial http://www.bughost.org/repos.hg/tboot.hg
|
||||
T: hg http://tboot.hg.sourceforge.net:8000/hgroot/tboot/tboot
|
||||
S: Supported
|
||||
F: Documentation/intel_txt.txt
|
||||
F: include/linux/tboot.h
|
||||
|
|
@ -4533,7 +4539,7 @@ S: Supported
|
|||
F: arch/microblaze/
|
||||
|
||||
MICROTEK X6 SCANNER
|
||||
M: Oliver Neukum <oliver@neukum.name>
|
||||
M: Oliver Neukum <oliver@neukum.org>
|
||||
S: Maintained
|
||||
F: drivers/usb/image/microtek.*
|
||||
|
||||
|
|
@ -5329,14 +5335,15 @@ PIN CONTROL SUBSYSTEM
|
|||
M: Linus Walleij <linus.walleij@linaro.org>
|
||||
S: Maintained
|
||||
F: drivers/pinctrl/
|
||||
F: include/linux/pinctrl/
|
||||
|
||||
PIN CONTROLLER - ST SPEAR
|
||||
M: Viresh Kumar <viresh.linux@gmail.com>
|
||||
M: Viresh Kumar <viresh.linux@gmail.com>
|
||||
L: spear-devel@list.st.com
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
W: http://www.st.com/spear
|
||||
S: Maintained
|
||||
F: driver/pinctrl/spear/
|
||||
F: drivers/pinctrl/spear/
|
||||
|
||||
PKTCDVD DRIVER
|
||||
M: Peter Osterlund <petero2@telia.com>
|
||||
|
|
@ -5538,6 +5545,8 @@ F: Documentation/devicetree/bindings/pwm/
|
|||
F: include/linux/pwm.h
|
||||
F: include/linux/of_pwm.h
|
||||
F: drivers/pwm/
|
||||
F: drivers/video/backlight/pwm_bl.c
|
||||
F: include/linux/pwm_backlight.h
|
||||
|
||||
PXA2xx/PXA3xx SUPPORT
|
||||
M: Eric Miao <eric.y.miao@gmail.com>
|
||||
|
|
@ -7071,7 +7080,7 @@ F: include/linux/mtd/ubi.h
|
|||
F: include/mtd/ubi-user.h
|
||||
|
||||
USB ACM DRIVER
|
||||
M: Oliver Neukum <oliver@neukum.name>
|
||||
M: Oliver Neukum <oliver@neukum.org>
|
||||
L: linux-usb@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/usb/acm.txt
|
||||
|
|
@ -7092,7 +7101,7 @@ S: Supported
|
|||
F: drivers/block/ub.c
|
||||
|
||||
USB CDC ETHERNET DRIVER
|
||||
M: Oliver Neukum <oliver@neukum.name>
|
||||
M: Oliver Neukum <oliver@neukum.org>
|
||||
L: linux-usb@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/net/usb/cdc_*.c
|
||||
|
|
@ -7165,7 +7174,7 @@ F: drivers/usb/host/isp116x*
|
|||
F: include/linux/usb/isp116x.h
|
||||
|
||||
USB KAWASAKI LSI DRIVER
|
||||
M: Oliver Neukum <oliver@neukum.name>
|
||||
M: Oliver Neukum <oliver@neukum.org>
|
||||
L: linux-usb@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/usb/serial/kl5kusb105.*
|
||||
|
|
@ -7283,6 +7292,12 @@ W: http://www.connecttech.com
|
|||
S: Supported
|
||||
F: drivers/usb/serial/whiteheat*
|
||||
|
||||
USB SMSC75XX ETHERNET DRIVER
|
||||
M: Steve Glendinning <steve.glendinning@shawell.net>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/net/usb/smsc75xx.*
|
||||
|
||||
USB SMSC95XX ETHERNET DRIVER
|
||||
M: Steve Glendinning <steve.glendinning@shawell.net>
|
||||
L: netdev@vger.kernel.org
|
||||
|
|
@ -7665,23 +7680,28 @@ S: Supported
|
|||
F: Documentation/hwmon/wm83??
|
||||
F: arch/arm/mach-s3c64xx/mach-crag6410*
|
||||
F: drivers/clk/clk-wm83*.c
|
||||
F: drivers/extcon/extcon-arizona.c
|
||||
F: drivers/leds/leds-wm83*.c
|
||||
F: drivers/gpio/gpio-*wm*.c
|
||||
F: drivers/gpio/gpio-arizona.c
|
||||
F: drivers/hwmon/wm83??-hwmon.c
|
||||
F: drivers/input/misc/wm831x-on.c
|
||||
F: drivers/input/touchscreen/wm831x-ts.c
|
||||
F: drivers/input/touchscreen/wm97*.c
|
||||
F: drivers/mfd/wm8*.c
|
||||
F: drivers/mfd/arizona*
|
||||
F: drivers/mfd/wm*.c
|
||||
F: drivers/power/wm83*.c
|
||||
F: drivers/rtc/rtc-wm83*.c
|
||||
F: drivers/regulator/wm8*.c
|
||||
F: drivers/video/backlight/wm83*_bl.c
|
||||
F: drivers/watchdog/wm83*_wdt.c
|
||||
F: include/linux/mfd/arizona/
|
||||
F: include/linux/mfd/wm831x/
|
||||
F: include/linux/mfd/wm8350/
|
||||
F: include/linux/mfd/wm8400*
|
||||
F: include/linux/wm97xx.h
|
||||
F: include/sound/wm????.h
|
||||
F: sound/soc/codecs/arizona.?
|
||||
F: sound/soc/codecs/wm*
|
||||
|
||||
WORKQUEUE
|
||||
|
|
|
|||
4
Makefile
4
Makefile
|
|
@ -1,8 +1,8 @@
|
|||
VERSION = 3
|
||||
PATCHLEVEL = 6
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc1
|
||||
NAME = Saber-toothed Squirrel
|
||||
EXTRAVERSION = -rc7
|
||||
NAME = Terrified Chipmunk
|
||||
|
||||
# *DOCUMENTATION*
|
||||
# To see a list of typical targets execute "make help"
|
||||
|
|
|
|||
|
|
@ -18,6 +18,8 @@ config ALPHA
|
|||
select ARCH_HAVE_NMI_SAFE_CMPXCHG
|
||||
select GENERIC_SMP_IDLE_THREAD
|
||||
select GENERIC_CMOS_UPDATE
|
||||
select GENERIC_STRNCPY_FROM_USER
|
||||
select GENERIC_STRNLEN_USER
|
||||
help
|
||||
The Alpha is a 64-bit general-purpose processor designed and
|
||||
marketed by the Digital Equipment Corporation of blessed memory,
|
||||
|
|
|
|||
|
|
@ -14,8 +14,8 @@
|
|||
*/
|
||||
|
||||
|
||||
#define ATOMIC_INIT(i) ( (atomic_t) { (i) } )
|
||||
#define ATOMIC64_INIT(i) ( (atomic64_t) { (i) } )
|
||||
#define ATOMIC_INIT(i) { (i) }
|
||||
#define ATOMIC64_INIT(i) { (i) }
|
||||
|
||||
#define atomic_read(v) (*(volatile int *)&(v)->counter)
|
||||
#define atomic64_read(v) (*(volatile long *)&(v)->counter)
|
||||
|
|
|
|||
|
|
@ -1,7 +1,9 @@
|
|||
#ifndef __ASM_ALPHA_FPU_H
|
||||
#define __ASM_ALPHA_FPU_H
|
||||
|
||||
#ifdef __KERNEL__
|
||||
#include <asm/special_insns.h>
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Alpha floating-point control register defines:
|
||||
|
|
|
|||
|
|
@ -76,7 +76,10 @@ struct switch_stack {
|
|||
#define task_pt_regs(task) \
|
||||
((struct pt_regs *) (task_stack_page(task) + 2*PAGE_SIZE) - 1)
|
||||
|
||||
#define force_successful_syscall_return() (task_pt_regs(current)->r0 = 0)
|
||||
#define current_pt_regs() \
|
||||
((struct pt_regs *) ((char *)current_thread_info() + 2*PAGE_SIZE) - 1)
|
||||
|
||||
#define force_successful_syscall_return() (current_pt_regs()->r0 = 0)
|
||||
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -76,9 +76,11 @@
|
|||
/* Instruct lower device to use last 4-bytes of skb data as FCS */
|
||||
#define SO_NOFCS 43
|
||||
|
||||
#ifdef __KERNEL__
|
||||
/* O_NONBLOCK clashes with the bits used for socket types. Therefore we
|
||||
* have to define SOCK_NONBLOCK to a different value here.
|
||||
*/
|
||||
#define SOCK_NONBLOCK 0x40000000
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif /* _ASM_SOCKET_H */
|
||||
|
|
|
|||
|
|
@ -433,36 +433,12 @@ clear_user(void __user *to, long len)
|
|||
#undef __module_address
|
||||
#undef __module_call
|
||||
|
||||
/* Returns: -EFAULT if exception before terminator, N if the entire
|
||||
buffer filled, else strlen. */
|
||||
#define user_addr_max() \
|
||||
(segment_eq(get_fs(), USER_DS) ? TASK_SIZE : ~0UL)
|
||||
|
||||
extern long __strncpy_from_user(char *__to, const char __user *__from, long __to_len);
|
||||
|
||||
extern inline long
|
||||
strncpy_from_user(char *to, const char __user *from, long n)
|
||||
{
|
||||
long ret = -EFAULT;
|
||||
if (__access_ok((unsigned long)from, 0, get_fs()))
|
||||
ret = __strncpy_from_user(to, from, n);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Returns: 0 if bad, string length+1 (memory size) of string if ok */
|
||||
extern long __strlen_user(const char __user *);
|
||||
|
||||
extern inline long strlen_user(const char __user *str)
|
||||
{
|
||||
return access_ok(VERIFY_READ,str,0) ? __strlen_user(str) : 0;
|
||||
}
|
||||
|
||||
/* Returns: 0 if exception before NUL or reaching the supplied limit (N),
|
||||
* a value greater than N if the limit would be exceeded, else strlen. */
|
||||
extern long __strnlen_user(const char __user *, long);
|
||||
|
||||
extern inline long strnlen_user(const char __user *str, long n)
|
||||
{
|
||||
return access_ok(VERIFY_READ,str,0) ? __strnlen_user(str, n) : 0;
|
||||
}
|
||||
extern long strncpy_from_user(char *dest, const char __user *src, long count);
|
||||
extern __must_check long strlen_user(const char __user *str);
|
||||
extern __must_check long strnlen_user(const char __user *str, long n);
|
||||
|
||||
/*
|
||||
* About the exception table:
|
||||
|
|
|
|||
|
|
@ -465,10 +465,12 @@
|
|||
#define __NR_setns 501
|
||||
#define __NR_accept4 502
|
||||
#define __NR_sendmmsg 503
|
||||
#define __NR_process_vm_readv 504
|
||||
#define __NR_process_vm_writev 505
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#define NR_SYSCALLS 504
|
||||
#define NR_SYSCALLS 506
|
||||
|
||||
#define __ARCH_WANT_OLD_READDIR
|
||||
#define __ARCH_WANT_STAT64
|
||||
|
|
|
|||
|
|
@ -0,0 +1,55 @@
|
|||
#ifndef _ASM_WORD_AT_A_TIME_H
|
||||
#define _ASM_WORD_AT_A_TIME_H
|
||||
|
||||
#include <asm/compiler.h>
|
||||
|
||||
/*
|
||||
* word-at-a-time interface for Alpha.
|
||||
*/
|
||||
|
||||
/*
|
||||
* We do not use the word_at_a_time struct on Alpha, but it needs to be
|
||||
* implemented to humour the generic code.
|
||||
*/
|
||||
struct word_at_a_time {
|
||||
const unsigned long unused;
|
||||
};
|
||||
|
||||
#define WORD_AT_A_TIME_CONSTANTS { 0 }
|
||||
|
||||
/* Return nonzero if val has a zero */
|
||||
static inline unsigned long has_zero(unsigned long val, unsigned long *bits, const struct word_at_a_time *c)
|
||||
{
|
||||
unsigned long zero_locations = __kernel_cmpbge(0, val);
|
||||
*bits = zero_locations;
|
||||
return zero_locations;
|
||||
}
|
||||
|
||||
static inline unsigned long prep_zero_mask(unsigned long val, unsigned long bits, const struct word_at_a_time *c)
|
||||
{
|
||||
return bits;
|
||||
}
|
||||
|
||||
#define create_zero_mask(bits) (bits)
|
||||
|
||||
static inline unsigned long find_zero(unsigned long bits)
|
||||
{
|
||||
#if defined(CONFIG_ALPHA_EV6) && defined(CONFIG_ALPHA_EV67)
|
||||
/* Simple if have CIX instructions */
|
||||
return __kernel_cttz(bits);
|
||||
#else
|
||||
unsigned long t1, t2, t3;
|
||||
/* Retain lowest set bit only */
|
||||
bits &= -bits;
|
||||
/* Binary search for lowest set bit */
|
||||
t1 = bits & 0xf0;
|
||||
t2 = bits & 0xcc;
|
||||
t3 = bits & 0xaa;
|
||||
if (t1) t1 = 4;
|
||||
if (t2) t2 = 2;
|
||||
if (t3) t3 = 1;
|
||||
return t1 + t2 + t3;
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif /* _ASM_WORD_AT_A_TIME_H */
|
||||
|
|
@ -52,7 +52,6 @@ EXPORT_SYMBOL(alpha_write_fp_reg_s);
|
|||
|
||||
/* entry.S */
|
||||
EXPORT_SYMBOL(kernel_thread);
|
||||
EXPORT_SYMBOL(kernel_execve);
|
||||
|
||||
/* Networking helper routines. */
|
||||
EXPORT_SYMBOL(csum_tcpudp_magic);
|
||||
|
|
@ -74,8 +73,6 @@ EXPORT_SYMBOL(alpha_fp_emul);
|
|||
*/
|
||||
EXPORT_SYMBOL(__copy_user);
|
||||
EXPORT_SYMBOL(__do_clear_user);
|
||||
EXPORT_SYMBOL(__strncpy_from_user);
|
||||
EXPORT_SYMBOL(__strnlen_user);
|
||||
|
||||
/*
|
||||
* SMP-specific symbols.
|
||||
|
|
|
|||
|
|
@ -663,58 +663,6 @@ kernel_thread:
|
|||
br ret_to_kernel
|
||||
.end kernel_thread
|
||||
|
||||
/*
|
||||
* kernel_execve(path, argv, envp)
|
||||
*/
|
||||
.align 4
|
||||
.globl kernel_execve
|
||||
.ent kernel_execve
|
||||
kernel_execve:
|
||||
/* We can be called from a module. */
|
||||
ldgp $gp, 0($27)
|
||||
lda $sp, -(32+SIZEOF_PT_REGS+8)($sp)
|
||||
.frame $sp, 32+SIZEOF_PT_REGS+8, $26, 0
|
||||
stq $26, 0($sp)
|
||||
stq $16, 8($sp)
|
||||
stq $17, 16($sp)
|
||||
stq $18, 24($sp)
|
||||
.prologue 1
|
||||
|
||||
lda $16, 32($sp)
|
||||
lda $17, 0
|
||||
lda $18, SIZEOF_PT_REGS
|
||||
bsr $26, memset !samegp
|
||||
|
||||
/* Avoid the HAE being gratuitously wrong, which would cause us
|
||||
to do the whole turn off interrupts thing and restore it. */
|
||||
ldq $2, alpha_mv+HAE_CACHE
|
||||
stq $2, 152+32($sp)
|
||||
|
||||
ldq $16, 8($sp)
|
||||
ldq $17, 16($sp)
|
||||
ldq $18, 24($sp)
|
||||
lda $19, 32($sp)
|
||||
bsr $26, do_execve !samegp
|
||||
|
||||
ldq $26, 0($sp)
|
||||
bne $0, 1f /* error! */
|
||||
|
||||
/* Move the temporary pt_regs struct from its current location
|
||||
to the top of the kernel stack frame. See copy_thread for
|
||||
details for a normal process. */
|
||||
lda $16, 0x4000 - SIZEOF_PT_REGS($8)
|
||||
lda $17, 32($sp)
|
||||
lda $18, SIZEOF_PT_REGS
|
||||
bsr $26, memmove !samegp
|
||||
|
||||
/* Take that over as our new stack frame and visit userland! */
|
||||
lda $sp, 0x4000 - SIZEOF_PT_REGS($8)
|
||||
br $31, ret_from_sys_call
|
||||
|
||||
1: lda $sp, 32+SIZEOF_PT_REGS+8($sp)
|
||||
ret
|
||||
.end kernel_execve
|
||||
|
||||
|
||||
/*
|
||||
* Special system calls. Most of these are special in that they either
|
||||
|
|
@ -796,115 +744,6 @@ sys_rt_sigreturn:
|
|||
br ret_from_sys_call
|
||||
.end sys_rt_sigreturn
|
||||
|
||||
.align 4
|
||||
.globl sys_sethae
|
||||
.ent sys_sethae
|
||||
sys_sethae:
|
||||
.prologue 0
|
||||
stq $16, 152($sp)
|
||||
ret
|
||||
.end sys_sethae
|
||||
|
||||
.align 4
|
||||
.globl osf_getpriority
|
||||
.ent osf_getpriority
|
||||
osf_getpriority:
|
||||
lda $sp, -16($sp)
|
||||
stq $26, 0($sp)
|
||||
.prologue 0
|
||||
|
||||
jsr $26, sys_getpriority
|
||||
|
||||
ldq $26, 0($sp)
|
||||
blt $0, 1f
|
||||
|
||||
/* Return value is the unbiased priority, i.e. 20 - prio.
|
||||
This does result in negative return values, so signal
|
||||
no error by writing into the R0 slot. */
|
||||
lda $1, 20
|
||||
stq $31, 16($sp)
|
||||
subl $1, $0, $0
|
||||
unop
|
||||
|
||||
1: lda $sp, 16($sp)
|
||||
ret
|
||||
.end osf_getpriority
|
||||
|
||||
.align 4
|
||||
.globl sys_getxuid
|
||||
.ent sys_getxuid
|
||||
sys_getxuid:
|
||||
.prologue 0
|
||||
ldq $2, TI_TASK($8)
|
||||
ldq $3, TASK_CRED($2)
|
||||
ldl $0, CRED_UID($3)
|
||||
ldl $1, CRED_EUID($3)
|
||||
stq $1, 80($sp)
|
||||
ret
|
||||
.end sys_getxuid
|
||||
|
||||
.align 4
|
||||
.globl sys_getxgid
|
||||
.ent sys_getxgid
|
||||
sys_getxgid:
|
||||
.prologue 0
|
||||
ldq $2, TI_TASK($8)
|
||||
ldq $3, TASK_CRED($2)
|
||||
ldl $0, CRED_GID($3)
|
||||
ldl $1, CRED_EGID($3)
|
||||
stq $1, 80($sp)
|
||||
ret
|
||||
.end sys_getxgid
|
||||
|
||||
.align 4
|
||||
.globl sys_getxpid
|
||||
.ent sys_getxpid
|
||||
sys_getxpid:
|
||||
.prologue 0
|
||||
ldq $2, TI_TASK($8)
|
||||
|
||||
/* See linux/kernel/timer.c sys_getppid for discussion
|
||||
about this loop. */
|
||||
ldq $3, TASK_GROUP_LEADER($2)
|
||||
ldq $4, TASK_REAL_PARENT($3)
|
||||
ldl $0, TASK_TGID($2)
|
||||
1: ldl $1, TASK_TGID($4)
|
||||
#ifdef CONFIG_SMP
|
||||
mov $4, $5
|
||||
mb
|
||||
ldq $3, TASK_GROUP_LEADER($2)
|
||||
ldq $4, TASK_REAL_PARENT($3)
|
||||
cmpeq $4, $5, $5
|
||||
beq $5, 1b
|
||||
#endif
|
||||
stq $1, 80($sp)
|
||||
ret
|
||||
.end sys_getxpid
|
||||
|
||||
.align 4
|
||||
.globl sys_alpha_pipe
|
||||
.ent sys_alpha_pipe
|
||||
sys_alpha_pipe:
|
||||
lda $sp, -16($sp)
|
||||
stq $26, 0($sp)
|
||||
.prologue 0
|
||||
|
||||
mov $31, $17
|
||||
lda $16, 8($sp)
|
||||
jsr $26, do_pipe_flags
|
||||
|
||||
ldq $26, 0($sp)
|
||||
bne $0, 1f
|
||||
|
||||
/* The return values are in $0 and $20. */
|
||||
ldl $1, 12($sp)
|
||||
ldl $0, 8($sp)
|
||||
|
||||
stq $1, 80+16($sp)
|
||||
1: lda $sp, 16($sp)
|
||||
ret
|
||||
.end sys_alpha_pipe
|
||||
|
||||
.align 4
|
||||
.globl sys_execve
|
||||
.ent sys_execve
|
||||
|
|
|
|||
|
|
@ -1404,3 +1404,52 @@ SYSCALL_DEFINE3(osf_writev, unsigned long, fd,
|
|||
}
|
||||
|
||||
#endif
|
||||
|
||||
SYSCALL_DEFINE2(osf_getpriority, int, which, int, who)
|
||||
{
|
||||
int prio = sys_getpriority(which, who);
|
||||
if (prio >= 0) {
|
||||
/* Return value is the unbiased priority, i.e. 20 - prio.
|
||||
This does result in negative return values, so signal
|
||||
no error */
|
||||
force_successful_syscall_return();
|
||||
prio = 20 - prio;
|
||||
}
|
||||
return prio;
|
||||
}
|
||||
|
||||
SYSCALL_DEFINE0(getxuid)
|
||||
{
|
||||
current_pt_regs()->r20 = sys_geteuid();
|
||||
return sys_getuid();
|
||||
}
|
||||
|
||||
SYSCALL_DEFINE0(getxgid)
|
||||
{
|
||||
current_pt_regs()->r20 = sys_getegid();
|
||||
return sys_getgid();
|
||||
}
|
||||
|
||||
SYSCALL_DEFINE0(getxpid)
|
||||
{
|
||||
current_pt_regs()->r20 = sys_getppid();
|
||||
return sys_getpid();
|
||||
}
|
||||
|
||||
SYSCALL_DEFINE0(alpha_pipe)
|
||||
{
|
||||
int fd[2];
|
||||
int res = do_pipe_flags(fd, 0);
|
||||
if (!res) {
|
||||
/* The return values are in $0 and $20. */
|
||||
current_pt_regs()->r20 = fd[1];
|
||||
res = fd[0];
|
||||
}
|
||||
return res;
|
||||
}
|
||||
|
||||
SYSCALL_DEFINE1(sethae, unsigned long, val)
|
||||
{
|
||||
current_pt_regs()->hae = val;
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -455,3 +455,22 @@ get_wchan(struct task_struct *p)
|
|||
}
|
||||
return pc;
|
||||
}
|
||||
|
||||
int kernel_execve(const char *path, const char *const argv[], const char *const envp[])
|
||||
{
|
||||
/* Avoid the HAE being gratuitously wrong, which would cause us
|
||||
to do the whole turn off interrupts thing and restore it. */
|
||||
struct pt_regs regs = {.hae = alpha_mv.hae_cache};
|
||||
int err = do_execve(path, argv, envp, ®s);
|
||||
if (!err) {
|
||||
struct pt_regs *p = current_pt_regs();
|
||||
/* copy regs to normal position and off to userland we go... */
|
||||
*p = regs;
|
||||
__asm__ __volatile__ (
|
||||
"mov %0, $sp;"
|
||||
"br $31, ret_from_sys_call"
|
||||
: : "r"(p));
|
||||
}
|
||||
return err;
|
||||
}
|
||||
EXPORT_SYMBOL(kernel_execve);
|
||||
|
|
|
|||
|
|
@ -111,7 +111,7 @@ sys_call_table:
|
|||
.quad sys_socket
|
||||
.quad sys_connect
|
||||
.quad sys_accept
|
||||
.quad osf_getpriority /* 100 */
|
||||
.quad sys_osf_getpriority /* 100 */
|
||||
.quad sys_send
|
||||
.quad sys_recv
|
||||
.quad sys_sigreturn
|
||||
|
|
@ -522,6 +522,8 @@ sys_call_table:
|
|||
.quad sys_setns
|
||||
.quad sys_accept4
|
||||
.quad sys_sendmmsg
|
||||
.quad sys_process_vm_readv
|
||||
.quad sys_process_vm_writev /* 505 */
|
||||
|
||||
.size sys_call_table, . - sys_call_table
|
||||
.type sys_call_table, @object
|
||||
|
|
|
|||
|
|
@ -31,8 +31,6 @@ lib-y = __divqu.o __remqu.o __divlu.o __remlu.o \
|
|||
$(ev6-y)memchr.o \
|
||||
$(ev6-y)copy_user.o \
|
||||
$(ev6-y)clear_user.o \
|
||||
$(ev6-y)strncpy_from_user.o \
|
||||
$(ev67-y)strlen_user.o \
|
||||
$(ev6-y)csum_ipv6_magic.o \
|
||||
$(ev6-y)clear_page.o \
|
||||
$(ev6-y)copy_page.o \
|
||||
|
|
|
|||
|
|
@ -1,424 +0,0 @@
|
|||
/*
|
||||
* arch/alpha/lib/ev6-strncpy_from_user.S
|
||||
* 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com>
|
||||
*
|
||||
* Just like strncpy except in the return value:
|
||||
*
|
||||
* -EFAULT if an exception occurs before the terminator is copied.
|
||||
* N if the buffer filled.
|
||||
*
|
||||
* Otherwise the length of the string is returned.
|
||||
*
|
||||
* Much of the information about 21264 scheduling/coding comes from:
|
||||
* Compiler Writer's Guide for the Alpha 21264
|
||||
* abbreviated as 'CWG' in other comments here
|
||||
* ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
|
||||
* Scheduling notation:
|
||||
* E - either cluster
|
||||
* U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
|
||||
* L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
|
||||
* A bunch of instructions got moved and temp registers were changed
|
||||
* to aid in scheduling. Control flow was also re-arranged to eliminate
|
||||
* branches, and to provide longer code sequences to enable better scheduling.
|
||||
* A total rewrite (using byte load/stores for start & tail sequences)
|
||||
* is desirable, but very difficult to do without a from-scratch rewrite.
|
||||
* Save that for the future.
|
||||
*/
|
||||
|
||||
|
||||
#include <asm/errno.h>
|
||||
#include <asm/regdef.h>
|
||||
|
||||
|
||||
/* Allow an exception for an insn; exit if we get one. */
|
||||
#define EX(x,y...) \
|
||||
99: x,##y; \
|
||||
.section __ex_table,"a"; \
|
||||
.long 99b - .; \
|
||||
lda $31, $exception-99b($0); \
|
||||
.previous
|
||||
|
||||
|
||||
.set noat
|
||||
.set noreorder
|
||||
.text
|
||||
|
||||
.globl __strncpy_from_user
|
||||
.ent __strncpy_from_user
|
||||
.frame $30, 0, $26
|
||||
.prologue 0
|
||||
|
||||
.align 4
|
||||
__strncpy_from_user:
|
||||
and a0, 7, t3 # E : find dest misalignment
|
||||
beq a2, $zerolength # U :
|
||||
|
||||
/* Are source and destination co-aligned? */
|
||||
mov a0, v0 # E : save the string start
|
||||
xor a0, a1, t4 # E :
|
||||
EX( ldq_u t1, 0(a1) ) # L : Latency=3 load first quadword
|
||||
ldq_u t0, 0(a0) # L : load first (partial) aligned dest quadword
|
||||
|
||||
addq a2, t3, a2 # E : bias count by dest misalignment
|
||||
subq a2, 1, a3 # E :
|
||||
addq zero, 1, t10 # E :
|
||||
and t4, 7, t4 # E : misalignment between the two
|
||||
|
||||
and a3, 7, t6 # E : number of tail bytes
|
||||
sll t10, t6, t10 # E : t10 = bitmask of last count byte
|
||||
bne t4, $unaligned # U :
|
||||
lda t2, -1 # E : build a mask against false zero
|
||||
|
||||
/*
|
||||
* We are co-aligned; take care of a partial first word.
|
||||
* On entry to this basic block:
|
||||
* t0 == the first destination word for masking back in
|
||||
* t1 == the first source word.
|
||||
*/
|
||||
|
||||
srl a3, 3, a2 # E : a2 = loop counter = (count - 1)/8
|
||||
addq a1, 8, a1 # E :
|
||||
mskqh t2, a1, t2 # U : detection in the src word
|
||||
nop
|
||||
|
||||
/* Create the 1st output word and detect 0's in the 1st input word. */
|
||||
mskqh t1, a1, t3 # U :
|
||||
mskql t0, a1, t0 # U : assemble the first output word
|
||||
ornot t1, t2, t2 # E :
|
||||
nop
|
||||
|
||||
cmpbge zero, t2, t8 # E : bits set iff null found
|
||||
or t0, t3, t0 # E :
|
||||
beq a2, $a_eoc # U :
|
||||
bne t8, $a_eos # U : 2nd branch in a quad. Bad.
|
||||
|
||||
/* On entry to this basic block:
|
||||
* t0 == a source quad not containing a null.
|
||||
* a0 - current aligned destination address
|
||||
* a1 - current aligned source address
|
||||
* a2 - count of quadwords to move.
|
||||
* NOTE: Loop improvement - unrolling this is going to be
|
||||
* a huge win, since we're going to stall otherwise.
|
||||
* Fix this later. For _really_ large copies, look
|
||||
* at using wh64 on a look-ahead basis. See the code
|
||||
* in clear_user.S and copy_user.S.
|
||||
* Presumably, since (a0) and (a1) do not overlap (by C definition)
|
||||
* Lots of nops here:
|
||||
* - Separate loads from stores
|
||||
* - Keep it to 1 branch/quadpack so the branch predictor
|
||||
* can train.
|
||||
*/
|
||||
$a_loop:
|
||||
stq_u t0, 0(a0) # L :
|
||||
addq a0, 8, a0 # E :
|
||||
nop
|
||||
subq a2, 1, a2 # E :
|
||||
|
||||
EX( ldq_u t0, 0(a1) ) # L :
|
||||
addq a1, 8, a1 # E :
|
||||
cmpbge zero, t0, t8 # E : Stall 2 cycles on t0
|
||||
beq a2, $a_eoc # U :
|
||||
|
||||
beq t8, $a_loop # U :
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
|
||||
/* Take care of the final (partial) word store. At this point
|
||||
* the end-of-count bit is set in t8 iff it applies.
|
||||
*
|
||||
* On entry to this basic block we have:
|
||||
* t0 == the source word containing the null
|
||||
* t8 == the cmpbge mask that found it.
|
||||
*/
|
||||
$a_eos:
|
||||
negq t8, t12 # E : find low bit set
|
||||
and t8, t12, t12 # E :
|
||||
|
||||
/* We're doing a partial word store and so need to combine
|
||||
our source and original destination words. */
|
||||
ldq_u t1, 0(a0) # L :
|
||||
subq t12, 1, t6 # E :
|
||||
|
||||
or t12, t6, t8 # E :
|
||||
zapnot t0, t8, t0 # U : clear src bytes > null
|
||||
zap t1, t8, t1 # U : clear dst bytes <= null
|
||||
or t0, t1, t0 # E :
|
||||
|
||||
stq_u t0, 0(a0) # L :
|
||||
br $finish_up # L0 :
|
||||
nop
|
||||
nop
|
||||
|
||||
/* Add the end-of-count bit to the eos detection bitmask. */
|
||||
.align 4
|
||||
$a_eoc:
|
||||
or t10, t8, t8
|
||||
br $a_eos
|
||||
nop
|
||||
nop
|
||||
|
||||
|
||||
/* The source and destination are not co-aligned. Align the destination
|
||||
and cope. We have to be very careful about not reading too much and
|
||||
causing a SEGV. */
|
||||
|
||||
.align 4
|
||||
$u_head:
|
||||
/* We know just enough now to be able to assemble the first
|
||||
full source word. We can still find a zero at the end of it
|
||||
that prevents us from outputting the whole thing.
|
||||
|
||||
On entry to this basic block:
|
||||
t0 == the first dest word, unmasked
|
||||
t1 == the shifted low bits of the first source word
|
||||
t6 == bytemask that is -1 in dest word bytes */
|
||||
|
||||
EX( ldq_u t2, 8(a1) ) # L : load second src word
|
||||
addq a1, 8, a1 # E :
|
||||
mskql t0, a0, t0 # U : mask trailing garbage in dst
|
||||
extqh t2, a1, t4 # U :
|
||||
|
||||
or t1, t4, t1 # E : first aligned src word complete
|
||||
mskqh t1, a0, t1 # U : mask leading garbage in src
|
||||
or t0, t1, t0 # E : first output word complete
|
||||
or t0, t6, t6 # E : mask original data for zero test
|
||||
|
||||
cmpbge zero, t6, t8 # E :
|
||||
beq a2, $u_eocfin # U :
|
||||
bne t8, $u_final # U : bad news - 2nd branch in a quad
|
||||
lda t6, -1 # E : mask out the bits we have
|
||||
|
||||
mskql t6, a1, t6 # U : already seen
|
||||
stq_u t0, 0(a0) # L : store first output word
|
||||
or t6, t2, t2 # E :
|
||||
cmpbge zero, t2, t8 # E : find nulls in second partial
|
||||
|
||||
addq a0, 8, a0 # E :
|
||||
subq a2, 1, a2 # E :
|
||||
bne t8, $u_late_head_exit # U :
|
||||
nop
|
||||
|
||||
/* Finally, we've got all the stupid leading edge cases taken care
|
||||
of and we can set up to enter the main loop. */
|
||||
|
||||
extql t2, a1, t1 # U : position hi-bits of lo word
|
||||
EX( ldq_u t2, 8(a1) ) # L : read next high-order source word
|
||||
addq a1, 8, a1 # E :
|
||||
cmpbge zero, t2, t8 # E :
|
||||
|
||||
beq a2, $u_eoc # U :
|
||||
bne t8, $u_eos # U :
|
||||
nop
|
||||
nop
|
||||
|
||||
/* Unaligned copy main loop. In order to avoid reading too much,
|
||||
the loop is structured to detect zeros in aligned source words.
|
||||
This has, unfortunately, effectively pulled half of a loop
|
||||
iteration out into the head and half into the tail, but it does
|
||||
prevent nastiness from accumulating in the very thing we want
|
||||
to run as fast as possible.
|
||||
|
||||
On entry to this basic block:
|
||||
t1 == the shifted high-order bits from the previous source word
|
||||
t2 == the unshifted current source word
|
||||
|
||||
We further know that t2 does not contain a null terminator. */
|
||||
|
||||
/*
|
||||
* Extra nops here:
|
||||
* separate load quads from store quads
|
||||
* only one branch/quad to permit predictor training
|
||||
*/
|
||||
|
||||
.align 4
|
||||
$u_loop:
|
||||
extqh t2, a1, t0 # U : extract high bits for current word
|
||||
addq a1, 8, a1 # E :
|
||||
extql t2, a1, t3 # U : extract low bits for next time
|
||||
addq a0, 8, a0 # E :
|
||||
|
||||
or t0, t1, t0 # E : current dst word now complete
|
||||
EX( ldq_u t2, 0(a1) ) # L : load high word for next time
|
||||
subq a2, 1, a2 # E :
|
||||
nop
|
||||
|
||||
stq_u t0, -8(a0) # L : save the current word
|
||||
mov t3, t1 # E :
|
||||
cmpbge zero, t2, t8 # E : test new word for eos
|
||||
beq a2, $u_eoc # U :
|
||||
|
||||
beq t8, $u_loop # U :
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
|
||||
/* We've found a zero somewhere in the source word we just read.
|
||||
If it resides in the lower half, we have one (probably partial)
|
||||
word to write out, and if it resides in the upper half, we
|
||||
have one full and one partial word left to write out.
|
||||
|
||||
On entry to this basic block:
|
||||
t1 == the shifted high-order bits from the previous source word
|
||||
t2 == the unshifted current source word. */
|
||||
.align 4
|
||||
$u_eos:
|
||||
extqh t2, a1, t0 # U :
|
||||
or t0, t1, t0 # E : first (partial) source word complete
|
||||
cmpbge zero, t0, t8 # E : is the null in this first bit?
|
||||
nop
|
||||
|
||||
bne t8, $u_final # U :
|
||||
stq_u t0, 0(a0) # L : the null was in the high-order bits
|
||||
addq a0, 8, a0 # E :
|
||||
subq a2, 1, a2 # E :
|
||||
|
||||
.align 4
|
||||
$u_late_head_exit:
|
||||
extql t2, a1, t0 # U :
|
||||
cmpbge zero, t0, t8 # E :
|
||||
or t8, t10, t6 # E :
|
||||
cmoveq a2, t6, t8 # E :
|
||||
|
||||
/* Take care of a final (probably partial) result word.
|
||||
On entry to this basic block:
|
||||
t0 == assembled source word
|
||||
t8 == cmpbge mask that found the null. */
|
||||
.align 4
|
||||
$u_final:
|
||||
negq t8, t6 # E : isolate low bit set
|
||||
and t6, t8, t12 # E :
|
||||
ldq_u t1, 0(a0) # L :
|
||||
subq t12, 1, t6 # E :
|
||||
|
||||
or t6, t12, t8 # E :
|
||||
zapnot t0, t8, t0 # U : kill source bytes > null
|
||||
zap t1, t8, t1 # U : kill dest bytes <= null
|
||||
or t0, t1, t0 # E :
|
||||
|
||||
stq_u t0, 0(a0) # E :
|
||||
br $finish_up # U :
|
||||
nop
|
||||
nop
|
||||
|
||||
.align 4
|
||||
$u_eoc: # end-of-count
|
||||
extqh t2, a1, t0 # U :
|
||||
or t0, t1, t0 # E :
|
||||
cmpbge zero, t0, t8 # E :
|
||||
nop
|
||||
|
||||
.align 4
|
||||
$u_eocfin: # end-of-count, final word
|
||||
or t10, t8, t8 # E :
|
||||
br $u_final # U :
|
||||
nop
|
||||
nop
|
||||
|
||||
/* Unaligned copy entry point. */
|
||||
.align 4
|
||||
$unaligned:
|
||||
|
||||
srl a3, 3, a2 # U : a2 = loop counter = (count - 1)/8
|
||||
and a0, 7, t4 # E : find dest misalignment
|
||||
and a1, 7, t5 # E : find src misalignment
|
||||
mov zero, t0 # E :
|
||||
|
||||
/* Conditionally load the first destination word and a bytemask
|
||||
with 0xff indicating that the destination byte is sacrosanct. */
|
||||
|
||||
mov zero, t6 # E :
|
||||
beq t4, 1f # U :
|
||||
ldq_u t0, 0(a0) # L :
|
||||
lda t6, -1 # E :
|
||||
|
||||
mskql t6, a0, t6 # E :
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
|
||||
.align 4
|
||||
1:
|
||||
subq a1, t4, a1 # E : sub dest misalignment from src addr
|
||||
/* If source misalignment is larger than dest misalignment, we need
|
||||
extra startup checks to avoid SEGV. */
|
||||
cmplt t4, t5, t12 # E :
|
||||
extql t1, a1, t1 # U : shift src into place
|
||||
lda t2, -1 # E : for creating masks later
|
||||
|
||||
beq t12, $u_head # U :
|
||||
mskqh t2, t5, t2 # U : begin src byte validity mask
|
||||
cmpbge zero, t1, t8 # E : is there a zero?
|
||||
nop
|
||||
|
||||
extql t2, a1, t2 # U :
|
||||
or t8, t10, t5 # E : test for end-of-count too
|
||||
cmpbge zero, t2, t3 # E :
|
||||
cmoveq a2, t5, t8 # E : Latency=2, extra map slot
|
||||
|
||||
nop # E : goes with cmov
|
||||
andnot t8, t3, t8 # E :
|
||||
beq t8, $u_head # U :
|
||||
nop
|
||||
|
||||
/* At this point we've found a zero in the first partial word of
|
||||
the source. We need to isolate the valid source data and mask
|
||||
it into the original destination data. (Incidentally, we know
|
||||
that we'll need at least one byte of that original dest word.) */
|
||||
|
||||
ldq_u t0, 0(a0) # L :
|
||||
negq t8, t6 # E : build bitmask of bytes <= zero
|
||||
mskqh t1, t4, t1 # U :
|
||||
and t6, t8, t12 # E :
|
||||
|
||||
subq t12, 1, t6 # E :
|
||||
or t6, t12, t8 # E :
|
||||
zapnot t2, t8, t2 # U : prepare source word; mirror changes
|
||||
zapnot t1, t8, t1 # U : to source validity mask
|
||||
|
||||
andnot t0, t2, t0 # E : zero place for source to reside
|
||||
or t0, t1, t0 # E : and put it there
|
||||
stq_u t0, 0(a0) # L :
|
||||
nop
|
||||
|
||||
.align 4
|
||||
$finish_up:
|
||||
zapnot t0, t12, t4 # U : was last byte written null?
|
||||
and t12, 0xf0, t3 # E : binary search for the address of the
|
||||
cmovne t4, 1, t4 # E : Latency=2, extra map slot
|
||||
nop # E : with cmovne
|
||||
|
||||
and t12, 0xcc, t2 # E : last byte written
|
||||
and t12, 0xaa, t1 # E :
|
||||
cmovne t3, 4, t3 # E : Latency=2, extra map slot
|
||||
nop # E : with cmovne
|
||||
|
||||
bic a0, 7, t0
|
||||
cmovne t2, 2, t2 # E : Latency=2, extra map slot
|
||||
nop # E : with cmovne
|
||||
nop
|
||||
|
||||
cmovne t1, 1, t1 # E : Latency=2, extra map slot
|
||||
nop # E : with cmovne
|
||||
addq t0, t3, t0 # E :
|
||||
addq t1, t2, t1 # E :
|
||||
|
||||
addq t0, t1, t0 # E :
|
||||
addq t0, t4, t0 # add one if we filled the buffer
|
||||
subq t0, v0, v0 # find string length
|
||||
ret # L0 :
|
||||
|
||||
.align 4
|
||||
$zerolength:
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
clr v0
|
||||
|
||||
$exception:
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
ret
|
||||
|
||||
.end __strncpy_from_user
|
||||
|
|
@ -1,107 +0,0 @@
|
|||
/*
|
||||
* arch/alpha/lib/ev67-strlen_user.S
|
||||
* 21264 version contributed by Rick Gorton <rick.gorton@api-networks.com>
|
||||
*
|
||||
* Return the length of the string including the NULL terminator
|
||||
* (strlen+1) or zero if an error occurred.
|
||||
*
|
||||
* In places where it is critical to limit the processing time,
|
||||
* and the data is not trusted, strnlen_user() should be used.
|
||||
* It will return a value greater than its second argument if
|
||||
* that limit would be exceeded. This implementation is allowed
|
||||
* to access memory beyond the limit, but will not cross a page
|
||||
* boundary when doing so.
|
||||
*
|
||||
* Much of the information about 21264 scheduling/coding comes from:
|
||||
* Compiler Writer's Guide for the Alpha 21264
|
||||
* abbreviated as 'CWG' in other comments here
|
||||
* ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
|
||||
* Scheduling notation:
|
||||
* E - either cluster
|
||||
* U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
|
||||
* L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
|
||||
* Try not to change the actual algorithm if possible for consistency.
|
||||
*/
|
||||
|
||||
#include <asm/regdef.h>
|
||||
|
||||
|
||||
/* Allow an exception for an insn; exit if we get one. */
|
||||
#define EX(x,y...) \
|
||||
99: x,##y; \
|
||||
.section __ex_table,"a"; \
|
||||
.long 99b - .; \
|
||||
lda v0, $exception-99b(zero); \
|
||||
.previous
|
||||
|
||||
|
||||
.set noreorder
|
||||
.set noat
|
||||
.text
|
||||
|
||||
.globl __strlen_user
|
||||
.ent __strlen_user
|
||||
.frame sp, 0, ra
|
||||
|
||||
.align 4
|
||||
__strlen_user:
|
||||
ldah a1, 32767(zero) # do not use plain strlen_user() for strings
|
||||
# that might be almost 2 GB long; you should
|
||||
# be using strnlen_user() instead
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
|
||||
.globl __strnlen_user
|
||||
|
||||
.align 4
|
||||
__strnlen_user:
|
||||
.prologue 0
|
||||
EX( ldq_u t0, 0(a0) ) # L : load first quadword (a0 may be misaligned)
|
||||
lda t1, -1(zero) # E :
|
||||
|
||||
insqh t1, a0, t1 # U :
|
||||
andnot a0, 7, v0 # E :
|
||||
or t1, t0, t0 # E :
|
||||
subq a0, 1, a0 # E : get our +1 for the return
|
||||
|
||||
cmpbge zero, t0, t1 # E : t1 <- bitmask: bit i == 1 <==> i-th byte == 0
|
||||
subq a1, 7, t2 # E :
|
||||
subq a0, v0, t0 # E :
|
||||
bne t1, $found # U :
|
||||
|
||||
addq t2, t0, t2 # E :
|
||||
addq a1, 1, a1 # E :
|
||||
nop # E :
|
||||
nop # E :
|
||||
|
||||
.align 4
|
||||
$loop: ble t2, $limit # U :
|
||||
EX( ldq t0, 8(v0) ) # L :
|
||||
nop # E :
|
||||
nop # E :
|
||||
|
||||
cmpbge zero, t0, t1 # E :
|
||||
subq t2, 8, t2 # E :
|
||||
addq v0, 8, v0 # E : addr += 8
|
||||
beq t1, $loop # U :
|
||||
|
||||
$found: cttz t1, t2 # U0 :
|
||||
addq v0, t2, v0 # E :
|
||||
subq v0, a0, v0 # E :
|
||||
ret # L0 :
|
||||
|
||||
$exception:
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
ret
|
||||
|
||||
.align 4 # currently redundant
|
||||
$limit:
|
||||
nop
|
||||
nop
|
||||
subq a1, t2, v0
|
||||
ret
|
||||
|
||||
.end __strlen_user
|
||||
|
|
@ -1,91 +0,0 @@
|
|||
/*
|
||||
* arch/alpha/lib/strlen_user.S
|
||||
*
|
||||
* Return the length of the string including the NUL terminator
|
||||
* (strlen+1) or zero if an error occurred.
|
||||
*
|
||||
* In places where it is critical to limit the processing time,
|
||||
* and the data is not trusted, strnlen_user() should be used.
|
||||
* It will return a value greater than its second argument if
|
||||
* that limit would be exceeded. This implementation is allowed
|
||||
* to access memory beyond the limit, but will not cross a page
|
||||
* boundary when doing so.
|
||||
*/
|
||||
|
||||
#include <asm/regdef.h>
|
||||
|
||||
|
||||
/* Allow an exception for an insn; exit if we get one. */
|
||||
#define EX(x,y...) \
|
||||
99: x,##y; \
|
||||
.section __ex_table,"a"; \
|
||||
.long 99b - .; \
|
||||
lda v0, $exception-99b(zero); \
|
||||
.previous
|
||||
|
||||
|
||||
.set noreorder
|
||||
.set noat
|
||||
.text
|
||||
|
||||
.globl __strlen_user
|
||||
.ent __strlen_user
|
||||
.frame sp, 0, ra
|
||||
|
||||
.align 3
|
||||
__strlen_user:
|
||||
ldah a1, 32767(zero) # do not use plain strlen_user() for strings
|
||||
# that might be almost 2 GB long; you should
|
||||
# be using strnlen_user() instead
|
||||
|
||||
.globl __strnlen_user
|
||||
|
||||
.align 3
|
||||
__strnlen_user:
|
||||
.prologue 0
|
||||
|
||||
EX( ldq_u t0, 0(a0) ) # load first quadword (a0 may be misaligned)
|
||||
lda t1, -1(zero)
|
||||
insqh t1, a0, t1
|
||||
andnot a0, 7, v0
|
||||
or t1, t0, t0
|
||||
subq a0, 1, a0 # get our +1 for the return
|
||||
cmpbge zero, t0, t1 # t1 <- bitmask: bit i == 1 <==> i-th byte == 0
|
||||
subq a1, 7, t2
|
||||
subq a0, v0, t0
|
||||
bne t1, $found
|
||||
|
||||
addq t2, t0, t2
|
||||
addq a1, 1, a1
|
||||
|
||||
.align 3
|
||||
$loop: ble t2, $limit
|
||||
EX( ldq t0, 8(v0) )
|
||||
subq t2, 8, t2
|
||||
addq v0, 8, v0 # addr += 8
|
||||
cmpbge zero, t0, t1
|
||||
beq t1, $loop
|
||||
|
||||
$found: negq t1, t2 # clear all but least set bit
|
||||
and t1, t2, t1
|
||||
|
||||
and t1, 0xf0, t2 # binary search for that set bit
|
||||
and t1, 0xcc, t3
|
||||
and t1, 0xaa, t4
|
||||
cmovne t2, 4, t2
|
||||
cmovne t3, 2, t3
|
||||
cmovne t4, 1, t4
|
||||
addq t2, t3, t2
|
||||
addq v0, t4, v0
|
||||
addq v0, t2, v0
|
||||
nop # dual issue next two on ev4 and ev5
|
||||
subq v0, a0, v0
|
||||
$exception:
|
||||
ret
|
||||
|
||||
.align 3 # currently redundant
|
||||
$limit:
|
||||
subq a1, t2, v0
|
||||
ret
|
||||
|
||||
.end __strlen_user
|
||||
|
|
@ -1,339 +0,0 @@
|
|||
/*
|
||||
* arch/alpha/lib/strncpy_from_user.S
|
||||
* Contributed by Richard Henderson (rth@tamu.edu)
|
||||
*
|
||||
* Just like strncpy except in the return value:
|
||||
*
|
||||
* -EFAULT if an exception occurs before the terminator is copied.
|
||||
* N if the buffer filled.
|
||||
*
|
||||
* Otherwise the length of the string is returned.
|
||||
*/
|
||||
|
||||
|
||||
#include <asm/errno.h>
|
||||
#include <asm/regdef.h>
|
||||
|
||||
|
||||
/* Allow an exception for an insn; exit if we get one. */
|
||||
#define EX(x,y...) \
|
||||
99: x,##y; \
|
||||
.section __ex_table,"a"; \
|
||||
.long 99b - .; \
|
||||
lda $31, $exception-99b($0); \
|
||||
.previous
|
||||
|
||||
|
||||
.set noat
|
||||
.set noreorder
|
||||
.text
|
||||
|
||||
.globl __strncpy_from_user
|
||||
.ent __strncpy_from_user
|
||||
.frame $30, 0, $26
|
||||
.prologue 0
|
||||
|
||||
.align 3
|
||||
$aligned:
|
||||
/* On entry to this basic block:
|
||||
t0 == the first destination word for masking back in
|
||||
t1 == the first source word. */
|
||||
|
||||
/* Create the 1st output word and detect 0's in the 1st input word. */
|
||||
lda t2, -1 # e1 : build a mask against false zero
|
||||
mskqh t2, a1, t2 # e0 : detection in the src word
|
||||
mskqh t1, a1, t3 # e0 :
|
||||
ornot t1, t2, t2 # .. e1 :
|
||||
mskql t0, a1, t0 # e0 : assemble the first output word
|
||||
cmpbge zero, t2, t8 # .. e1 : bits set iff null found
|
||||
or t0, t3, t0 # e0 :
|
||||
beq a2, $a_eoc # .. e1 :
|
||||
bne t8, $a_eos # .. e1 :
|
||||
|
||||
/* On entry to this basic block:
|
||||
t0 == a source word not containing a null. */
|
||||
|
||||
$a_loop:
|
||||
stq_u t0, 0(a0) # e0 :
|
||||
addq a0, 8, a0 # .. e1 :
|
||||
EX( ldq_u t0, 0(a1) ) # e0 :
|
||||
addq a1, 8, a1 # .. e1 :
|
||||
subq a2, 1, a2 # e0 :
|
||||
cmpbge zero, t0, t8 # .. e1 (stall)
|
||||
beq a2, $a_eoc # e1 :
|
||||
beq t8, $a_loop # e1 :
|
||||
|
||||
/* Take care of the final (partial) word store. At this point
|
||||
the end-of-count bit is set in t8 iff it applies.
|
||||
|
||||
On entry to this basic block we have:
|
||||
t0 == the source word containing the null
|
||||
t8 == the cmpbge mask that found it. */
|
||||
|
||||
$a_eos:
|
||||
negq t8, t12 # e0 : find low bit set
|
||||
and t8, t12, t12 # e1 (stall)
|
||||
|
||||
/* For the sake of the cache, don't read a destination word
|
||||
if we're not going to need it. */
|
||||
and t12, 0x80, t6 # e0 :
|
||||
bne t6, 1f # .. e1 (zdb)
|
||||
|
||||
/* We're doing a partial word store and so need to combine
|
||||
our source and original destination words. */
|
||||
ldq_u t1, 0(a0) # e0 :
|
||||
subq t12, 1, t6 # .. e1 :
|
||||
or t12, t6, t8 # e0 :
|
||||
unop #
|
||||
zapnot t0, t8, t0 # e0 : clear src bytes > null
|
||||
zap t1, t8, t1 # .. e1 : clear dst bytes <= null
|
||||
or t0, t1, t0 # e1 :
|
||||
|
||||
1: stq_u t0, 0(a0)
|
||||
br $finish_up
|
||||
|
||||
/* Add the end-of-count bit to the eos detection bitmask. */
|
||||
$a_eoc:
|
||||
or t10, t8, t8
|
||||
br $a_eos
|
||||
|
||||
/*** The Function Entry Point ***/
|
||||
.align 3
|
||||
__strncpy_from_user:
|
||||
mov a0, v0 # save the string start
|
||||
beq a2, $zerolength
|
||||
|
||||
/* Are source and destination co-aligned? */
|
||||
xor a0, a1, t1 # e0 :
|
||||
and a0, 7, t0 # .. e1 : find dest misalignment
|
||||
and t1, 7, t1 # e0 :
|
||||
addq a2, t0, a2 # .. e1 : bias count by dest misalignment
|
||||
subq a2, 1, a2 # e0 :
|
||||
and a2, 7, t2 # e1 :
|
||||
srl a2, 3, a2 # e0 : a2 = loop counter = (count - 1)/8
|
||||
addq zero, 1, t10 # .. e1 :
|
||||
sll t10, t2, t10 # e0 : t10 = bitmask of last count byte
|
||||
bne t1, $unaligned # .. e1 :
|
||||
|
||||
/* We are co-aligned; take care of a partial first word. */
|
||||
|
||||
EX( ldq_u t1, 0(a1) ) # e0 : load first src word
|
||||
addq a1, 8, a1 # .. e1 :
|
||||
|
||||
beq t0, $aligned # avoid loading dest word if not needed
|
||||
ldq_u t0, 0(a0) # e0 :
|
||||
br $aligned # .. e1 :
|
||||
|
||||
|
||||
/* The source and destination are not co-aligned. Align the destination
|
||||
and cope. We have to be very careful about not reading too much and
|
||||
causing a SEGV. */
|
||||
|
||||
.align 3
|
||||
$u_head:
|
||||
/* We know just enough now to be able to assemble the first
|
||||
full source word. We can still find a zero at the end of it
|
||||
that prevents us from outputting the whole thing.
|
||||
|
||||
On entry to this basic block:
|
||||
t0 == the first dest word, unmasked
|
||||
t1 == the shifted low bits of the first source word
|
||||
t6 == bytemask that is -1 in dest word bytes */
|
||||
|
||||
EX( ldq_u t2, 8(a1) ) # e0 : load second src word
|
||||
addq a1, 8, a1 # .. e1 :
|
||||
mskql t0, a0, t0 # e0 : mask trailing garbage in dst
|
||||
extqh t2, a1, t4 # e0 :
|
||||
or t1, t4, t1 # e1 : first aligned src word complete
|
||||
mskqh t1, a0, t1 # e0 : mask leading garbage in src
|
||||
or t0, t1, t0 # e0 : first output word complete
|
||||
or t0, t6, t6 # e1 : mask original data for zero test
|
||||
cmpbge zero, t6, t8 # e0 :
|
||||
beq a2, $u_eocfin # .. e1 :
|
||||
bne t8, $u_final # e1 :
|
||||
|
||||
lda t6, -1 # e1 : mask out the bits we have
|
||||
mskql t6, a1, t6 # e0 : already seen
|
||||
stq_u t0, 0(a0) # e0 : store first output word
|
||||
or t6, t2, t2 # .. e1 :
|
||||
cmpbge zero, t2, t8 # e0 : find nulls in second partial
|
||||
addq a0, 8, a0 # .. e1 :
|
||||
subq a2, 1, a2 # e0 :
|
||||
bne t8, $u_late_head_exit # .. e1 :
|
||||
|
||||
/* Finally, we've got all the stupid leading edge cases taken care
|
||||
of and we can set up to enter the main loop. */
|
||||
|
||||
extql t2, a1, t1 # e0 : position hi-bits of lo word
|
||||
EX( ldq_u t2, 8(a1) ) # .. e1 : read next high-order source word
|
||||
addq a1, 8, a1 # e0 :
|
||||
cmpbge zero, t2, t8 # e1 (stall)
|
||||
beq a2, $u_eoc # e1 :
|
||||
bne t8, $u_eos # e1 :
|
||||
|
||||
/* Unaligned copy main loop. In order to avoid reading too much,
|
||||
the loop is structured to detect zeros in aligned source words.
|
||||
This has, unfortunately, effectively pulled half of a loop
|
||||
iteration out into the head and half into the tail, but it does
|
||||
prevent nastiness from accumulating in the very thing we want
|
||||
to run as fast as possible.
|
||||
|
||||
On entry to this basic block:
|
||||
t1 == the shifted high-order bits from the previous source word
|
||||
t2 == the unshifted current source word
|
||||
|
||||
We further know that t2 does not contain a null terminator. */
|
||||
|
||||
.align 3
|
||||
$u_loop:
|
||||
extqh t2, a1, t0 # e0 : extract high bits for current word
|
||||
addq a1, 8, a1 # .. e1 :
|
||||
extql t2, a1, t3 # e0 : extract low bits for next time
|
||||
addq a0, 8, a0 # .. e1 :
|
||||
or t0, t1, t0 # e0 : current dst word now complete
|
||||
EX( ldq_u t2, 0(a1) ) # .. e1 : load high word for next time
|
||||
stq_u t0, -8(a0) # e0 : save the current word
|
||||
mov t3, t1 # .. e1 :
|
||||
subq a2, 1, a2 # e0 :
|
||||
cmpbge zero, t2, t8 # .. e1 : test new word for eos
|
||||
beq a2, $u_eoc # e1 :
|
||||
beq t8, $u_loop # e1 :
|
||||
|
||||
/* We've found a zero somewhere in the source word we just read.
|
||||
If it resides in the lower half, we have one (probably partial)
|
||||
word to write out, and if it resides in the upper half, we
|
||||
have one full and one partial word left to write out.
|
||||
|
||||
On entry to this basic block:
|
||||
t1 == the shifted high-order bits from the previous source word
|
||||
t2 == the unshifted current source word. */
|
||||
$u_eos:
|
||||
extqh t2, a1, t0 # e0 :
|
||||
or t0, t1, t0 # e1 : first (partial) source word complete
|
||||
|
||||
cmpbge zero, t0, t8 # e0 : is the null in this first bit?
|
||||
bne t8, $u_final # .. e1 (zdb)
|
||||
|
||||
stq_u t0, 0(a0) # e0 : the null was in the high-order bits
|
||||
addq a0, 8, a0 # .. e1 :
|
||||
subq a2, 1, a2 # e1 :
|
||||
|
||||
$u_late_head_exit:
|
||||
extql t2, a1, t0 # .. e0 :
|
||||
cmpbge zero, t0, t8 # e0 :
|
||||
or t8, t10, t6 # e1 :
|
||||
cmoveq a2, t6, t8 # e0 :
|
||||
nop # .. e1 :
|
||||
|
||||
/* Take care of a final (probably partial) result word.
|
||||
On entry to this basic block:
|
||||
t0 == assembled source word
|
||||
t8 == cmpbge mask that found the null. */
|
||||
$u_final:
|
||||
negq t8, t6 # e0 : isolate low bit set
|
||||
and t6, t8, t12 # e1 :
|
||||
|
||||
and t12, 0x80, t6 # e0 : avoid dest word load if we can
|
||||
bne t6, 1f # .. e1 (zdb)
|
||||
|
||||
ldq_u t1, 0(a0) # e0 :
|
||||
subq t12, 1, t6 # .. e1 :
|
||||
or t6, t12, t8 # e0 :
|
||||
zapnot t0, t8, t0 # .. e1 : kill source bytes > null
|
||||
zap t1, t8, t1 # e0 : kill dest bytes <= null
|
||||
or t0, t1, t0 # e1 :
|
||||
|
||||
1: stq_u t0, 0(a0) # e0 :
|
||||
br $finish_up
|
||||
|
||||
$u_eoc: # end-of-count
|
||||
extqh t2, a1, t0
|
||||
or t0, t1, t0
|
||||
cmpbge zero, t0, t8
|
||||
|
||||
$u_eocfin: # end-of-count, final word
|
||||
or t10, t8, t8
|
||||
br $u_final
|
||||
|
||||
/* Unaligned copy entry point. */
|
||||
.align 3
|
||||
$unaligned:
|
||||
|
||||
EX( ldq_u t1, 0(a1) ) # e0 : load first source word
|
||||
|
||||
and a0, 7, t4 # .. e1 : find dest misalignment
|
||||
and a1, 7, t5 # e0 : find src misalignment
|
||||
|
||||
/* Conditionally load the first destination word and a bytemask
|
||||
with 0xff indicating that the destination byte is sacrosanct. */
|
||||
|
||||
mov zero, t0 # .. e1 :
|
||||
mov zero, t6 # e0 :
|
||||
beq t4, 1f # .. e1 :
|
||||
ldq_u t0, 0(a0) # e0 :
|
||||
lda t6, -1 # .. e1 :
|
||||
mskql t6, a0, t6 # e0 :
|
||||
1:
|
||||
subq a1, t4, a1 # .. e1 : sub dest misalignment from src addr
|
||||
|
||||
/* If source misalignment is larger than dest misalignment, we need
|
||||
extra startup checks to avoid SEGV. */
|
||||
|
||||
cmplt t4, t5, t12 # e1 :
|
||||
extql t1, a1, t1 # .. e0 : shift src into place
|
||||
lda t2, -1 # e0 : for creating masks later
|
||||
beq t12, $u_head # e1 :
|
||||
|
||||
mskqh t2, t5, t2 # e0 : begin src byte validity mask
|
||||
cmpbge zero, t1, t8 # .. e1 : is there a zero?
|
||||
extql t2, a1, t2 # e0 :
|
||||
or t8, t10, t5 # .. e1 : test for end-of-count too
|
||||
cmpbge zero, t2, t3 # e0 :
|
||||
cmoveq a2, t5, t8 # .. e1 :
|
||||
andnot t8, t3, t8 # e0 :
|
||||
beq t8, $u_head # .. e1 (zdb)
|
||||
|
||||
/* At this point we've found a zero in the first partial word of
|
||||
the source. We need to isolate the valid source data and mask
|
||||
it into the original destination data. (Incidentally, we know
|
||||
that we'll need at least one byte of that original dest word.) */
|
||||
|
||||
ldq_u t0, 0(a0) # e0 :
|
||||
negq t8, t6 # .. e1 : build bitmask of bytes <= zero
|
||||
mskqh t1, t4, t1 # e0 :
|
||||
and t6, t8, t12 # .. e1 :
|
||||
subq t12, 1, t6 # e0 :
|
||||
or t6, t12, t8 # e1 :
|
||||
|
||||
zapnot t2, t8, t2 # e0 : prepare source word; mirror changes
|
||||
zapnot t1, t8, t1 # .. e1 : to source validity mask
|
||||
|
||||
andnot t0, t2, t0 # e0 : zero place for source to reside
|
||||
or t0, t1, t0 # e1 : and put it there
|
||||
stq_u t0, 0(a0) # e0 :
|
||||
|
||||
$finish_up:
|
||||
zapnot t0, t12, t4 # was last byte written null?
|
||||
cmovne t4, 1, t4
|
||||
|
||||
and t12, 0xf0, t3 # binary search for the address of the
|
||||
and t12, 0xcc, t2 # last byte written
|
||||
and t12, 0xaa, t1
|
||||
bic a0, 7, t0
|
||||
cmovne t3, 4, t3
|
||||
cmovne t2, 2, t2
|
||||
cmovne t1, 1, t1
|
||||
addq t0, t3, t0
|
||||
addq t1, t2, t1
|
||||
addq t0, t1, t0
|
||||
addq t0, t4, t0 # add one if we filled the buffer
|
||||
|
||||
subq t0, v0, v0 # find string length
|
||||
ret
|
||||
|
||||
$zerolength:
|
||||
clr v0
|
||||
$exception:
|
||||
ret
|
||||
|
||||
.end __strncpy_from_user
|
||||
|
|
@ -89,6 +89,8 @@ do_page_fault(unsigned long address, unsigned long mmcsr,
|
|||
const struct exception_table_entry *fixup;
|
||||
int fault, si_code = SEGV_MAPERR;
|
||||
siginfo_t info;
|
||||
unsigned int flags = (FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |
|
||||
(cause > 0 ? FAULT_FLAG_WRITE : 0));
|
||||
|
||||
/* As of EV6, a load into $31/$f31 is a prefetch, and never faults
|
||||
(or is suppressed by the PALcode). Support that for older CPUs
|
||||
|
|
@ -114,6 +116,7 @@ do_page_fault(unsigned long address, unsigned long mmcsr,
|
|||
goto vmalloc_fault;
|
||||
#endif
|
||||
|
||||
retry:
|
||||
down_read(&mm->mmap_sem);
|
||||
vma = find_vma(mm, address);
|
||||
if (!vma)
|
||||
|
|
@ -144,8 +147,11 @@ do_page_fault(unsigned long address, unsigned long mmcsr,
|
|||
/* If for any reason at all we couldn't handle the fault,
|
||||
make sure we exit gracefully rather than endlessly redo
|
||||
the fault. */
|
||||
fault = handle_mm_fault(mm, vma, address, cause > 0 ? FAULT_FLAG_WRITE : 0);
|
||||
up_read(&mm->mmap_sem);
|
||||
fault = handle_mm_fault(mm, vma, address, flags);
|
||||
|
||||
if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
|
||||
return;
|
||||
|
||||
if (unlikely(fault & VM_FAULT_ERROR)) {
|
||||
if (fault & VM_FAULT_OOM)
|
||||
goto out_of_memory;
|
||||
|
|
@ -153,10 +159,26 @@ do_page_fault(unsigned long address, unsigned long mmcsr,
|
|||
goto do_sigbus;
|
||||
BUG();
|
||||
}
|
||||
if (fault & VM_FAULT_MAJOR)
|
||||
current->maj_flt++;
|
||||
else
|
||||
current->min_flt++;
|
||||
|
||||
if (flags & FAULT_FLAG_ALLOW_RETRY) {
|
||||
if (fault & VM_FAULT_MAJOR)
|
||||
current->maj_flt++;
|
||||
else
|
||||
current->min_flt++;
|
||||
if (fault & VM_FAULT_RETRY) {
|
||||
flags &= ~FAULT_FLAG_ALLOW_RETRY;
|
||||
|
||||
/* No need to up_read(&mm->mmap_sem) as we would
|
||||
* have already released it in __lock_page_or_retry
|
||||
* in mm/filemap.c.
|
||||
*/
|
||||
|
||||
goto retry;
|
||||
}
|
||||
}
|
||||
|
||||
up_read(&mm->mmap_sem);
|
||||
|
||||
return;
|
||||
|
||||
/* Something tried to access memory that isn't in our memory map.
|
||||
|
|
@ -186,12 +208,14 @@ do_page_fault(unsigned long address, unsigned long mmcsr,
|
|||
/* We ran out of memory, or some other thing happened to us that
|
||||
made us unable to handle the page fault gracefully. */
|
||||
out_of_memory:
|
||||
up_read(&mm->mmap_sem);
|
||||
if (!user_mode(regs))
|
||||
goto no_context;
|
||||
pagefault_out_of_memory();
|
||||
return;
|
||||
|
||||
do_sigbus:
|
||||
up_read(&mm->mmap_sem);
|
||||
/* Send a sigbus, regardless of whether we were in kernel
|
||||
or user mode. */
|
||||
info.si_signo = SIGBUS;
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@
|
|||
#include <linux/smp.h>
|
||||
#include <linux/errno.h>
|
||||
#include <asm/ptrace.h>
|
||||
#include <asm/special_insns.h>
|
||||
|
||||
#include "op_impl.h"
|
||||
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@ config ARM
|
|||
select HAVE_DMA_API_DEBUG
|
||||
select HAVE_IDE if PCI || ISA || PCMCIA
|
||||
select HAVE_DMA_ATTRS
|
||||
select HAVE_DMA_CONTIGUOUS if (CPU_V6 || CPU_V6K || CPU_V7)
|
||||
select HAVE_DMA_CONTIGUOUS if MMU
|
||||
select HAVE_MEMBLOCK
|
||||
select RTC_LIB
|
||||
select SYS_SUPPORTS_APM_EMULATION
|
||||
|
|
@ -16,6 +16,7 @@ config ARM
|
|||
select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
|
||||
select HAVE_ARCH_KGDB
|
||||
select HAVE_ARCH_TRACEHOOK
|
||||
select HAVE_SYSCALL_TRACEPOINTS
|
||||
select HAVE_KPROBES if !XIP_KERNEL
|
||||
select HAVE_KRETPROBES if (HAVE_KPROBES)
|
||||
select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
|
||||
|
|
@ -38,7 +39,6 @@ config ARM
|
|||
select HARDIRQS_SW_RESEND
|
||||
select GENERIC_IRQ_PROBE
|
||||
select GENERIC_IRQ_SHOW
|
||||
select GENERIC_IRQ_PROBE
|
||||
select ARCH_WANT_IPC_PARSE_VERSION
|
||||
select HARDIRQS_SW_RESEND
|
||||
select CPU_PM if (SUSPEND || CPU_IDLE)
|
||||
|
|
@ -126,11 +126,6 @@ config TRACE_IRQFLAGS_SUPPORT
|
|||
bool
|
||||
default y
|
||||
|
||||
config GENERIC_LOCKBREAK
|
||||
bool
|
||||
default y
|
||||
depends on SMP && PREEMPT
|
||||
|
||||
config RWSEM_GENERIC_SPINLOCK
|
||||
bool
|
||||
default y
|
||||
|
|
@ -1419,6 +1414,16 @@ config PL310_ERRATA_769419
|
|||
on systems with an outer cache, the store buffer is drained
|
||||
explicitly.
|
||||
|
||||
config ARM_ERRATA_775420
|
||||
bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
|
||||
depends on CPU_V7
|
||||
help
|
||||
This option enables the workaround for the 775420 Cortex-A9 (r2p2,
|
||||
r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
|
||||
operation aborts with MMU exception, it might cause the processor
|
||||
to deadlock. This workaround puts DSB before executing ISB if
|
||||
an abort may occur on cache maintenance.
|
||||
|
||||
endmenu
|
||||
|
||||
source "arch/arm/common/Kconfig"
|
||||
|
|
@ -1855,8 +1860,8 @@ config ALIGNMENT_TRAP
|
|||
configuration it is safe to say N, otherwise say Y.
|
||||
|
||||
config UACCESS_WITH_MEMCPY
|
||||
bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
|
||||
depends on MMU && EXPERIMENTAL
|
||||
bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
|
||||
depends on MMU
|
||||
default y if CPU_FEROCEON
|
||||
help
|
||||
Implement faster copy_to_user and clear_user methods for CPU
|
||||
|
|
@ -1897,12 +1902,6 @@ config CC_STACKPROTECTOR
|
|||
neutralized via a kernel panic.
|
||||
This feature requires gcc version 4.2 or above.
|
||||
|
||||
config DEPRECATED_PARAM_STRUCT
|
||||
bool "Provide old way to pass kernel parameters"
|
||||
help
|
||||
This was deprecated in 2001 and announced to live on for 5 years.
|
||||
Some old boot loaders still use this way.
|
||||
|
||||
endmenu
|
||||
|
||||
menu "Boot options"
|
||||
|
|
@ -1915,6 +1914,23 @@ config USE_OF
|
|||
help
|
||||
Include support for flattened device tree machine descriptions.
|
||||
|
||||
config ATAGS
|
||||
bool "Support for the traditional ATAGS boot data passing" if USE_OF
|
||||
default y
|
||||
help
|
||||
This is the traditional way of passing data to the kernel at boot
|
||||
time. If you are solely relying on the flattened device tree (or
|
||||
the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
|
||||
to remove ATAGS support from your kernel binary. If unsure,
|
||||
leave this to y.
|
||||
|
||||
config DEPRECATED_PARAM_STRUCT
|
||||
bool "Provide old way to pass kernel parameters"
|
||||
depends on ATAGS
|
||||
help
|
||||
This was deprecated in 2001 and announced to live on for 5 years.
|
||||
Some old boot loaders still use this way.
|
||||
|
||||
# Compressed boot loader in ROM. Yes, we really want to ask about
|
||||
# TEXT and BSS so we preserve their values in the config files.
|
||||
config ZBOOT_ROM_TEXT
|
||||
|
|
@ -2041,6 +2057,7 @@ config CMDLINE
|
|||
choice
|
||||
prompt "Kernel command line type" if CMDLINE != ""
|
||||
default CMDLINE_FROM_BOOTLOADER
|
||||
depends on ATAGS
|
||||
|
||||
config CMDLINE_FROM_BOOTLOADER
|
||||
bool "Use bootloader kernel arguments if available"
|
||||
|
|
@ -2110,7 +2127,7 @@ config KEXEC
|
|||
|
||||
config ATAGS_PROC
|
||||
bool "Export atags in procfs"
|
||||
depends on KEXEC
|
||||
depends on ATAGS && KEXEC
|
||||
default y
|
||||
help
|
||||
Should the atags used to boot the kernel be exported in an "atags"
|
||||
|
|
@ -2150,6 +2167,7 @@ source "drivers/cpufreq/Kconfig"
|
|||
config CPU_FREQ_IMX
|
||||
tristate "CPUfreq driver for i.MX CPUs"
|
||||
depends on ARCH_MXC && CPU_FREQ
|
||||
select CPU_FREQ_TABLE
|
||||
help
|
||||
This enables the CPUfreq driver for i.MX CPUs.
|
||||
|
||||
|
|
|
|||
|
|
@ -356,15 +356,15 @@ choice
|
|||
is nothing connected to read from the DCC.
|
||||
|
||||
config DEBUG_SEMIHOSTING
|
||||
bool "Kernel low-level debug output via semihosting I"
|
||||
bool "Kernel low-level debug output via semihosting I/O"
|
||||
help
|
||||
Semihosting enables code running on an ARM target to use
|
||||
the I/O facilities on a host debugger/emulator through a
|
||||
simple SVC calls. The host debugger or emulator must have
|
||||
simple SVC call. The host debugger or emulator must have
|
||||
semihosting enabled for the special svc call to be trapped
|
||||
otherwise the kernel will crash.
|
||||
|
||||
This is known to work with OpenOCD, as wellas
|
||||
This is known to work with OpenOCD, as well as
|
||||
ARM's Fast Models, or any other controlling environment
|
||||
that implements semihosting.
|
||||
|
||||
|
|
|
|||
|
|
@ -268,7 +268,12 @@ else
|
|||
KBUILD_IMAGE := zImage
|
||||
endif
|
||||
|
||||
all: $(KBUILD_IMAGE)
|
||||
# Build the DT binary blobs if we have OF configured
|
||||
ifeq ($(CONFIG_USE_OF),y)
|
||||
KBUILD_DTBS := dtbs
|
||||
endif
|
||||
|
||||
all: $(KBUILD_IMAGE) $(KBUILD_DTBS)
|
||||
|
||||
boot := arch/arm/boot
|
||||
|
||||
|
|
@ -284,10 +289,10 @@ zImage Image xipImage bootpImage uImage: vmlinux
|
|||
zinstall uinstall install: vmlinux
|
||||
$(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $@
|
||||
|
||||
%.dtb:
|
||||
%.dtb: scripts
|
||||
$(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@
|
||||
|
||||
dtbs:
|
||||
dtbs: scripts
|
||||
$(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@
|
||||
|
||||
# We use MRPROPER_FILES and CLEAN_FILES now
|
||||
|
|
@ -306,7 +311,7 @@ define archhelp
|
|||
echo ' uImage - U-Boot wrapped zImage'
|
||||
echo ' bootpImage - Combined zImage and initial RAM disk'
|
||||
echo ' (supply initrd image via make variable INITRD=<path>)'
|
||||
echo ' dtbs - Build device tree blobs for enabled boards'
|
||||
echo '* dtbs - Build device tree blobs for enabled boards'
|
||||
echo ' install - Install uncompressed kernel'
|
||||
echo ' zinstall - Install compressed kernel'
|
||||
echo ' uinstall - Install U-Boot wrapped compressed kernel'
|
||||
|
|
|
|||
|
|
@ -32,6 +32,9 @@ extern void error(char *);
|
|||
# define Tracecv(c,x)
|
||||
#endif
|
||||
|
||||
/* Not needed, but used in some headers pulled in by decompressors */
|
||||
extern char * strstr(const char * s1, const char *s2);
|
||||
|
||||
#ifdef CONFIG_KERNEL_GZIP
|
||||
#include "../../../../lib/decompress_inflate.c"
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -653,16 +653,21 @@ __armv7_mmu_cache_on:
|
|||
mcrne p15, 0, r0, c8, c7, 0 @ flush I,D TLBs
|
||||
#endif
|
||||
mrc p15, 0, r0, c1, c0, 0 @ read control reg
|
||||
bic r0, r0, #1 << 28 @ clear SCTLR.TRE
|
||||
orr r0, r0, #0x5000 @ I-cache enable, RR cache replacement
|
||||
orr r0, r0, #0x003c @ write buffer
|
||||
#ifdef CONFIG_MMU
|
||||
#ifdef CONFIG_CPU_ENDIAN_BE8
|
||||
orr r0, r0, #1 << 25 @ big-endian page tables
|
||||
#endif
|
||||
mrcne p15, 0, r6, c2, c0, 2 @ read ttb control reg
|
||||
orrne r0, r0, #1 @ MMU enabled
|
||||
movne r1, #0xfffffffd @ domain 0 = client
|
||||
bic r6, r6, #1 << 31 @ 32-bit translation system
|
||||
bic r6, r6, #3 << 0 @ use only ttbr0
|
||||
mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer
|
||||
mcrne p15, 0, r1, c3, c0, 0 @ load domain access control
|
||||
mcrne p15, 0, r6, c2, c0, 2 @ load ttb control
|
||||
#endif
|
||||
mcr p15, 0, r0, c7, c5, 4 @ ISB
|
||||
mcr p15, 0, r0, c1, c0, 0 @ load control register
|
||||
|
|
|
|||
|
|
@ -154,5 +154,10 @@
|
|||
#size-cells = <0>;
|
||||
ti,hwmods = "i2c3";
|
||||
};
|
||||
|
||||
wdt2: wdt@44e35000 {
|
||||
compatible = "ti,omap3-wdt";
|
||||
ti,hwmods = "wd_timer2";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -104,6 +104,7 @@
|
|||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioB: gpio@fffff600 {
|
||||
|
|
@ -113,6 +114,7 @@
|
|||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioC: gpio@fffff800 {
|
||||
|
|
@ -122,6 +124,7 @@
|
|||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
dbgu: serial@fffff200 {
|
||||
|
|
|
|||
|
|
@ -95,6 +95,7 @@
|
|||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioB: gpio@fffff400 {
|
||||
|
|
@ -104,6 +105,7 @@
|
|||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioC: gpio@fffff600 {
|
||||
|
|
@ -113,6 +115,7 @@
|
|||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioD: gpio@fffff800 {
|
||||
|
|
@ -122,6 +125,7 @@
|
|||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioE: gpio@fffffa00 {
|
||||
|
|
@ -131,6 +135,7 @@
|
|||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
dbgu: serial@ffffee00 {
|
||||
|
|
|
|||
|
|
@ -15,7 +15,7 @@
|
|||
compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
|
||||
|
||||
chosen {
|
||||
bootargs = "128M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
|
||||
bootargs = "console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
|
||||
};
|
||||
|
||||
ahb {
|
||||
|
|
|
|||
|
|
@ -113,6 +113,7 @@
|
|||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioB: gpio@fffff400 {
|
||||
|
|
@ -122,6 +123,7 @@
|
|||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioC: gpio@fffff600 {
|
||||
|
|
@ -131,6 +133,7 @@
|
|||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioD: gpio@fffff800 {
|
||||
|
|
@ -140,6 +143,7 @@
|
|||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioE: gpio@fffffa00 {
|
||||
|
|
@ -149,6 +153,7 @@
|
|||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
dbgu: serial@ffffee00 {
|
||||
|
|
|
|||
|
|
@ -107,6 +107,7 @@
|
|||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioB: gpio@fffff600 {
|
||||
|
|
@ -116,6 +117,7 @@
|
|||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioC: gpio@fffff800 {
|
||||
|
|
@ -125,6 +127,7 @@
|
|||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioD: gpio@fffffa00 {
|
||||
|
|
@ -134,6 +137,7 @@
|
|||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
dbgu: serial@fffff200 {
|
||||
|
|
|
|||
|
|
@ -115,6 +115,7 @@
|
|||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioB: gpio@fffff600 {
|
||||
|
|
@ -124,6 +125,7 @@
|
|||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioC: gpio@fffff800 {
|
||||
|
|
@ -133,6 +135,7 @@
|
|||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pioD: gpio@fffffa00 {
|
||||
|
|
@ -142,6 +145,7 @@
|
|||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
dbgu: serial@fffff200 {
|
||||
|
|
|
|||
|
|
@ -51,11 +51,11 @@
|
|||
|
||||
dma-apbh@80004000 {
|
||||
compatible = "fsl,imx23-dma-apbh";
|
||||
reg = <0x80004000 2000>;
|
||||
reg = <0x80004000 0x2000>;
|
||||
};
|
||||
|
||||
ecc@80008000 {
|
||||
reg = <0x80008000 2000>;
|
||||
reg = <0x80008000 0x2000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -63,7 +63,7 @@
|
|||
compatible = "fsl,imx23-gpmi-nand";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x8000c000 2000>, <0x8000a000 2000>;
|
||||
reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
|
||||
reg-names = "gpmi-nand", "bch";
|
||||
interrupts = <13>, <56>;
|
||||
interrupt-names = "gpmi-dma", "bch";
|
||||
|
|
@ -72,14 +72,14 @@
|
|||
};
|
||||
|
||||
ssp0: ssp@80010000 {
|
||||
reg = <0x80010000 2000>;
|
||||
reg = <0x80010000 0x2000>;
|
||||
interrupts = <15 14>;
|
||||
fsl,ssp-dma-channel = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
etm@80014000 {
|
||||
reg = <0x80014000 2000>;
|
||||
reg = <0x80014000 0x2000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -87,7 +87,7 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx23-pinctrl", "simple-bus";
|
||||
reg = <0x80018000 2000>;
|
||||
reg = <0x80018000 0x2000>;
|
||||
|
||||
gpio0: gpio@0 {
|
||||
compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
|
||||
|
|
@ -273,32 +273,32 @@
|
|||
};
|
||||
|
||||
emi@80020000 {
|
||||
reg = <0x80020000 2000>;
|
||||
reg = <0x80020000 0x2000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dma-apbx@80024000 {
|
||||
compatible = "fsl,imx23-dma-apbx";
|
||||
reg = <0x80024000 2000>;
|
||||
reg = <0x80024000 0x2000>;
|
||||
};
|
||||
|
||||
dcp@80028000 {
|
||||
reg = <0x80028000 2000>;
|
||||
reg = <0x80028000 0x2000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pxp@8002a000 {
|
||||
reg = <0x8002a000 2000>;
|
||||
reg = <0x8002a000 0x2000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ocotp@8002c000 {
|
||||
reg = <0x8002c000 2000>;
|
||||
reg = <0x8002c000 0x2000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
axi-ahb@8002e000 {
|
||||
reg = <0x8002e000 2000>;
|
||||
reg = <0x8002e000 0x2000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -310,14 +310,14 @@
|
|||
};
|
||||
|
||||
ssp1: ssp@80034000 {
|
||||
reg = <0x80034000 2000>;
|
||||
reg = <0x80034000 0x2000>;
|
||||
interrupts = <2 20>;
|
||||
fsl,ssp-dma-channel = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
tvenc@80038000 {
|
||||
reg = <0x80038000 2000>;
|
||||
reg = <0x80038000 0x2000>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
@ -330,37 +330,37 @@
|
|||
ranges;
|
||||
|
||||
clkctl@80040000 {
|
||||
reg = <0x80040000 2000>;
|
||||
reg = <0x80040000 0x2000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
saif0: saif@80042000 {
|
||||
reg = <0x80042000 2000>;
|
||||
reg = <0x80042000 0x2000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
power@80044000 {
|
||||
reg = <0x80044000 2000>;
|
||||
reg = <0x80044000 0x2000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
saif1: saif@80046000 {
|
||||
reg = <0x80046000 2000>;
|
||||
reg = <0x80046000 0x2000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
audio-out@80048000 {
|
||||
reg = <0x80048000 2000>;
|
||||
reg = <0x80048000 0x2000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
audio-in@8004c000 {
|
||||
reg = <0x8004c000 2000>;
|
||||
reg = <0x8004c000 0x2000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
lradc@80050000 {
|
||||
reg = <0x80050000 2000>;
|
||||
reg = <0x80050000 0x2000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -370,26 +370,26 @@
|
|||
};
|
||||
|
||||
i2c@80058000 {
|
||||
reg = <0x80058000 2000>;
|
||||
reg = <0x80058000 0x2000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
rtc@8005c000 {
|
||||
compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
|
||||
reg = <0x8005c000 2000>;
|
||||
reg = <0x8005c000 0x2000>;
|
||||
interrupts = <22>;
|
||||
};
|
||||
|
||||
pwm: pwm@80064000 {
|
||||
compatible = "fsl,imx23-pwm";
|
||||
reg = <0x80064000 2000>;
|
||||
reg = <0x80064000 0x2000>;
|
||||
#pwm-cells = <2>;
|
||||
fsl,pwm-number = <5>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
timrot@80068000 {
|
||||
reg = <0x80068000 2000>;
|
||||
reg = <0x80068000 0x2000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
@ -429,7 +429,7 @@
|
|||
ranges;
|
||||
|
||||
usbctrl@80080000 {
|
||||
reg = <0x80080000 0x10000>;
|
||||
reg = <0x80080000 0x40000>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -27,7 +27,7 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
uart@1000a000 {
|
||||
uart1: serial@1000a000 {
|
||||
fsl,uart-has-rtscts;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -19,6 +19,12 @@
|
|||
serial3 = &uart4;
|
||||
serial4 = &uart5;
|
||||
serial5 = &uart6;
|
||||
gpio0 = &gpio1;
|
||||
gpio1 = &gpio2;
|
||||
gpio2 = &gpio3;
|
||||
gpio3 = &gpio4;
|
||||
gpio4 = &gpio5;
|
||||
gpio5 = &gpio6;
|
||||
};
|
||||
|
||||
avic: avic-interrupt-controller@e0000000 {
|
||||
|
|
|
|||
|
|
@ -57,18 +57,18 @@
|
|||
};
|
||||
|
||||
hsadc@80002000 {
|
||||
reg = <0x80002000 2000>;
|
||||
reg = <0x80002000 0x2000>;
|
||||
interrupts = <13 87>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dma-apbh@80004000 {
|
||||
compatible = "fsl,imx28-dma-apbh";
|
||||
reg = <0x80004000 2000>;
|
||||
reg = <0x80004000 0x2000>;
|
||||
};
|
||||
|
||||
perfmon@80006000 {
|
||||
reg = <0x80006000 800>;
|
||||
reg = <0x80006000 0x800>;
|
||||
interrupts = <27>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
@ -77,7 +77,7 @@
|
|||
compatible = "fsl,imx28-gpmi-nand";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x8000c000 2000>, <0x8000a000 2000>;
|
||||
reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
|
||||
reg-names = "gpmi-nand", "bch";
|
||||
interrupts = <88>, <41>;
|
||||
interrupt-names = "gpmi-dma", "bch";
|
||||
|
|
@ -86,28 +86,28 @@
|
|||
};
|
||||
|
||||
ssp0: ssp@80010000 {
|
||||
reg = <0x80010000 2000>;
|
||||
reg = <0x80010000 0x2000>;
|
||||
interrupts = <96 82>;
|
||||
fsl,ssp-dma-channel = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ssp1: ssp@80012000 {
|
||||
reg = <0x80012000 2000>;
|
||||
reg = <0x80012000 0x2000>;
|
||||
interrupts = <97 83>;
|
||||
fsl,ssp-dma-channel = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ssp2: ssp@80014000 {
|
||||
reg = <0x80014000 2000>;
|
||||
reg = <0x80014000 0x2000>;
|
||||
interrupts = <98 84>;
|
||||
fsl,ssp-dma-channel = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ssp3: ssp@80016000 {
|
||||
reg = <0x80016000 2000>;
|
||||
reg = <0x80016000 0x2000>;
|
||||
interrupts = <99 85>;
|
||||
fsl,ssp-dma-channel = <3>;
|
||||
status = "disabled";
|
||||
|
|
@ -117,7 +117,7 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx28-pinctrl", "simple-bus";
|
||||
reg = <0x80018000 2000>;
|
||||
reg = <0x80018000 0x2000>;
|
||||
|
||||
gpio0: gpio@0 {
|
||||
compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
|
||||
|
|
@ -510,96 +510,96 @@
|
|||
};
|
||||
|
||||
digctl@8001c000 {
|
||||
reg = <0x8001c000 2000>;
|
||||
reg = <0x8001c000 0x2000>;
|
||||
interrupts = <89>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
etm@80022000 {
|
||||
reg = <0x80022000 2000>;
|
||||
reg = <0x80022000 0x2000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dma-apbx@80024000 {
|
||||
compatible = "fsl,imx28-dma-apbx";
|
||||
reg = <0x80024000 2000>;
|
||||
reg = <0x80024000 0x2000>;
|
||||
};
|
||||
|
||||
dcp@80028000 {
|
||||
reg = <0x80028000 2000>;
|
||||
reg = <0x80028000 0x2000>;
|
||||
interrupts = <52 53 54>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pxp@8002a000 {
|
||||
reg = <0x8002a000 2000>;
|
||||
reg = <0x8002a000 0x2000>;
|
||||
interrupts = <39>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ocotp@8002c000 {
|
||||
reg = <0x8002c000 2000>;
|
||||
reg = <0x8002c000 0x2000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
axi-ahb@8002e000 {
|
||||
reg = <0x8002e000 2000>;
|
||||
reg = <0x8002e000 0x2000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
lcdif@80030000 {
|
||||
compatible = "fsl,imx28-lcdif";
|
||||
reg = <0x80030000 2000>;
|
||||
reg = <0x80030000 0x2000>;
|
||||
interrupts = <38 86>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
can0: can@80032000 {
|
||||
compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
|
||||
reg = <0x80032000 2000>;
|
||||
reg = <0x80032000 0x2000>;
|
||||
interrupts = <8>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
can1: can@80034000 {
|
||||
compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
|
||||
reg = <0x80034000 2000>;
|
||||
reg = <0x80034000 0x2000>;
|
||||
interrupts = <9>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
simdbg@8003c000 {
|
||||
reg = <0x8003c000 200>;
|
||||
reg = <0x8003c000 0x200>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
simgpmisel@8003c200 {
|
||||
reg = <0x8003c200 100>;
|
||||
reg = <0x8003c200 0x100>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
simsspsel@8003c300 {
|
||||
reg = <0x8003c300 100>;
|
||||
reg = <0x8003c300 0x100>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
simmemsel@8003c400 {
|
||||
reg = <0x8003c400 100>;
|
||||
reg = <0x8003c400 0x100>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpiomon@8003c500 {
|
||||
reg = <0x8003c500 100>;
|
||||
reg = <0x8003c500 0x100>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
simenet@8003c700 {
|
||||
reg = <0x8003c700 100>;
|
||||
reg = <0x8003c700 0x100>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
armjtag@8003c800 {
|
||||
reg = <0x8003c800 100>;
|
||||
reg = <0x8003c800 0x100>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
@ -612,45 +612,45 @@
|
|||
ranges;
|
||||
|
||||
clkctl@80040000 {
|
||||
reg = <0x80040000 2000>;
|
||||
reg = <0x80040000 0x2000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
saif0: saif@80042000 {
|
||||
compatible = "fsl,imx28-saif";
|
||||
reg = <0x80042000 2000>;
|
||||
reg = <0x80042000 0x2000>;
|
||||
interrupts = <59 80>;
|
||||
fsl,saif-dma-channel = <4>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
power@80044000 {
|
||||
reg = <0x80044000 2000>;
|
||||
reg = <0x80044000 0x2000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
saif1: saif@80046000 {
|
||||
compatible = "fsl,imx28-saif";
|
||||
reg = <0x80046000 2000>;
|
||||
reg = <0x80046000 0x2000>;
|
||||
interrupts = <58 81>;
|
||||
fsl,saif-dma-channel = <5>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
lradc@80050000 {
|
||||
reg = <0x80050000 2000>;
|
||||
reg = <0x80050000 0x2000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spdif@80054000 {
|
||||
reg = <0x80054000 2000>;
|
||||
reg = <0x80054000 0x2000>;
|
||||
interrupts = <45 66>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
rtc@80056000 {
|
||||
compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc";
|
||||
reg = <0x80056000 2000>;
|
||||
reg = <0x80056000 0x2000>;
|
||||
interrupts = <29>;
|
||||
};
|
||||
|
||||
|
|
@ -658,7 +658,7 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx28-i2c";
|
||||
reg = <0x80058000 2000>;
|
||||
reg = <0x80058000 0x2000>;
|
||||
interrupts = <111 68>;
|
||||
clock-frequency = <100000>;
|
||||
status = "disabled";
|
||||
|
|
@ -668,7 +668,7 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx28-i2c";
|
||||
reg = <0x8005a000 2000>;
|
||||
reg = <0x8005a000 0x2000>;
|
||||
interrupts = <110 69>;
|
||||
clock-frequency = <100000>;
|
||||
status = "disabled";
|
||||
|
|
@ -676,14 +676,14 @@
|
|||
|
||||
pwm: pwm@80064000 {
|
||||
compatible = "fsl,imx28-pwm", "fsl,imx23-pwm";
|
||||
reg = <0x80064000 2000>;
|
||||
reg = <0x80064000 0x2000>;
|
||||
#pwm-cells = <2>;
|
||||
fsl,pwm-number = <8>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
timrot@80068000 {
|
||||
reg = <0x80068000 2000>;
|
||||
reg = <0x80068000 0x2000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -25,8 +25,8 @@
|
|||
aips@70000000 { /* aips-1 */
|
||||
spba@70000000 {
|
||||
esdhc@70004000 { /* ESDHC1 */
|
||||
fsl,cd-internal;
|
||||
fsl,wp-internal;
|
||||
fsl,cd-controller;
|
||||
fsl,wp-controller;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
@ -53,7 +53,7 @@
|
|||
spi-max-frequency = <6000000>;
|
||||
reg = <0>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <8>;
|
||||
interrupts = <8 0x4>;
|
||||
|
||||
regulators {
|
||||
sw1_reg: sw1 {
|
||||
|
|
|
|||
|
|
@ -17,6 +17,10 @@
|
|||
serial0 = &uart1;
|
||||
serial1 = &uart2;
|
||||
serial2 = &uart3;
|
||||
gpio0 = &gpio1;
|
||||
gpio1 = &gpio2;
|
||||
gpio2 = &gpio3;
|
||||
gpio3 = &gpio4;
|
||||
};
|
||||
|
||||
tzic: tz-interrupt-controller@e0000000 {
|
||||
|
|
|
|||
|
|
@ -64,12 +64,32 @@
|
|||
reg = <0xf4000000 0x2000000>;
|
||||
phy-mode = "mii";
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <31>;
|
||||
interrupts = <31 0x8>;
|
||||
reg-io-width = <4>;
|
||||
/*
|
||||
* VDD33A and VDDVARIO of LAN9220 are supplied by
|
||||
* SW4_3V3 of LTC3589. Before the regulator driver
|
||||
* for this PMIC is available, we use a fixed dummy
|
||||
* 3V3 regulator to get LAN9220 driver probing work.
|
||||
*/
|
||||
vdd33a-supply = <®_3p3v>;
|
||||
vddvario-supply = <®_3p3v>;
|
||||
smsc,irq-push-pull;
|
||||
};
|
||||
};
|
||||
|
||||
regulators {
|
||||
compatible = "simple-bus";
|
||||
|
||||
reg_3p3v: 3p3v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "3P3V";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
|
||||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
|
|
|
|||
|
|
@ -19,6 +19,13 @@
|
|||
serial2 = &uart3;
|
||||
serial3 = &uart4;
|
||||
serial4 = &uart5;
|
||||
gpio0 = &gpio1;
|
||||
gpio1 = &gpio2;
|
||||
gpio2 = &gpio3;
|
||||
gpio3 = &gpio4;
|
||||
gpio4 = &gpio5;
|
||||
gpio5 = &gpio6;
|
||||
gpio6 = &gpio7;
|
||||
};
|
||||
|
||||
tzic: tz-interrupt-controller@0fffc000 {
|
||||
|
|
|
|||
|
|
@ -53,6 +53,7 @@
|
|||
fsl,pins = <
|
||||
144 0x80000000 /* MX6Q_PAD_EIM_D22__GPIO_3_22 */
|
||||
121 0x80000000 /* MX6Q_PAD_EIM_D19__GPIO_3_19 */
|
||||
953 0x80000000 /* MX6Q_PAD_GPIO_0__CCM_CLKO */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -19,6 +19,13 @@
|
|||
serial2 = &uart3;
|
||||
serial3 = &uart4;
|
||||
serial4 = &uart5;
|
||||
gpio0 = &gpio1;
|
||||
gpio1 = &gpio2;
|
||||
gpio2 = &gpio3;
|
||||
gpio3 = &gpio4;
|
||||
gpio4 = &gpio5;
|
||||
gpio5 = &gpio6;
|
||||
gpio6 = &gpio7;
|
||||
};
|
||||
|
||||
cpus {
|
||||
|
|
|
|||
|
|
@ -0,0 +1,76 @@
|
|||
/*
|
||||
* SoC core Device Tree for the ARM Integrator platforms
|
||||
*/
|
||||
|
||||
/include/ "skeleton.dtsi"
|
||||
|
||||
/ {
|
||||
timer@13000000 {
|
||||
reg = <0x13000000 0x100>;
|
||||
interrupt-parent = <&pic>;
|
||||
interrupts = <5>;
|
||||
};
|
||||
|
||||
timer@13000100 {
|
||||
reg = <0x13000100 0x100>;
|
||||
interrupt-parent = <&pic>;
|
||||
interrupts = <6>;
|
||||
};
|
||||
|
||||
timer@13000200 {
|
||||
reg = <0x13000200 0x100>;
|
||||
interrupt-parent = <&pic>;
|
||||
interrupts = <7>;
|
||||
};
|
||||
|
||||
pic@14000000 {
|
||||
compatible = "arm,versatile-fpga-irq";
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
reg = <0x14000000 0x100>;
|
||||
clear-mask = <0xffffffff>;
|
||||
};
|
||||
|
||||
flash@24000000 {
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x24000000 0x02000000>;
|
||||
};
|
||||
|
||||
fpga {
|
||||
compatible = "arm,amba-bus", "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
interrupt-parent = <&pic>;
|
||||
|
||||
/*
|
||||
* These PrimeCells are in the same locations and using the
|
||||
* same interrupts in all Integrators, however the silicon
|
||||
* version deployed is different.
|
||||
*/
|
||||
rtc@15000000 {
|
||||
reg = <0x15000000 0x1000>;
|
||||
interrupts = <8>;
|
||||
};
|
||||
|
||||
uart@16000000 {
|
||||
reg = <0x16000000 0x1000>;
|
||||
interrupts = <1>;
|
||||
};
|
||||
|
||||
uart@17000000 {
|
||||
reg = <0x17000000 0x1000>;
|
||||
interrupts = <2>;
|
||||
};
|
||||
|
||||
kmi@18000000 {
|
||||
reg = <0x18000000 0x1000>;
|
||||
interrupts = <3>;
|
||||
};
|
||||
|
||||
kmi@19000000 {
|
||||
reg = <0x19000000 0x1000>;
|
||||
interrupts = <4>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,68 @@
|
|||
/*
|
||||
* Device Tree for the ARM Integrator/AP platform
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "integrator.dtsi"
|
||||
|
||||
/ {
|
||||
model = "ARM Integrator/AP";
|
||||
compatible = "arm,integrator-ap";
|
||||
|
||||
aliases {
|
||||
arm,timer-primary = &timer2;
|
||||
arm,timer-secondary = &timer1;
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "root=/dev/ram0 console=ttyAM0,38400n8 earlyprintk";
|
||||
};
|
||||
|
||||
timer0: timer@13000000 {
|
||||
compatible = "arm,integrator-timer";
|
||||
};
|
||||
|
||||
timer1: timer@13000100 {
|
||||
compatible = "arm,integrator-timer";
|
||||
};
|
||||
|
||||
timer2: timer@13000200 {
|
||||
compatible = "arm,integrator-timer";
|
||||
};
|
||||
|
||||
pic: pic@14000000 {
|
||||
valid-mask = <0x003fffff>;
|
||||
};
|
||||
|
||||
fpga {
|
||||
/*
|
||||
* The Integator/AP predates the idea to have magic numbers
|
||||
* identifying the PrimeCell in hardware, thus we have to
|
||||
* supply these from the device tree.
|
||||
*/
|
||||
rtc: rtc@15000000 {
|
||||
compatible = "arm,pl030", "arm,primecell";
|
||||
arm,primecell-periphid = <0x00041030>;
|
||||
};
|
||||
|
||||
uart0: uart@16000000 {
|
||||
compatible = "arm,pl010", "arm,primecell";
|
||||
arm,primecell-periphid = <0x00041010>;
|
||||
};
|
||||
|
||||
uart1: uart@17000000 {
|
||||
compatible = "arm,pl010", "arm,primecell";
|
||||
arm,primecell-periphid = <0x00041010>;
|
||||
};
|
||||
|
||||
kmi0: kmi@18000000 {
|
||||
compatible = "arm,pl050", "arm,primecell";
|
||||
arm,primecell-periphid = <0x00041050>;
|
||||
};
|
||||
|
||||
kmi1: kmi@19000000 {
|
||||
compatible = "arm,pl050", "arm,primecell";
|
||||
arm,primecell-periphid = <0x00041050>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,110 @@
|
|||
/*
|
||||
* Device Tree for the ARM Integrator/CP platform
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "integrator.dtsi"
|
||||
|
||||
/ {
|
||||
model = "ARM Integrator/CP";
|
||||
compatible = "arm,integrator-cp";
|
||||
|
||||
aliases {
|
||||
arm,timer-primary = &timer2;
|
||||
arm,timer-secondary = &timer1;
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "root=/dev/ram0 console=ttyAMA0,38400n8 earlyprintk";
|
||||
};
|
||||
|
||||
timer0: timer@13000000 {
|
||||
compatible = "arm,sp804", "arm,primecell";
|
||||
};
|
||||
|
||||
timer1: timer@13000100 {
|
||||
compatible = "arm,sp804", "arm,primecell";
|
||||
};
|
||||
|
||||
timer2: timer@13000200 {
|
||||
compatible = "arm,sp804", "arm,primecell";
|
||||
};
|
||||
|
||||
pic: pic@14000000 {
|
||||
valid-mask = <0x1fc003ff>;
|
||||
};
|
||||
|
||||
cic: cic@10000040 {
|
||||
compatible = "arm,versatile-fpga-irq";
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
reg = <0x10000040 0x100>;
|
||||
clear-mask = <0xffffffff>;
|
||||
valid-mask = <0x00000007>;
|
||||
};
|
||||
|
||||
sic: sic@ca000000 {
|
||||
compatible = "arm,versatile-fpga-irq";
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
reg = <0xca000000 0x100>;
|
||||
clear-mask = <0x00000fff>;
|
||||
valid-mask = <0x00000fff>;
|
||||
};
|
||||
|
||||
ethernet@c8000000 {
|
||||
compatible = "smsc,lan91c111";
|
||||
reg = <0xc8000000 0x10>;
|
||||
interrupt-parent = <&pic>;
|
||||
interrupts = <27>;
|
||||
};
|
||||
|
||||
fpga {
|
||||
/*
|
||||
* These PrimeCells are at the same location and using
|
||||
* the same interrupts in all Integrators, but in the CP
|
||||
* slightly newer versions are deployed.
|
||||
*/
|
||||
rtc@15000000 {
|
||||
compatible = "arm,pl031", "arm,primecell";
|
||||
};
|
||||
|
||||
uart@16000000 {
|
||||
compatible = "arm,pl011", "arm,primecell";
|
||||
};
|
||||
|
||||
uart@17000000 {
|
||||
compatible = "arm,pl011", "arm,primecell";
|
||||
};
|
||||
|
||||
kmi@18000000 {
|
||||
compatible = "arm,pl050", "arm,primecell";
|
||||
};
|
||||
|
||||
kmi@19000000 {
|
||||
compatible = "arm,pl050", "arm,primecell";
|
||||
};
|
||||
|
||||
/*
|
||||
* These PrimeCells are only available on the Integrator/CP
|
||||
*/
|
||||
mmc@1c000000 {
|
||||
compatible = "arm,pl180", "arm,primecell";
|
||||
reg = <0x1c000000 0x1000>;
|
||||
interrupts = <23 24>;
|
||||
max-frequency = <515633>;
|
||||
};
|
||||
|
||||
aaci@1d000000 {
|
||||
compatible = "arm,pl041", "arm,primecell";
|
||||
reg = <0x1d000000 0x1000>;
|
||||
interrupts = <25>;
|
||||
};
|
||||
|
||||
clcd@c0000000 {
|
||||
compatible = "arm,pl110", "arm,primecell";
|
||||
reg = <0xC0000000 0x1000>;
|
||||
interrupts = <22>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -41,9 +41,13 @@
|
|||
};
|
||||
power-blue {
|
||||
label = "power:blue";
|
||||
gpios = <&gpio1 11 0>;
|
||||
gpios = <&gpio1 10 0>;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
power-red {
|
||||
label = "power:red";
|
||||
gpios = <&gpio1 11 0>;
|
||||
};
|
||||
usb1 {
|
||||
label = "usb1:blue";
|
||||
gpios = <&gpio1 12 0>;
|
||||
|
|
|
|||
|
|
@ -66,6 +66,7 @@
|
|||
|
||||
vcxio: regulator@8 {
|
||||
compatible = "ti,twl6030-vcxio";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vusb: regulator@9 {
|
||||
|
|
@ -74,10 +75,12 @@
|
|||
|
||||
v1v8: regulator@10 {
|
||||
compatible = "ti,twl6030-v1v8";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
v2v1: regulator@11 {
|
||||
compatible = "ti,twl6030-v2v1";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
clk32kg: regulator@12 {
|
||||
|
|
|
|||
|
|
@ -33,7 +33,7 @@ CONFIG_AEABI=y
|
|||
CONFIG_FORCE_MAX_ZONEORDER=13
|
||||
CONFIG_ZBOOT_ROM_TEXT=0x0
|
||||
CONFIG_ZBOOT_ROM_BSS=0x0
|
||||
CONFIG_CMDLINE="console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096"
|
||||
CONFIG_CMDLINE="console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096 rw"
|
||||
CONFIG_CMDLINE_FORCE=y
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_VFP=y
|
||||
|
|
|
|||
|
|
@ -192,6 +192,7 @@ CONFIG_RTC_DRV_MC13XXX=y
|
|||
CONFIG_RTC_DRV_MXC=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_IMX_SDMA=y
|
||||
CONFIG_MXS_DMA=y
|
||||
CONFIG_COMMON_CLK_DEBUG=y
|
||||
# CONFIG_IOMMU_SUPPORT is not set
|
||||
CONFIG_EXT2_FS=y
|
||||
|
|
|
|||
|
|
@ -34,7 +34,6 @@ CONFIG_NO_HZ=y
|
|||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_PREEMPT_VOLUNTARY=y
|
||||
CONFIG_AEABI=y
|
||||
CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
|
||||
CONFIG_AUTO_ZRELADDR=y
|
||||
CONFIG_FPE_NWFPE=y
|
||||
CONFIG_NET=y
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ CONFIG_SYSFS_DEPRECATED_V2=y
|
|||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_EXPERT=y
|
||||
# CONFIG_KALLSYMS is not set
|
||||
# CONFIG_BUG is not set
|
||||
# CONFIG_BUGVERBOSE is not set
|
||||
# CONFIG_ELF_CORE is not set
|
||||
# CONFIG_SHMEM is not set
|
||||
CONFIG_SLOB=y
|
||||
|
|
|
|||
|
|
@ -86,6 +86,7 @@ CONFIG_NEW_LEDS=y
|
|||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_LM3530=y
|
||||
CONFIG_LEDS_LP5521=y
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_AB8500=y
|
||||
CONFIG_RTC_DRV_PL031=y
|
||||
|
|
|
|||
|
|
@ -5,16 +5,33 @@ header-y += hwcap.h
|
|||
generic-y += auxvec.h
|
||||
generic-y += bitsperlong.h
|
||||
generic-y += cputime.h
|
||||
generic-y += current.h
|
||||
generic-y += emergency-restart.h
|
||||
generic-y += errno.h
|
||||
generic-y += exec.h
|
||||
generic-y += ioctl.h
|
||||
generic-y += ipcbuf.h
|
||||
generic-y += irq_regs.h
|
||||
generic-y += kdebug.h
|
||||
generic-y += local.h
|
||||
generic-y += local64.h
|
||||
generic-y += msgbuf.h
|
||||
generic-y += param.h
|
||||
generic-y += parport.h
|
||||
generic-y += percpu.h
|
||||
generic-y += poll.h
|
||||
generic-y += resource.h
|
||||
generic-y += sections.h
|
||||
generic-y += segment.h
|
||||
generic-y += sembuf.h
|
||||
generic-y += serial.h
|
||||
generic-y += shmbuf.h
|
||||
generic-y += siginfo.h
|
||||
generic-y += sizes.h
|
||||
generic-y += socket.h
|
||||
generic-y += sockios.h
|
||||
generic-y += termbits.h
|
||||
generic-y += termios.h
|
||||
generic-y += timex.h
|
||||
generic-y += types.h
|
||||
generic-y += unaligned.h
|
||||
|
|
|
|||
|
|
@ -320,4 +320,12 @@
|
|||
.size \name , . - \name
|
||||
.endm
|
||||
|
||||
.macro check_uaccess, addr:req, size:req, limit:req, tmp:req, bad:req
|
||||
#ifndef CONFIG_CPU_USE_DOMAINS
|
||||
adds \tmp, \addr, #\size - 1
|
||||
sbcccs \tmp, \tmp, \limit
|
||||
bcs \bad
|
||||
#endif
|
||||
.endm
|
||||
|
||||
#endif /* __ASM_ASSEMBLER_H__ */
|
||||
|
|
|
|||
|
|
@ -1,15 +0,0 @@
|
|||
#ifndef _ASMARM_CURRENT_H
|
||||
#define _ASMARM_CURRENT_H
|
||||
|
||||
#include <linux/thread_info.h>
|
||||
|
||||
static inline struct task_struct *get_current(void) __attribute_const__;
|
||||
|
||||
static inline struct task_struct *get_current(void)
|
||||
{
|
||||
return current_thread_info()->task;
|
||||
}
|
||||
|
||||
#define current (get_current())
|
||||
|
||||
#endif /* _ASMARM_CURRENT_H */
|
||||
|
|
@ -202,6 +202,13 @@ static inline void dma_free_writecombine(struct device *dev, size_t size,
|
|||
return dma_free_attrs(dev, size, cpu_addr, dma_handle, &attrs);
|
||||
}
|
||||
|
||||
/*
|
||||
* This can be called during early boot to increase the size of the atomic
|
||||
* coherent DMA pool above the default value of 256KiB. It must be called
|
||||
* before postcore_initcall.
|
||||
*/
|
||||
extern void __init init_dma_coherent_pool_size(unsigned long size);
|
||||
|
||||
/*
|
||||
* This can be called during boot to increase the size of the consistent
|
||||
* DMA region above it's default value of 2MB. It must be called before the
|
||||
|
|
|
|||
|
|
@ -1,6 +0,0 @@
|
|||
#ifndef __ASM_ARM_EXEC_H
|
||||
#define __ASM_ARM_EXEC_H
|
||||
|
||||
#define arch_align_stack(x) (x)
|
||||
|
||||
#endif /* __ASM_ARM_EXEC_H */
|
||||
|
|
@ -110,19 +110,19 @@
|
|||
#endif
|
||||
|
||||
#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K)
|
||||
//# ifdef _CACHE
|
||||
# ifdef _CACHE
|
||||
# define MULTI_CACHE 1
|
||||
//# else
|
||||
//# define _CACHE v6
|
||||
//# endif
|
||||
# else
|
||||
# define _CACHE v6
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_CPU_V7)
|
||||
//# ifdef _CACHE
|
||||
# ifdef _CACHE
|
||||
# define MULTI_CACHE 1
|
||||
//# else
|
||||
//# define _CACHE v7
|
||||
//# endif
|
||||
# else
|
||||
# define _CACHE v7
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#if !defined(_CACHE) && !defined(MULTI_CACHE)
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@
|
|||
#include <linux/threads.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
#define NR_IPI 5
|
||||
#define NR_IPI 6
|
||||
|
||||
typedef struct {
|
||||
unsigned int __softirq_pending;
|
||||
|
|
|
|||
|
|
@ -47,13 +47,68 @@ extern void __raw_readsb(const void __iomem *addr, void *data, int bytelen);
|
|||
extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen);
|
||||
extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
|
||||
|
||||
#define __raw_writeb(v,a) ((void)(__chk_io_ptr(a), *(volatile unsigned char __force *)(a) = (v)))
|
||||
#define __raw_writew(v,a) ((void)(__chk_io_ptr(a), *(volatile unsigned short __force *)(a) = (v)))
|
||||
#define __raw_writel(v,a) ((void)(__chk_io_ptr(a), *(volatile unsigned int __force *)(a) = (v)))
|
||||
#if __LINUX_ARM_ARCH__ < 6
|
||||
/*
|
||||
* Half-word accesses are problematic with RiscPC due to limitations of
|
||||
* the bus. Rather than special-case the machine, just let the compiler
|
||||
* generate the access for CPUs prior to ARMv6.
|
||||
*/
|
||||
#define __raw_readw(a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a))
|
||||
#define __raw_writew(v,a) ((void)(__chk_io_ptr(a), *(volatile unsigned short __force *)(a) = (v)))
|
||||
#else
|
||||
/*
|
||||
* When running under a hypervisor, we want to avoid I/O accesses with
|
||||
* writeback addressing modes as these incur a significant performance
|
||||
* overhead (the address generation must be emulated in software).
|
||||
*/
|
||||
static inline void __raw_writew(u16 val, volatile void __iomem *addr)
|
||||
{
|
||||
asm volatile("strh %1, %0"
|
||||
: "+Qo" (*(volatile u16 __force *)addr)
|
||||
: "r" (val));
|
||||
}
|
||||
|
||||
#define __raw_readb(a) (__chk_io_ptr(a), *(volatile unsigned char __force *)(a))
|
||||
#define __raw_readw(a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a))
|
||||
#define __raw_readl(a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a))
|
||||
static inline u16 __raw_readw(const volatile void __iomem *addr)
|
||||
{
|
||||
u16 val;
|
||||
asm volatile("ldrh %1, %0"
|
||||
: "+Qo" (*(volatile u16 __force *)addr),
|
||||
"=r" (val));
|
||||
return val;
|
||||
}
|
||||
#endif
|
||||
|
||||
static inline void __raw_writeb(u8 val, volatile void __iomem *addr)
|
||||
{
|
||||
asm volatile("strb %1, %0"
|
||||
: "+Qo" (*(volatile u8 __force *)addr)
|
||||
: "r" (val));
|
||||
}
|
||||
|
||||
static inline void __raw_writel(u32 val, volatile void __iomem *addr)
|
||||
{
|
||||
asm volatile("str %1, %0"
|
||||
: "+Qo" (*(volatile u32 __force *)addr)
|
||||
: "r" (val));
|
||||
}
|
||||
|
||||
static inline u8 __raw_readb(const volatile void __iomem *addr)
|
||||
{
|
||||
u8 val;
|
||||
asm volatile("ldrb %1, %0"
|
||||
: "+Qo" (*(volatile u8 __force *)addr),
|
||||
"=r" (val));
|
||||
return val;
|
||||
}
|
||||
|
||||
static inline u32 __raw_readl(const volatile void __iomem *addr)
|
||||
{
|
||||
u32 val;
|
||||
asm volatile("ldr %1, %0"
|
||||
: "+Qo" (*(volatile u32 __force *)addr),
|
||||
"=r" (val));
|
||||
return val;
|
||||
}
|
||||
|
||||
/*
|
||||
* Architecture ioremap implementation.
|
||||
|
|
|
|||
|
|
@ -1 +0,0 @@
|
|||
#include <asm-generic/ipcbuf.h>
|
||||
|
|
@ -187,6 +187,7 @@ static inline unsigned long __phys_to_virt(unsigned long x)
|
|||
#define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET)
|
||||
#endif
|
||||
#endif
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#ifndef PHYS_OFFSET
|
||||
#ifdef PLAT_PHYS_OFFSET
|
||||
|
|
@ -196,6 +197,8 @@ static inline unsigned long __phys_to_virt(unsigned long x)
|
|||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/*
|
||||
* PFNs are used to describe any physical page; this means
|
||||
* PFN 0 == physical address 0.
|
||||
|
|
|
|||
|
|
@ -1,31 +0,0 @@
|
|||
#ifndef _ASMARM_MSGBUF_H
|
||||
#define _ASMARM_MSGBUF_H
|
||||
|
||||
/*
|
||||
* The msqid64_ds structure for arm architecture.
|
||||
* Note extra padding because this structure is passed back and forth
|
||||
* between kernel and user space.
|
||||
*
|
||||
* Pad space is left for:
|
||||
* - 64-bit time_t to solve y2038 problem
|
||||
* - 2 miscellaneous 32-bit values
|
||||
*/
|
||||
|
||||
struct msqid64_ds {
|
||||
struct ipc64_perm msg_perm;
|
||||
__kernel_time_t msg_stime; /* last msgsnd time */
|
||||
unsigned long __unused1;
|
||||
__kernel_time_t msg_rtime; /* last msgrcv time */
|
||||
unsigned long __unused2;
|
||||
__kernel_time_t msg_ctime; /* last change time */
|
||||
unsigned long __unused3;
|
||||
unsigned long msg_cbytes; /* current number of bytes on queue */
|
||||
unsigned long msg_qnum; /* number of messages in queue */
|
||||
unsigned long msg_qbytes; /* max number of bytes on queue */
|
||||
__kernel_pid_t msg_lspid; /* pid of last msgsnd */
|
||||
__kernel_pid_t msg_lrpid; /* last receive pid */
|
||||
unsigned long __unused4;
|
||||
unsigned long __unused5;
|
||||
};
|
||||
|
||||
#endif /* _ASMARM_MSGBUF_H */
|
||||
|
|
@ -9,8 +9,13 @@
|
|||
#define _ASM_MUTEX_H
|
||||
/*
|
||||
* On pre-ARMv6 hardware this results in a swp-based implementation,
|
||||
* which is the most efficient. For ARMv6+, we emit a pair of exclusive
|
||||
* accesses instead.
|
||||
* which is the most efficient. For ARMv6+, we have exclusive memory
|
||||
* accessors and use atomic_dec to avoid the extra xchg operations
|
||||
* on the locking slowpaths.
|
||||
*/
|
||||
#if __LINUX_ARM_ARCH__ < 6
|
||||
#include <asm-generic/mutex-xchg.h>
|
||||
#else
|
||||
#include <asm-generic/mutex-dec.h>
|
||||
#endif
|
||||
#endif /* _ASM_MUTEX_H */
|
||||
|
|
|
|||
|
|
@ -0,0 +1,29 @@
|
|||
/*
|
||||
* opcodes-virt.h: Opcode definitions for the ARM virtualization extensions
|
||||
* Copyright (C) 2012 Linaro Limited
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*/
|
||||
#ifndef __ASM_ARM_OPCODES_VIRT_H
|
||||
#define __ASM_ARM_OPCODES_VIRT_H
|
||||
|
||||
#include <asm/opcodes.h>
|
||||
|
||||
#define __HVC(imm16) __inst_arm_thumb32( \
|
||||
0xE1400070 | (((imm16) & 0xFFF0) << 4) | ((imm16) & 0x000F), \
|
||||
0xF7E08000 | (((imm16) & 0xF000) << 4) | ((imm16) & 0x0FFF) \
|
||||
)
|
||||
|
||||
#endif /* ! __ASM_ARM_OPCODES_VIRT_H */
|
||||
|
|
@ -18,6 +18,33 @@ extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
|
|||
#define ARM_OPCODE_CONDTEST_UNCOND 2
|
||||
|
||||
|
||||
/*
|
||||
* Assembler opcode byteswap helpers.
|
||||
* These are only intended for use by this header: don't use them directly,
|
||||
* because they will be suboptimal in most cases.
|
||||
*/
|
||||
#define ___asm_opcode_swab32(x) ( \
|
||||
(((x) << 24) & 0xFF000000) \
|
||||
| (((x) << 8) & 0x00FF0000) \
|
||||
| (((x) >> 8) & 0x0000FF00) \
|
||||
| (((x) >> 24) & 0x000000FF) \
|
||||
)
|
||||
#define ___asm_opcode_swab16(x) ( \
|
||||
(((x) << 8) & 0xFF00) \
|
||||
| (((x) >> 8) & 0x00FF) \
|
||||
)
|
||||
#define ___asm_opcode_swahb32(x) ( \
|
||||
(((x) << 8) & 0xFF00FF00) \
|
||||
| (((x) >> 8) & 0x00FF00FF) \
|
||||
)
|
||||
#define ___asm_opcode_swahw32(x) ( \
|
||||
(((x) << 16) & 0xFFFF0000) \
|
||||
| (((x) >> 16) & 0x0000FFFF) \
|
||||
)
|
||||
#define ___asm_opcode_identity32(x) ((x) & 0xFFFFFFFF)
|
||||
#define ___asm_opcode_identity16(x) ((x) & 0xFFFF)
|
||||
|
||||
|
||||
/*
|
||||
* Opcode byteswap helpers
|
||||
*
|
||||
|
|
@ -41,39 +68,163 @@ extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
|
|||
* Note that values in the range 0x0000E800..0xE7FFFFFF intentionally do not
|
||||
* represent any valid Thumb-2 instruction. For this range,
|
||||
* __opcode_is_thumb32() and __opcode_is_thumb16() will both be false.
|
||||
*
|
||||
* The ___asm variants are intended only for use by this header, in situations
|
||||
* involving inline assembler. For .S files, the normal __opcode_*() macros
|
||||
* should do the right thing.
|
||||
*/
|
||||
#ifdef __ASSEMBLY__
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#define ___opcode_swab32(x) ___asm_opcode_swab32(x)
|
||||
#define ___opcode_swab16(x) ___asm_opcode_swab16(x)
|
||||
#define ___opcode_swahb32(x) ___asm_opcode_swahb32(x)
|
||||
#define ___opcode_swahw32(x) ___asm_opcode_swahw32(x)
|
||||
#define ___opcode_identity32(x) ___asm_opcode_identity32(x)
|
||||
#define ___opcode_identity16(x) ___asm_opcode_identity16(x)
|
||||
|
||||
#else /* ! __ASSEMBLY__ */
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/swab.h>
|
||||
|
||||
#define ___opcode_swab32(x) swab32(x)
|
||||
#define ___opcode_swab16(x) swab16(x)
|
||||
#define ___opcode_swahb32(x) swahb32(x)
|
||||
#define ___opcode_swahw32(x) swahw32(x)
|
||||
#define ___opcode_identity32(x) ((u32)(x))
|
||||
#define ___opcode_identity16(x) ((u16)(x))
|
||||
|
||||
#endif /* ! __ASSEMBLY__ */
|
||||
|
||||
|
||||
#ifdef CONFIG_CPU_ENDIAN_BE8
|
||||
#define __opcode_to_mem_arm(x) swab32(x)
|
||||
#define __opcode_to_mem_thumb16(x) swab16(x)
|
||||
#define __opcode_to_mem_thumb32(x) swahb32(x)
|
||||
#else
|
||||
#define __opcode_to_mem_arm(x) ((u32)(x))
|
||||
#define __opcode_to_mem_thumb16(x) ((u16)(x))
|
||||
#define __opcode_to_mem_thumb32(x) swahw32(x)
|
||||
|
||||
#define __opcode_to_mem_arm(x) ___opcode_swab32(x)
|
||||
#define __opcode_to_mem_thumb16(x) ___opcode_swab16(x)
|
||||
#define __opcode_to_mem_thumb32(x) ___opcode_swahb32(x)
|
||||
#define ___asm_opcode_to_mem_arm(x) ___asm_opcode_swab32(x)
|
||||
#define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_swab16(x)
|
||||
#define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahb32(x)
|
||||
|
||||
#else /* ! CONFIG_CPU_ENDIAN_BE8 */
|
||||
|
||||
#define __opcode_to_mem_arm(x) ___opcode_identity32(x)
|
||||
#define __opcode_to_mem_thumb16(x) ___opcode_identity16(x)
|
||||
#define ___asm_opcode_to_mem_arm(x) ___asm_opcode_identity32(x)
|
||||
#define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_identity16(x)
|
||||
#ifndef CONFIG_CPU_ENDIAN_BE32
|
||||
/*
|
||||
* On BE32 systems, using 32-bit accesses to store Thumb instructions will not
|
||||
* work in all cases, due to alignment constraints. For now, a correct
|
||||
* version is not provided for BE32.
|
||||
*/
|
||||
#define __opcode_to_mem_thumb32(x) ___opcode_swahw32(x)
|
||||
#define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahw32(x)
|
||||
#endif
|
||||
|
||||
#endif /* ! CONFIG_CPU_ENDIAN_BE8 */
|
||||
|
||||
#define __mem_to_opcode_arm(x) __opcode_to_mem_arm(x)
|
||||
#define __mem_to_opcode_thumb16(x) __opcode_to_mem_thumb16(x)
|
||||
#ifndef CONFIG_CPU_ENDIAN_BE32
|
||||
#define __mem_to_opcode_thumb32(x) __opcode_to_mem_thumb32(x)
|
||||
#endif
|
||||
|
||||
/* Operations specific to Thumb opcodes */
|
||||
|
||||
/* Instruction size checks: */
|
||||
#define __opcode_is_thumb32(x) ((u32)(x) >= 0xE8000000UL)
|
||||
#define __opcode_is_thumb16(x) ((u32)(x) < 0xE800UL)
|
||||
#define __opcode_is_thumb32(x) ( \
|
||||
((x) & 0xF8000000) == 0xE8000000 \
|
||||
|| ((x) & 0xF0000000) == 0xF0000000 \
|
||||
)
|
||||
#define __opcode_is_thumb16(x) ( \
|
||||
((x) & 0xFFFF0000) == 0 \
|
||||
&& !(((x) & 0xF800) == 0xE800 || ((x) & 0xF000) == 0xF000) \
|
||||
)
|
||||
|
||||
/* Operations to construct or split 32-bit Thumb instructions: */
|
||||
#define __opcode_thumb32_first(x) ((u16)((x) >> 16))
|
||||
#define __opcode_thumb32_second(x) ((u16)(x))
|
||||
#define __opcode_thumb32_compose(first, second) \
|
||||
(((u32)(u16)(first) << 16) | (u32)(u16)(second))
|
||||
#define __opcode_thumb32_first(x) (___opcode_identity16((x) >> 16))
|
||||
#define __opcode_thumb32_second(x) (___opcode_identity16(x))
|
||||
#define __opcode_thumb32_compose(first, second) ( \
|
||||
(___opcode_identity32(___opcode_identity16(first)) << 16) \
|
||||
| ___opcode_identity32(___opcode_identity16(second)) \
|
||||
)
|
||||
#define ___asm_opcode_thumb32_first(x) (___asm_opcode_identity16((x) >> 16))
|
||||
#define ___asm_opcode_thumb32_second(x) (___asm_opcode_identity16(x))
|
||||
#define ___asm_opcode_thumb32_compose(first, second) ( \
|
||||
(___asm_opcode_identity32(___asm_opcode_identity16(first)) << 16) \
|
||||
| ___asm_opcode_identity32(___asm_opcode_identity16(second)) \
|
||||
)
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
/*
|
||||
* Opcode injection helpers
|
||||
*
|
||||
* In rare cases it is necessary to assemble an opcode which the
|
||||
* assembler does not support directly, or which would normally be
|
||||
* rejected because of the CFLAGS or AFLAGS used to build the affected
|
||||
* file.
|
||||
*
|
||||
* Before using these macros, consider carefully whether it is feasible
|
||||
* instead to change the build flags for your file, or whether it really
|
||||
* makes sense to support old assembler versions when building that
|
||||
* particular kernel feature.
|
||||
*
|
||||
* The macros defined here should only be used where there is no viable
|
||||
* alternative.
|
||||
*
|
||||
*
|
||||
* __inst_arm(x): emit the specified ARM opcode
|
||||
* __inst_thumb16(x): emit the specified 16-bit Thumb opcode
|
||||
* __inst_thumb32(x): emit the specified 32-bit Thumb opcode
|
||||
*
|
||||
* __inst_arm_thumb16(arm, thumb): emit either the specified arm or
|
||||
* 16-bit Thumb opcode, depending on whether an ARM or Thumb-2
|
||||
* kernel is being built
|
||||
*
|
||||
* __inst_arm_thumb32(arm, thumb): emit either the specified arm or
|
||||
* 32-bit Thumb opcode, depending on whether an ARM or Thumb-2
|
||||
* kernel is being built
|
||||
*
|
||||
*
|
||||
* Note that using these macros directly is poor practice. Instead, you
|
||||
* should use them to define human-readable wrapper macros to encode the
|
||||
* instructions that you care about. In code which might run on ARMv7 or
|
||||
* above, you can usually use the __inst_arm_thumb{16,32} macros to
|
||||
* specify the ARM and Thumb alternatives at the same time. This ensures
|
||||
* that the correct opcode gets emitted depending on the instruction set
|
||||
* used for the kernel build.
|
||||
*
|
||||
* Look at opcodes-virt.h for an example of how to use these macros.
|
||||
*/
|
||||
#include <linux/stringify.h>
|
||||
|
||||
#define __inst_arm(x) ___inst_arm(___asm_opcode_to_mem_arm(x))
|
||||
#define __inst_thumb32(x) ___inst_thumb32( \
|
||||
___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_first(x)), \
|
||||
___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_second(x)) \
|
||||
)
|
||||
#define __inst_thumb16(x) ___inst_thumb16(___asm_opcode_to_mem_thumb16(x))
|
||||
|
||||
#ifdef CONFIG_THUMB2_KERNEL
|
||||
#define __inst_arm_thumb16(arm_opcode, thumb_opcode) \
|
||||
__inst_thumb16(thumb_opcode)
|
||||
#define __inst_arm_thumb32(arm_opcode, thumb_opcode) \
|
||||
__inst_thumb32(thumb_opcode)
|
||||
#else
|
||||
#define __inst_arm_thumb16(arm_opcode, thumb_opcode) __inst_arm(arm_opcode)
|
||||
#define __inst_arm_thumb32(arm_opcode, thumb_opcode) __inst_arm(arm_opcode)
|
||||
#endif
|
||||
|
||||
/* Helpers for the helpers. Don't use these directly. */
|
||||
#ifdef __ASSEMBLY__
|
||||
#define ___inst_arm(x) .long x
|
||||
#define ___inst_thumb16(x) .short x
|
||||
#define ___inst_thumb32(first, second) .short first, second
|
||||
#else
|
||||
#define ___inst_arm(x) ".long " __stringify(x) "\n\t"
|
||||
#define ___inst_thumb16(x) ".short " __stringify(x) "\n\t"
|
||||
#define ___inst_thumb32(first, second) \
|
||||
".short " __stringify(first) ", " __stringify(second) "\n\t"
|
||||
#endif
|
||||
|
||||
#endif /* __ASM_ARM_OPCODES_H */
|
||||
|
|
|
|||
|
|
@ -1,31 +0,0 @@
|
|||
/*
|
||||
* arch/arm/include/asm/param.h
|
||||
*
|
||||
* Copyright (C) 1995-1999 Russell King
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __ASM_PARAM_H
|
||||
#define __ASM_PARAM_H
|
||||
|
||||
#ifdef __KERNEL__
|
||||
# define HZ CONFIG_HZ /* Internal kernel timer frequency */
|
||||
# define USER_HZ 100 /* User interfaces are in "ticks" */
|
||||
# define CLOCKS_PER_SEC (USER_HZ) /* like times() */
|
||||
#else
|
||||
# define HZ 100
|
||||
#endif
|
||||
|
||||
#define EXEC_PAGESIZE 4096
|
||||
|
||||
#ifndef NOGROUP
|
||||
#define NOGROUP (-1)
|
||||
#endif
|
||||
|
||||
/* max length of hostname */
|
||||
#define MAXHOSTNAMELEN 64
|
||||
|
||||
#endif
|
||||
|
||||
|
|
@ -1,18 +0,0 @@
|
|||
/*
|
||||
* arch/arm/include/asm/parport.h: ARM-specific parport initialisation
|
||||
*
|
||||
* Copyright (C) 1999, 2000 Tim Waugh <tim@cyberelk.demon.co.uk>
|
||||
*
|
||||
* This file should only be included by drivers/parport/parport_pc.c.
|
||||
*/
|
||||
|
||||
#ifndef __ASMARM_PARPORT_H
|
||||
#define __ASMARM_PARPORT_H
|
||||
|
||||
static int __devinit parport_pc_find_isa_ports (int autoirq, int autodma);
|
||||
static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma)
|
||||
{
|
||||
return parport_pc_find_isa_ports (autoirq, autodma);
|
||||
}
|
||||
|
||||
#endif /* !(_ASMARM_PARPORT_H) */
|
||||
|
|
@ -195,25 +195,6 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd)
|
|||
|
||||
#define pte_clear(mm,addr,ptep) set_pte_ext(ptep, __pte(0), 0)
|
||||
|
||||
#if __LINUX_ARM_ARCH__ < 6
|
||||
static inline void __sync_icache_dcache(pte_t pteval)
|
||||
{
|
||||
}
|
||||
#else
|
||||
extern void __sync_icache_dcache(pte_t pteval);
|
||||
#endif
|
||||
|
||||
static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
|
||||
pte_t *ptep, pte_t pteval)
|
||||
{
|
||||
if (addr >= TASK_SIZE)
|
||||
set_pte_ext(ptep, pteval, 0);
|
||||
else {
|
||||
__sync_icache_dcache(pteval);
|
||||
set_pte_ext(ptep, pteval, PTE_EXT_NG);
|
||||
}
|
||||
}
|
||||
|
||||
#define pte_none(pte) (!pte_val(pte))
|
||||
#define pte_present(pte) (pte_val(pte) & L_PTE_PRESENT)
|
||||
#define pte_write(pte) (!(pte_val(pte) & L_PTE_RDONLY))
|
||||
|
|
@ -226,6 +207,27 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
|
|||
((pte_val(pte) & (L_PTE_PRESENT | L_PTE_USER)) == \
|
||||
(L_PTE_PRESENT | L_PTE_USER))
|
||||
|
||||
#if __LINUX_ARM_ARCH__ < 6
|
||||
static inline void __sync_icache_dcache(pte_t pteval)
|
||||
{
|
||||
}
|
||||
#else
|
||||
extern void __sync_icache_dcache(pte_t pteval);
|
||||
#endif
|
||||
|
||||
static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
|
||||
pte_t *ptep, pte_t pteval)
|
||||
{
|
||||
unsigned long ext = 0;
|
||||
|
||||
if (addr < TASK_SIZE && pte_present_user(pteval)) {
|
||||
__sync_icache_dcache(pteval);
|
||||
ext |= PTE_EXT_NG;
|
||||
}
|
||||
|
||||
set_pte_ext(ptep, pteval, ext);
|
||||
}
|
||||
|
||||
#define PTE_BIT_FUNC(fn,op) \
|
||||
static inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; }
|
||||
|
||||
|
|
@ -251,13 +253,13 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
|
|||
*
|
||||
* 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
|
||||
* 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
|
||||
* <--------------- offset --------------------> <- type --> 0 0 0
|
||||
* <--------------- offset ----------------------> < type -> 0 0 0
|
||||
*
|
||||
* This gives us up to 63 swap files and 32GB per swap file. Note that
|
||||
* This gives us up to 31 swap files and 64GB per swap file. Note that
|
||||
* the offset field is always non-zero.
|
||||
*/
|
||||
#define __SWP_TYPE_SHIFT 3
|
||||
#define __SWP_TYPE_BITS 6
|
||||
#define __SWP_TYPE_BITS 5
|
||||
#define __SWP_TYPE_MASK ((1 << __SWP_TYPE_BITS) - 1)
|
||||
#define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
|
||||
|
||||
|
|
|
|||
|
|
@ -10,5 +10,7 @@
|
|||
|
||||
extern void sched_clock_postinit(void);
|
||||
extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate);
|
||||
extern void setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,
|
||||
unsigned long rate);
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,11 +0,0 @@
|
|||
#ifndef __ASM_ARM_SEGMENT_H
|
||||
#define __ASM_ARM_SEGMENT_H
|
||||
|
||||
#define __KERNEL_CS 0x0
|
||||
#define __KERNEL_DS 0x0
|
||||
|
||||
#define __USER_CS 0x1
|
||||
#define __USER_DS 0x1
|
||||
|
||||
#endif /* __ASM_ARM_SEGMENT_H */
|
||||
|
||||
|
|
@ -1,25 +0,0 @@
|
|||
#ifndef _ASMARM_SEMBUF_H
|
||||
#define _ASMARM_SEMBUF_H
|
||||
|
||||
/*
|
||||
* The semid64_ds structure for arm architecture.
|
||||
* Note extra padding because this structure is passed back and forth
|
||||
* between kernel and user space.
|
||||
*
|
||||
* Pad space is left for:
|
||||
* - 64-bit time_t to solve y2038 problem
|
||||
* - 2 miscellaneous 32-bit values
|
||||
*/
|
||||
|
||||
struct semid64_ds {
|
||||
struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
|
||||
__kernel_time_t sem_otime; /* last semop time */
|
||||
unsigned long __unused1;
|
||||
__kernel_time_t sem_ctime; /* last change time */
|
||||
unsigned long __unused2;
|
||||
unsigned long sem_nsems; /* no. of semaphores in array */
|
||||
unsigned long __unused3;
|
||||
unsigned long __unused4;
|
||||
};
|
||||
|
||||
#endif /* _ASMARM_SEMBUF_H */
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue