A set of clocksource/clockevents updates:
- Reset the TI/DM timer before enabling it instead of doing it the other way round. - Initialize the reload value for the GX6605s timer correctly so the hardware counter starts at 0 again after overrun. - Make error return value negative in the h8300 timer init function -----BEGIN PGP SIGNATURE----- iQJHBAABCgAxFiEEQp8+kY+LLUocC4bMphj1TA10mKEFAl9wqQ0THHRnbHhAbGlu dXRyb25peC5kZQAKCRCmGPVMDXSYoZx0EACJUIlCC54kw4CnZdxhoWu0f6tXEuip +Iyb8OJw56FdyHigvkPBMoF1o4a0Ax32TbYYOKntpDy67vnqkO6DV1M/Mwt8IhfO ey7h1t7e4y2vrXAfYN0oX1ZQAk9hkPGW5+wugEf6dbZZva7mm+jV0PfNP/yn7KWS n9lUrLNlPJdndSIYwj9Cto5mMQBsM7/qM8MkBR84i8GxFP2rofh4C5bD8WTnXzHd B8898riwkaaQmfq/Ch9Y79oMzpZXysAEYpZ3YExkQsEmi5YqZ8k6R8RD18mKQdFH 7Kqh/025j7oKk9fopOvPjZ9sIX22gGP8C+tdy3sipYDCY0wRVNu+SPXppwl0T9ML JLX/D2pC20f/VUQ21yc8KgVt76g8QID4t+NV5/VdIHuxhei/4WN3hJxuI4w4Ivfn YK8mB5TK+R4K8Ln+GFE0zh/wfpjJe84K7r4NmDJnClD8chTVhVZHOlv5qJBZzob8 Yd4fMFS0WufAj15ZMN55iLFEI30iubY5X1xaDD1sFrFJyO1VCj8ITH7mBtW9zW1a a/8LQlB5yIjLNTGVZGTCcYfyQ7+MA1EmkutD7AnFN87Zwx6FtDYGEPZq/KI3dwrw 2qA7HTVBYoWQvSOQWt8inuXsbnqUQ2Hq2y8cIuieg333OGc1WQS6BZOeLdJWNGas W0JztaeFr1S3ew== =Htin -----END PGP SIGNATURE----- Merge tag 'timers-urgent-2020-09-27' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull timer updates from Thomas Gleixner: "A set of clocksource/clockevents updates: - Reset the TI/DM timer before enabling it instead of doing it the other way round. - Initialize the reload value for the GX6605s timer correctly so the hardware counter starts at 0 again after overrun. - Make error return value negative in the h8300 timer init function" * tag 'timers-urgent-2020-09-27' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: clocksource/drivers/timer-gx6605s: Fixup counter reload clocksource/drivers/timer-ti-dm: Do reset before enable clocksource/drivers/h8300_timer8: Fix wrong return value in h8300_8timer_init()
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commit
ba25f0570b
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@ -169,7 +169,7 @@ static int __init h8300_8timer_init(struct device_node *node)
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return PTR_ERR(clk);
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}
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ret = ENXIO;
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ret = -ENXIO;
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base = of_iomap(node, 0);
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if (!base) {
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pr_err("failed to map registers for clockevent\n");
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@ -28,6 +28,7 @@ static irqreturn_t gx6605s_timer_interrupt(int irq, void *dev)
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void __iomem *base = timer_of_base(to_timer_of(ce));
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writel_relaxed(GX6605S_STATUS_CLR, base + TIMER_STATUS);
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writel_relaxed(0, base + TIMER_INI);
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ce->event_handler(ce);
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@ -69,12 +69,33 @@ static bool dmtimer_systimer_revision1(struct dmtimer_systimer *t)
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return !(tidr >> 16);
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}
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static void dmtimer_systimer_enable(struct dmtimer_systimer *t)
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{
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u32 val;
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if (dmtimer_systimer_revision1(t))
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val = DMTIMER_TYPE1_ENABLE;
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else
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val = DMTIMER_TYPE2_ENABLE;
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writel_relaxed(val, t->base + t->sysc);
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}
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static void dmtimer_systimer_disable(struct dmtimer_systimer *t)
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{
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if (!dmtimer_systimer_revision1(t))
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return;
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writel_relaxed(DMTIMER_TYPE1_DISABLE, t->base + t->sysc);
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}
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static int __init dmtimer_systimer_type1_reset(struct dmtimer_systimer *t)
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{
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void __iomem *syss = t->base + OMAP_TIMER_V1_SYS_STAT_OFFSET;
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int ret;
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u32 l;
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dmtimer_systimer_enable(t);
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writel_relaxed(BIT(1) | BIT(2), t->base + t->ifctrl);
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ret = readl_poll_timeout_atomic(syss, l, l & BIT(0), 100,
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DMTIMER_RESET_WAIT);
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@ -88,6 +109,7 @@ static int __init dmtimer_systimer_type2_reset(struct dmtimer_systimer *t)
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void __iomem *sysc = t->base + t->sysc;
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u32 l;
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dmtimer_systimer_enable(t);
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l = readl_relaxed(sysc);
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l |= BIT(0);
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writel_relaxed(l, sysc);
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@ -336,26 +358,6 @@ static int __init dmtimer_systimer_init_clock(struct dmtimer_systimer *t,
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return 0;
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}
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static void dmtimer_systimer_enable(struct dmtimer_systimer *t)
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{
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u32 val;
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if (dmtimer_systimer_revision1(t))
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val = DMTIMER_TYPE1_ENABLE;
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else
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val = DMTIMER_TYPE2_ENABLE;
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writel_relaxed(val, t->base + t->sysc);
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}
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static void dmtimer_systimer_disable(struct dmtimer_systimer *t)
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{
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if (!dmtimer_systimer_revision1(t))
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return;
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writel_relaxed(DMTIMER_TYPE1_DISABLE, t->base + t->sysc);
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}
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static int __init dmtimer_systimer_setup(struct device_node *np,
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struct dmtimer_systimer *t)
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{
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@ -409,8 +411,8 @@ static int __init dmtimer_systimer_setup(struct device_node *np,
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t->wakeup = regbase + _OMAP_TIMER_WAKEUP_EN_OFFSET;
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t->ifctrl = regbase + _OMAP_TIMER_IF_CTRL_OFFSET;
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dmtimer_systimer_enable(t);
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dmtimer_systimer_reset(t);
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dmtimer_systimer_enable(t);
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pr_debug("dmtimer rev %08x sysc %08x\n", readl_relaxed(t->base),
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readl_relaxed(t->base + t->sysc));
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