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drm/amd/display: Collapse resource arrays when pipe is disabled 

[Why]
Currently, pipe resources are assigned to an index that matches the pipe position.
However, if pipe 1 or 2 is disabled, there will be a gap in the arrays which causes a crash when iterating based on pipe_count.

[How]
Fix resource construct to assign resources to minimum available array index.

Signed-off-by: Noah Abradjian <noah.abradjian@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Noah Abradjian 2019-11-22 16:07:24 -05:00 committed by Alex Deucher
parent cf27a6d15d
commit b9f1246df1
1 changed files with 10 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
View File

@ -1783,41 +1783,41 @@ static bool dcn21_resource_construct(
if ((pipe_fuses & (1 << i)) != 0)
continue;
pool->base.hubps[i] = dcn21_hubp_create(ctx, i);
if (pool->base.hubps[i] == NULL) {
pool->base.hubps[j] = dcn21_hubp_create(ctx, i);
if (pool->base.hubps[j] == NULL) {
BREAK_TO_DEBUGGER();
dm_error(
"DC: failed to create memory input!\n");
goto create_fail;
}
pool->base.ipps[i] = dcn21_ipp_create(ctx, i);
if (pool->base.ipps[i] == NULL) {
pool->base.ipps[j] = dcn21_ipp_create(ctx, i);
if (pool->base.ipps[j] == NULL) {
BREAK_TO_DEBUGGER();
dm_error(
"DC: failed to create input pixel processor!\n");
goto create_fail;
}
pool->base.dpps[i] = dcn21_dpp_create(ctx, i);
if (pool->base.dpps[i] == NULL) {
pool->base.dpps[j] = dcn21_dpp_create(ctx, i);
if (pool->base.dpps[j] == NULL) {
BREAK_TO_DEBUGGER();
dm_error(
"DC: failed to create dpps!\n");
goto create_fail;
}
pool->base.opps[i] = dcn21_opp_create(ctx, i);
if (pool->base.opps[i] == NULL) {
pool->base.opps[j] = dcn21_opp_create(ctx, i);
if (pool->base.opps[j] == NULL) {
BREAK_TO_DEBUGGER();
dm_error(
"DC: failed to create output pixel processor!\n");
goto create_fail;
}
pool->base.timing_generators[i] = dcn21_timing_generator_create(
pool->base.timing_generators[j] = dcn21_timing_generator_create(
ctx, i);
if (pool->base.timing_generators[i] == NULL) {
if (pool->base.timing_generators[j] == NULL) {
BREAK_TO_DEBUGGER();
dm_error("DC: failed to create tg!\n");
goto create_fail;