UbiquitousOS
/
OpenCloudOS-Kernel
mirror of https://gitee.com/OpenCloudOS/OpenCloudOS-Kernel.git
11
0
Fork 0
Code Issues Projects Releases Wiki Activity

ixgbe: fix potential u32 overflow on shift 

The u32 variable rem is being shifted using u32 arithmetic however
it is being passed to div_u64 that expects the expression to be a u64.
The 32 bit shift may potentially overflow, so cast rem to a u64 before
shifting to avoid this.  Also remove comment about overflow.

Addresses-Coverity: ("Unintentional integer overflow")
Fixes: cd45832069 ("ixgbe: implement support for SDP/PPS output on X550 hardware")
Fixes: 68d9676fc0 ("ixgbe: fix PTP SDP pin setup on X540 hardware")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Acked-by: Jacob Keller <jacob.e.keller@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Colin Ian King 2019-06-07 19:19:20 +01:00 committed by Jeff Kirsher
parent 9292406410
commit b97c0b521a
1 changed files with 4 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c
View File

@ -205,11 +205,8 @@ static void ixgbe_ptp_setup_sdp_X540(struct ixgbe_adapter *adapter)
*/
rem = (NS_PER_SEC - rem);
/* Adjust the clock edge to align with the next full second. This
* assumes that the cycle counter shift is small enough to avoid
* overflowing when shifting the remainder.
*/
clock_edge += div_u64((rem << cc->shift), cc->mult);
/* Adjust the clock edge to align with the next full second. */
clock_edge += div_u64(((u64)rem << cc->shift), cc->mult);
trgttiml = (u32)clock_edge;
trgttimh = (u32)(clock_edge >> 32);
@ -291,11 +288,8 @@ static void ixgbe_ptp_setup_sdp_X550(struct ixgbe_adapter *adapter)
*/
rem = (NS_PER_SEC - rem);
/* Adjust the clock edge to align with the next full second. This
* assumes that the cycle counter shift is small enough to avoid
* overflowing when shifting the remainder.
*/
clock_edge += div_u64((rem << cc->shift), cc->mult);
/* Adjust the clock edge to align with the next full second. */
clock_edge += div_u64(((u64)rem << cc->shift), cc->mult);
/* X550 hardware stores the time in 32bits of 'billions of cycles' and
* 32bits of 'cycles'. There's no guarantee that cycles represents