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s390/ioasm: get rid of register asm 

Acked-by: Peter Oberparleiter <oberpar@linux.ibm.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
This commit is contained in:
Heiko Carstens 2021-06-22 14:43:07 +02:00 committed by Vasily Gorbik
parent 6d7c628be7
commit b94bcca283
1 changed files with 60 additions and 53 deletions
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113
drivers/s390/cio/ioasm.c
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@ -16,18 +16,19 @@
static inline int __stsch(struct subchannel_id schid, struct schib *addr)
{
register struct subchannel_id reg1 asm ("1") = schid;
unsigned long r1 = *(unsigned int *)&schid;
int ccode = -EIO;
asm volatile(
" stsch 0(%3)\n"
"0: ipm %0\n"
" srl %0,28\n"
" lgr 1,%[r1]\n"
" stsch %[addr]\n"
"0: ipm %[cc]\n"
" srl %[cc],28\n"
"1:\n"
EX_TABLE(0b, 1b)
: "+d" (ccode), "=m" (*addr)
: "d" (reg1), "a" (addr)
: "cc");
: [cc] "+&d" (ccode), [addr] "=Q" (*addr)
: [r1] "d" (r1)
: "cc", "1");
return ccode;
}
@ -44,18 +45,19 @@ EXPORT_SYMBOL(stsch);
static inline int __msch(struct subchannel_id schid, struct schib *addr)
{
register struct subchannel_id reg1 asm ("1") = schid;
unsigned long r1 = *(unsigned int *)&schid;
int ccode = -EIO;
asm volatile(
" msch 0(%2)\n"
"0: ipm %0\n"
" srl %0,28\n"
" lgr 1,%[r1]\n"
" msch %[addr]\n"
"0: ipm %[cc]\n"
" srl %[cc],28\n"
"1:\n"
EX_TABLE(0b, 1b)
: "+d" (ccode)
: "d" (reg1), "a" (addr), "m" (*addr)
: "cc");
: [cc] "+&d" (ccode)
: [r1] "d" (r1), [addr] "Q" (*addr)
: "cc", "1");
return ccode;
}
@ -71,16 +73,17 @@ int msch(struct subchannel_id schid, struct schib *addr)
static inline int __tsch(struct subchannel_id schid, struct irb *addr)
{
register struct subchannel_id reg1 asm ("1") = schid;
unsigned long r1 = *(unsigned int *)&schid;
int ccode;
asm volatile(
" tsch 0(%3)\n"
" ipm %0\n"
" srl %0,28"
: "=d" (ccode), "=m" (*addr)
: "d" (reg1), "a" (addr)
: "cc");
" lgr 1,%[r1]\n"
" tsch %[addr]\n"
" ipm %[cc]\n"
" srl %[cc],28"
: [cc] "=&d" (ccode), [addr] "=Q" (*addr)
: [r1] "d" (r1)
: "cc", "1");
return ccode;
}
@ -96,18 +99,19 @@ int tsch(struct subchannel_id schid, struct irb *addr)
static inline int __ssch(struct subchannel_id schid, union orb *addr)
{
register struct subchannel_id reg1 asm("1") = schid;
unsigned long r1 = *(unsigned int *)&schid;
int ccode = -EIO;
asm volatile(
" ssch 0(%2)\n"
"0: ipm %0\n"
" srl %0,28\n"
" lgr 1,%[r1]\n"
" ssch %[addr]\n"
"0: ipm %[cc]\n"
" srl %[cc],28\n"
"1:\n"
EX_TABLE(0b, 1b)
: "+d" (ccode)
: "d" (reg1), "a" (addr), "m" (*addr)
: "cc", "memory");
: [cc] "+&d" (ccode)
: [r1] "d" (r1), [addr] "Q" (*addr)
: "cc", "memory", "1");
return ccode;
}
@ -124,16 +128,17 @@ EXPORT_SYMBOL(ssch);
static inline int __csch(struct subchannel_id schid)
{
register struct subchannel_id reg1 asm("1") = schid;
unsigned long r1 = *(unsigned int *)&schid;
int ccode;
asm volatile(
" lgr 1,%[r1]\n"
" csch\n"
" ipm %0\n"
" srl %0,28"
: "=d" (ccode)
: "d" (reg1)
: "cc");
" ipm %[cc]\n"
" srl %[cc],28\n"
: [cc] "=&d" (ccode)
: [r1] "d" (r1)
: "cc", "1");
return ccode;
}
@ -186,17 +191,17 @@ EXPORT_SYMBOL(chsc);
static inline int __rsch(struct subchannel_id schid)
{
register struct subchannel_id reg1 asm("1") = schid;
unsigned long r1 = *(unsigned int *)&schid;
int ccode;
asm volatile(
" lgr 1,%[r1]\n"
" rsch\n"
" ipm %0\n"
" srl %0,28"
: "=d" (ccode)
: "d" (reg1)
: "cc", "memory");
" ipm %[cc]\n"
" srl %[cc],28\n"
: [cc] "=&d" (ccode)
: [r1] "d" (r1)
: "cc", "memory", "1");
return ccode;
}
@ -212,16 +217,17 @@ int rsch(struct subchannel_id schid)
static inline int __hsch(struct subchannel_id schid)
{
register struct subchannel_id reg1 asm("1") = schid;
unsigned long r1 = *(unsigned int *)&schid;
int ccode;
asm volatile(
" lgr 1,%[r1]\n"
" hsch\n"
" ipm %0\n"
" srl %0,28"
: "=d" (ccode)
: "d" (reg1)
: "cc");
" ipm %[cc]\n"
" srl %[cc],28\n"
: [cc] "=&d" (ccode)
: [r1] "d" (r1)
: "cc", "1");
return ccode;
}
@ -238,16 +244,17 @@ EXPORT_SYMBOL(hsch);
static inline int __xsch(struct subchannel_id schid)
{
register struct subchannel_id reg1 asm("1") = schid;
unsigned long r1 = *(unsigned int *)&schid;
int ccode;
asm volatile(
" lgr 1,%[r1]\n"
" xsch\n"
" ipm %0\n"
" srl %0,28"
: "=d" (ccode)
: "d" (reg1)
: "cc");
" ipm %[cc]\n"
" srl %[cc],28\n"
: [cc] "=&d" (ccode)
: [r1] "d" (r1)
: "cc", "1");
return ccode;
}