ARM: dts: vf610: Add eDMA node
Signed-off-by: Jingchang Lu <b35083@freescale.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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@ -88,6 +88,21 @@
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arm,tag-latency = <2 2 2>;
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};
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edma0: dma-controller@40018000 {
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#dma-cells = <2>;
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compatible = "fsl,vf610-edma";
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reg = <0x40018000 0x2000>,
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<0x40024000 0x1000>,
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<0x40025000 0x1000>;
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interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>,
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<0 9 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "edma-tx", "edma-err";
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dma-channels = <32>;
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clock-names = "dmamux0", "dmamux1";
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clocks = <&clks VF610_CLK_DMAMUX0>,
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<&clks VF610_CLK_DMAMUX1>;
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};
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uart0: serial@40027000 {
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compatible = "fsl,vf610-lpuart";
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reg = <0x40027000 0x1000>;
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@ -263,6 +278,21 @@
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reg = <0x40080000 0x80000>;
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ranges;
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edma1: dma-controller@40098000 {
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#dma-cells = <2>;
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compatible = "fsl,vf610-edma";
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reg = <0x40098000 0x2000>,
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<0x400a1000 0x1000>,
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<0x400a2000 0x1000>;
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interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>,
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<0 11 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "edma-tx", "edma-err";
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dma-channels = <32>;
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clock-names = "dmamux0", "dmamux1";
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clocks = <&clks VF610_CLK_DMAMUX2>,
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<&clks VF610_CLK_DMAMUX3>;
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};
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uart4: serial@400a9000 {
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compatible = "fsl,vf610-lpuart";
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reg = <0x400a9000 0x1000>;
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